2 * linux/sound/pxa2xx-ac97.c -- AC97 support for the Intel PXA2xx chip.
4 * Author: Nicolas Pitre
5 * Created: Dec 02, 2004
6 * Copyright: MontaVista Software Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/platform_device.h>
16 #include <linux/interrupt.h>
17 #include <linux/wait.h>
18 #include <linux/clk.h>
19 #include <linux/delay.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/ac97_codec.h>
24 #include <sound/initval.h>
25 #include <sound/soc.h>
28 #include <linux/mutex.h>
29 #include <mach/hardware.h>
30 #include <mach/pxa-regs.h>
31 #include <mach/pxa2xx-gpio.h>
32 #include <mach/audio.h>
34 #include "pxa2xx-pcm.h"
35 #include "pxa2xx-ac97.h"
37 static DEFINE_MUTEX(car_mutex
);
38 static DECLARE_WAIT_QUEUE_HEAD(gsr_wq
);
39 static volatile long gsr_bits
;
40 static struct clk
*ac97_clk
;
42 static struct clk
*ac97conf_clk
;
48 * o Slot 12 read from modem space will hang controller.
49 * o CDONE, SDONE interrupt fails after any slot 12 IO.
51 * We therefore have an hybrid approach for waiting on SDONE (interrupt or
52 * 1 jiffy timeout if interrupt never comes).
55 static unsigned short pxa2xx_ac97_read(struct snd_ac97
*ac97
,
58 unsigned short val
= -1;
59 volatile u32
*reg_addr
;
61 mutex_lock(&car_mutex
);
63 /* set up primary or secondary codec/modem space */
64 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
65 reg_addr
= ac97
->num
? &SAC_REG_BASE
: &PAC_REG_BASE
;
67 if (reg
== AC97_GPIO_STATUS
)
68 reg_addr
= ac97
->num
? &SMC_REG_BASE
: &PMC_REG_BASE
;
70 reg_addr
= ac97
->num
? &SAC_REG_BASE
: &PAC_REG_BASE
;
72 reg_addr
+= (reg
>> 1);
75 if (reg
== AC97_GPIO_STATUS
) {
76 /* read from controller cache */
82 /* start read access across the ac97 link */
83 GSR
= GSR_CDONE
| GSR_SDONE
;
87 wait_event_timeout(gsr_wq
, (GSR
| gsr_bits
) & GSR_SDONE
, 1);
88 if (!((GSR
| gsr_bits
) & GSR_SDONE
)) {
89 printk(KERN_ERR
"%s: read error (ac97_reg=%x GSR=%#lx)\n",
90 __func__
, reg
, GSR
| gsr_bits
);
96 GSR
= GSR_CDONE
| GSR_SDONE
;
99 /* but we've just started another cycle... */
100 wait_event_timeout(gsr_wq
, (GSR
| gsr_bits
) & GSR_SDONE
, 1);
102 out
: mutex_unlock(&car_mutex
);
106 static void pxa2xx_ac97_write(struct snd_ac97
*ac97
, unsigned short reg
,
109 volatile u32
*reg_addr
;
111 mutex_lock(&car_mutex
);
113 /* set up primary or secondary codec/modem space */
114 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
115 reg_addr
= ac97
->num
? &SAC_REG_BASE
: &PAC_REG_BASE
;
117 if (reg
== AC97_GPIO_STATUS
)
118 reg_addr
= ac97
->num
? &SMC_REG_BASE
: &PMC_REG_BASE
;
120 reg_addr
= ac97
->num
? &SAC_REG_BASE
: &PAC_REG_BASE
;
122 reg_addr
+= (reg
>> 1);
124 GSR
= GSR_CDONE
| GSR_SDONE
;
127 wait_event_timeout(gsr_wq
, (GSR
| gsr_bits
) & GSR_CDONE
, 1);
128 if (!((GSR
| gsr_bits
) & GSR_CDONE
))
129 printk(KERN_ERR
"%s: write error (ac97_reg=%x GSR=%#lx)\n",
130 __func__
, reg
, GSR
| gsr_bits
);
132 mutex_unlock(&car_mutex
);
135 static void pxa2xx_ac97_warm_reset(struct snd_ac97
*ac97
)
143 /* warm reset broken on Bulverde,
144 so manually keep AC97 reset high */
145 pxa_gpio_mode(113 | GPIO_OUT
| GPIO_DFLT_HIGH
);
148 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT
);
150 #elif defined(CONFIG_PXA3xx)
151 /* Can't use interrupts */
153 while (!((GSR
| gsr_bits
) & (GSR_PCR
| GSR_SCR
)) && timeout
--)
156 GCR
|= GCR_WARM_RST
| GCR_PRIRDY_IEN
| GCR_SECRDY_IEN
;
157 wait_event_timeout(gsr_wq
, gsr_bits
& (GSR_PCR
| GSR_SCR
), 1);
160 if (!((GSR
| gsr_bits
) & (GSR_PCR
| GSR_SCR
)))
161 printk(KERN_INFO
"%s: warm reset timeout (GSR=%#lx)\n",
164 GCR
&= ~(GCR_PRIRDY_IEN
|GCR_SECRDY_IEN
);
165 GCR
|= GCR_SDONE_IE
|GCR_CDONE_IE
;
168 static void pxa2xx_ac97_cold_reset(struct snd_ac97
*ac97
)
173 /* Hold CLKBPB for 100us */
180 GCR
&= GCR_COLD_RST
; /* clear everything but nCRST */
181 GCR
&= ~GCR_COLD_RST
; /* then assert nCRST */
185 /* PXA27x Developers Manual section 13.5.2.2.1 */
186 clk_enable(ac97conf_clk
);
188 clk_disable(ac97conf_clk
);
191 #elif defined(CONFIG_PXA3xx)
192 /* Can't use interrupts on PXA3xx */
193 GCR
&= ~(GCR_PRIRDY_IEN
|GCR_SECRDY_IEN
);
195 GCR
= GCR_WARM_RST
| GCR_COLD_RST
;
196 while (!(GSR
& (GSR_PCR
| GSR_SCR
)) && timeout
--)
200 GCR
|= GCR_CDONE_IE
|GCR_SDONE_IE
;
201 wait_event_timeout(gsr_wq
, gsr_bits
& (GSR_PCR
| GSR_SCR
), 1);
204 if (!((GSR
| gsr_bits
) & (GSR_PCR
| GSR_SCR
)))
205 printk(KERN_INFO
"%s: cold reset timeout (GSR=%#lx)\n",
208 GCR
&= ~(GCR_PRIRDY_IEN
|GCR_SECRDY_IEN
);
209 GCR
|= GCR_SDONE_IE
|GCR_CDONE_IE
;
212 static irqreturn_t
pxa2xx_ac97_irq(int irq
, void *dev_id
)
223 /* Although we don't use those we still need to clear them
224 since they tend to spuriously trigger when MMC is used
225 (hardware bug? go figure)... */
237 struct snd_ac97_bus_ops soc_ac97_ops
= {
238 .read
= pxa2xx_ac97_read
,
239 .write
= pxa2xx_ac97_write
,
240 .warm_reset
= pxa2xx_ac97_warm_reset
,
241 .reset
= pxa2xx_ac97_cold_reset
,
244 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_stereo_out
= {
245 .name
= "AC97 PCM Stereo out",
246 .dev_addr
= __PREG(PCDR
),
248 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
249 DCMD_BURST32
| DCMD_WIDTH4
,
252 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_stereo_in
= {
253 .name
= "AC97 PCM Stereo in",
254 .dev_addr
= __PREG(PCDR
),
256 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
257 DCMD_BURST32
| DCMD_WIDTH4
,
260 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_aux_mono_out
= {
261 .name
= "AC97 Aux PCM (Slot 5) Mono out",
262 .dev_addr
= __PREG(MODR
),
264 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
265 DCMD_BURST16
| DCMD_WIDTH2
,
268 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_aux_mono_in
= {
269 .name
= "AC97 Aux PCM (Slot 5) Mono in",
270 .dev_addr
= __PREG(MODR
),
272 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
273 DCMD_BURST16
| DCMD_WIDTH2
,
276 static struct pxa2xx_pcm_dma_params pxa2xx_ac97_pcm_mic_mono_in
= {
277 .name
= "AC97 Mic PCM (Slot 6) Mono in",
278 .dev_addr
= __PREG(MCDR
),
280 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
281 DCMD_BURST16
| DCMD_WIDTH2
,
285 static int pxa2xx_ac97_suspend(struct platform_device
*pdev
,
286 struct snd_soc_dai
*dai
)
288 GCR
|= GCR_ACLINK_OFF
;
289 clk_disable(ac97_clk
);
293 static int pxa2xx_ac97_resume(struct platform_device
*pdev
,
294 struct snd_soc_dai
*dai
)
296 clk_enable(ac97_clk
);
301 #define pxa2xx_ac97_suspend NULL
302 #define pxa2xx_ac97_resume NULL
305 static int pxa2xx_ac97_probe(struct platform_device
*pdev
,
306 struct snd_soc_dai
*dai
)
310 ret
= request_irq(IRQ_AC97
, pxa2xx_ac97_irq
, IRQF_DISABLED
, "AC97", NULL
);
314 pxa_gpio_mode(GPIO31_SYNC_AC97_MD
);
315 pxa_gpio_mode(GPIO30_SDATA_OUT_AC97_MD
);
316 pxa_gpio_mode(GPIO28_BITCLK_AC97_MD
);
317 pxa_gpio_mode(GPIO29_SDATA_IN_AC97_MD
);
319 /* Use GPIO 113 as AC97 Reset on Bulverde */
320 pxa_gpio_mode(113 | GPIO_ALT_FN_2_OUT
);
322 ac97conf_clk
= clk_get(&pdev
->dev
, "AC97CONFCLK");
323 if (IS_ERR(ac97conf_clk
)) {
324 ret
= PTR_ERR(ac97conf_clk
);
329 ac97_clk
= clk_get(&pdev
->dev
, "AC97CLK");
330 if (IS_ERR(ac97_clk
)) {
331 ret
= PTR_ERR(ac97_clk
);
335 clk_enable(ac97_clk
);
339 GCR
|= GCR_ACLINK_OFF
;
342 clk_put(ac97conf_clk
);
346 free_irq(IRQ_AC97
, NULL
);
351 static void pxa2xx_ac97_remove(struct platform_device
*pdev
,
352 struct snd_soc_dai
*dai
)
354 GCR
|= GCR_ACLINK_OFF
;
355 free_irq(IRQ_AC97
, NULL
);
357 clk_put(ac97conf_clk
);
360 clk_disable(ac97_clk
);
365 static int pxa2xx_ac97_hw_params(struct snd_pcm_substream
*substream
,
366 struct snd_pcm_hw_params
*params
)
368 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
369 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
371 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
372 cpu_dai
->dma_data
= &pxa2xx_ac97_pcm_stereo_out
;
374 cpu_dai
->dma_data
= &pxa2xx_ac97_pcm_stereo_in
;
379 static int pxa2xx_ac97_hw_aux_params(struct snd_pcm_substream
*substream
,
380 struct snd_pcm_hw_params
*params
)
382 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
383 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
385 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
386 cpu_dai
->dma_data
= &pxa2xx_ac97_pcm_aux_mono_out
;
388 cpu_dai
->dma_data
= &pxa2xx_ac97_pcm_aux_mono_in
;
393 static int pxa2xx_ac97_hw_mic_params(struct snd_pcm_substream
*substream
,
394 struct snd_pcm_hw_params
*params
)
396 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
397 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
399 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
402 cpu_dai
->dma_data
= &pxa2xx_ac97_pcm_mic_mono_in
;
407 #define PXA2XX_AC97_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
408 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
409 SNDRV_PCM_RATE_48000)
412 * There is only 1 physical AC97 interface for pxa2xx, but it
413 * has extra fifo's that can be used for aux DACs and ADCs.
415 struct snd_soc_dai pxa_ac97_dai
[] = {
417 .name
= "pxa2xx-ac97",
419 .type
= SND_SOC_DAI_AC97
,
420 .probe
= pxa2xx_ac97_probe
,
421 .remove
= pxa2xx_ac97_remove
,
422 .suspend
= pxa2xx_ac97_suspend
,
423 .resume
= pxa2xx_ac97_resume
,
425 .stream_name
= "AC97 Playback",
428 .rates
= PXA2XX_AC97_RATES
,
429 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
431 .stream_name
= "AC97 Capture",
434 .rates
= PXA2XX_AC97_RATES
,
435 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
437 .hw_params
= pxa2xx_ac97_hw_params
,},
440 .name
= "pxa2xx-ac97-aux",
442 .type
= SND_SOC_DAI_AC97
,
444 .stream_name
= "AC97 Aux Playback",
447 .rates
= PXA2XX_AC97_RATES
,
448 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
450 .stream_name
= "AC97 Aux Capture",
453 .rates
= PXA2XX_AC97_RATES
,
454 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
456 .hw_params
= pxa2xx_ac97_hw_aux_params
,},
459 .name
= "pxa2xx-ac97-mic",
461 .type
= SND_SOC_DAI_AC97
,
463 .stream_name
= "AC97 Mic Capture",
466 .rates
= PXA2XX_AC97_RATES
,
467 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
469 .hw_params
= pxa2xx_ac97_hw_mic_params
,},
473 EXPORT_SYMBOL_GPL(pxa_ac97_dai
);
474 EXPORT_SYMBOL_GPL(soc_ac97_ops
);
476 MODULE_AUTHOR("Nicolas Pitre");
477 MODULE_DESCRIPTION("AC97 driver for the Intel PXA2xx chip");
478 MODULE_LICENSE("GPL");