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ASoC: sh: fsi: use same format for IN/OUT
[deliverable/linux.git] / sound / soc / sh / fsi.c
1 /*
2 * Fifo-attached Serial Interface (FSI) support for SH7724
3 *
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
6 *
7 * Based on ssi.c
8 * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/io.h>
19 #include <linux/scatterlist.h>
20 #include <linux/sh_dma.h>
21 #include <linux/slab.h>
22 #include <linux/module.h>
23 #include <sound/soc.h>
24 #include <sound/sh_fsi.h>
25
26 /* PortA/PortB register */
27 #define REG_DO_FMT 0x0000
28 #define REG_DOFF_CTL 0x0004
29 #define REG_DOFF_ST 0x0008
30 #define REG_DI_FMT 0x000C
31 #define REG_DIFF_CTL 0x0010
32 #define REG_DIFF_ST 0x0014
33 #define REG_CKG1 0x0018
34 #define REG_CKG2 0x001C
35 #define REG_DIDT 0x0020
36 #define REG_DODT 0x0024
37 #define REG_MUTE_ST 0x0028
38 #define REG_OUT_DMAC 0x002C
39 #define REG_OUT_SEL 0x0030
40 #define REG_IN_DMAC 0x0038
41
42 /* master register */
43 #define MST_CLK_RST 0x0210
44 #define MST_SOFT_RST 0x0214
45 #define MST_FIFO_SZ 0x0218
46
47 /* core register (depend on FSI version) */
48 #define A_MST_CTLR 0x0180
49 #define B_MST_CTLR 0x01A0
50 #define CPU_INT_ST 0x01F4
51 #define CPU_IEMSK 0x01F8
52 #define CPU_IMSK 0x01FC
53 #define INT_ST 0x0200
54 #define IEMSK 0x0204
55 #define IMSK 0x0208
56
57 /* DO_FMT */
58 /* DI_FMT */
59 #define CR_BWS_MASK (0x3 << 20) /* FSI2 */
60 #define CR_BWS_24 (0x0 << 20) /* FSI2 */
61 #define CR_BWS_16 (0x1 << 20) /* FSI2 */
62 #define CR_BWS_20 (0x2 << 20) /* FSI2 */
63
64 #define CR_DTMD_PCM (0x0 << 8) /* FSI2 */
65 #define CR_DTMD_SPDIF_PCM (0x1 << 8) /* FSI2 */
66 #define CR_DTMD_SPDIF_STREAM (0x2 << 8) /* FSI2 */
67
68 #define CR_MONO (0x0 << 4)
69 #define CR_MONO_D (0x1 << 4)
70 #define CR_PCM (0x2 << 4)
71 #define CR_I2S (0x3 << 4)
72 #define CR_TDM (0x4 << 4)
73 #define CR_TDM_D (0x5 << 4)
74
75 /* OUT_DMAC */
76 /* IN_DMAC */
77 #define VDMD_MASK (0x3 << 4)
78 #define VDMD_FRONT (0x0 << 4) /* Package in front */
79 #define VDMD_BACK (0x1 << 4) /* Package in back */
80 #define VDMD_STREAM (0x2 << 4) /* Stream mode(16bit * 2) */
81
82 #define DMA_ON (0x1 << 0)
83
84 /* DOFF_CTL */
85 /* DIFF_CTL */
86 #define IRQ_HALF 0x00100000
87 #define FIFO_CLR 0x00000001
88
89 /* DOFF_ST */
90 #define ERR_OVER 0x00000010
91 #define ERR_UNDER 0x00000001
92 #define ST_ERR (ERR_OVER | ERR_UNDER)
93
94 /* CKG1 */
95 #define ACKMD_MASK 0x00007000
96 #define BPFMD_MASK 0x00000700
97 #define DIMD (1 << 4)
98 #define DOMD (1 << 0)
99
100 /* A/B MST_CTLR */
101 #define BP (1 << 4) /* Fix the signal of Biphase output */
102 #define SE (1 << 0) /* Fix the master clock */
103
104 /* CLK_RST */
105 #define CRB (1 << 4)
106 #define CRA (1 << 0)
107
108 /* IO SHIFT / MACRO */
109 #define BI_SHIFT 12
110 #define BO_SHIFT 8
111 #define AI_SHIFT 4
112 #define AO_SHIFT 0
113 #define AB_IO(param, shift) (param << shift)
114
115 /* SOFT_RST */
116 #define PBSR (1 << 12) /* Port B Software Reset */
117 #define PASR (1 << 8) /* Port A Software Reset */
118 #define IR (1 << 4) /* Interrupt Reset */
119 #define FSISR (1 << 0) /* Software Reset */
120
121 /* OUT_SEL (FSI2) */
122 #define DMMD (1 << 4) /* SPDIF output timing 0: Biphase only */
123 /* 1: Biphase and serial */
124
125 /* FIFO_SZ */
126 #define FIFO_SZ_MASK 0x7
127
128 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
129
130 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
131
132 typedef int (*set_rate_func)(struct device *dev, int rate, int enable);
133
134 /*
135 * FSI driver use below type name for variable
136 *
137 * xxx_num : number of data
138 * xxx_pos : position of data
139 * xxx_capa : capacity of data
140 */
141
142 /*
143 * period/frame/sample image
144 *
145 * ex) PCM (2ch)
146 *
147 * period pos period pos
148 * [n] [n + 1]
149 * |<-------------------- period--------------------->|
150 * ==|============================================ ... =|==
151 * | |
152 * ||<----- frame ----->|<------ frame ----->| ... |
153 * |+--------------------+--------------------+- ... |
154 * ||[ sample ][ sample ]|[ sample ][ sample ]| ... |
155 * |+--------------------+--------------------+- ... |
156 * ==|============================================ ... =|==
157 */
158
159 /*
160 * FSI FIFO image
161 *
162 * | |
163 * | |
164 * | [ sample ] |
165 * | [ sample ] |
166 * | [ sample ] |
167 * | [ sample ] |
168 * --> go to codecs
169 */
170
171 /*
172 * struct
173 */
174
175 struct fsi_stream_handler;
176 struct fsi_stream {
177
178 /*
179 * these are initialized by fsi_stream_init()
180 */
181 struct snd_pcm_substream *substream;
182 int fifo_sample_capa; /* sample capacity of FSI FIFO */
183 int buff_sample_capa; /* sample capacity of ALSA buffer */
184 int buff_sample_pos; /* sample position of ALSA buffer */
185 int period_samples; /* sample number / 1 period */
186 int period_pos; /* current period position */
187 int sample_width; /* sample width */
188 int uerr_num;
189 int oerr_num;
190
191 /*
192 * thse are initialized by fsi_handler_init()
193 */
194 struct fsi_stream_handler *handler;
195 struct fsi_priv *priv;
196
197 /*
198 * these are for DMAEngine
199 */
200 struct dma_chan *chan;
201 struct sh_dmae_slave slave; /* see fsi_handler_init() */
202 struct tasklet_struct tasklet;
203 dma_addr_t dma;
204 };
205
206 struct fsi_priv {
207 void __iomem *base;
208 struct fsi_master *master;
209 struct sh_fsi_port_info *info;
210
211 struct fsi_stream playback;
212 struct fsi_stream capture;
213
214 u32 fmt;
215
216 int chan_num:16;
217 int clk_master:1;
218 int spdif:1;
219
220 long rate;
221 };
222
223 struct fsi_stream_handler {
224 int (*init)(struct fsi_priv *fsi, struct fsi_stream *io);
225 int (*quit)(struct fsi_priv *fsi, struct fsi_stream *io);
226 int (*probe)(struct fsi_priv *fsi, struct fsi_stream *io);
227 int (*transfer)(struct fsi_priv *fsi, struct fsi_stream *io);
228 int (*remove)(struct fsi_priv *fsi, struct fsi_stream *io);
229 void (*start_stop)(struct fsi_priv *fsi, struct fsi_stream *io,
230 int enable);
231 };
232 #define fsi_stream_handler_call(io, func, args...) \
233 (!(io) ? -ENODEV : \
234 !((io)->handler->func) ? 0 : \
235 (io)->handler->func(args))
236
237 struct fsi_core {
238 int ver;
239
240 u32 int_st;
241 u32 iemsk;
242 u32 imsk;
243 u32 a_mclk;
244 u32 b_mclk;
245 };
246
247 struct fsi_master {
248 void __iomem *base;
249 int irq;
250 struct fsi_priv fsia;
251 struct fsi_priv fsib;
252 struct fsi_core *core;
253 spinlock_t lock;
254 };
255
256 static int fsi_stream_is_play(struct fsi_priv *fsi, struct fsi_stream *io);
257
258 /*
259 * basic read write function
260 */
261
262 static void __fsi_reg_write(u32 __iomem *reg, u32 data)
263 {
264 /* valid data area is 24bit */
265 data &= 0x00ffffff;
266
267 __raw_writel(data, reg);
268 }
269
270 static u32 __fsi_reg_read(u32 __iomem *reg)
271 {
272 return __raw_readl(reg);
273 }
274
275 static void __fsi_reg_mask_set(u32 __iomem *reg, u32 mask, u32 data)
276 {
277 u32 val = __fsi_reg_read(reg);
278
279 val &= ~mask;
280 val |= data & mask;
281
282 __fsi_reg_write(reg, val);
283 }
284
285 #define fsi_reg_write(p, r, d)\
286 __fsi_reg_write((p->base + REG_##r), d)
287
288 #define fsi_reg_read(p, r)\
289 __fsi_reg_read((p->base + REG_##r))
290
291 #define fsi_reg_mask_set(p, r, m, d)\
292 __fsi_reg_mask_set((p->base + REG_##r), m, d)
293
294 #define fsi_master_read(p, r) _fsi_master_read(p, MST_##r)
295 #define fsi_core_read(p, r) _fsi_master_read(p, p->core->r)
296 static u32 _fsi_master_read(struct fsi_master *master, u32 reg)
297 {
298 u32 ret;
299 unsigned long flags;
300
301 spin_lock_irqsave(&master->lock, flags);
302 ret = __fsi_reg_read(master->base + reg);
303 spin_unlock_irqrestore(&master->lock, flags);
304
305 return ret;
306 }
307
308 #define fsi_master_mask_set(p, r, m, d) _fsi_master_mask_set(p, MST_##r, m, d)
309 #define fsi_core_mask_set(p, r, m, d) _fsi_master_mask_set(p, p->core->r, m, d)
310 static void _fsi_master_mask_set(struct fsi_master *master,
311 u32 reg, u32 mask, u32 data)
312 {
313 unsigned long flags;
314
315 spin_lock_irqsave(&master->lock, flags);
316 __fsi_reg_mask_set(master->base + reg, mask, data);
317 spin_unlock_irqrestore(&master->lock, flags);
318 }
319
320 /*
321 * basic function
322 */
323 static int fsi_version(struct fsi_master *master)
324 {
325 return master->core->ver;
326 }
327
328 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
329 {
330 return fsi->master;
331 }
332
333 static int fsi_is_clk_master(struct fsi_priv *fsi)
334 {
335 return fsi->clk_master;
336 }
337
338 static int fsi_is_port_a(struct fsi_priv *fsi)
339 {
340 return fsi->master->base == fsi->base;
341 }
342
343 static int fsi_is_spdif(struct fsi_priv *fsi)
344 {
345 return fsi->spdif;
346 }
347
348 static int fsi_is_play(struct snd_pcm_substream *substream)
349 {
350 return substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
351 }
352
353 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
354 {
355 struct snd_soc_pcm_runtime *rtd = substream->private_data;
356
357 return rtd->cpu_dai;
358 }
359
360 static struct fsi_priv *fsi_get_priv_frm_dai(struct snd_soc_dai *dai)
361 {
362 struct fsi_master *master = snd_soc_dai_get_drvdata(dai);
363
364 if (dai->id == 0)
365 return &master->fsia;
366 else
367 return &master->fsib;
368 }
369
370 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
371 {
372 return fsi_get_priv_frm_dai(fsi_get_dai(substream));
373 }
374
375 static set_rate_func fsi_get_info_set_rate(struct fsi_priv *fsi)
376 {
377 if (!fsi->info)
378 return NULL;
379
380 return fsi->info->set_rate;
381 }
382
383 static u32 fsi_get_info_flags(struct fsi_priv *fsi)
384 {
385 if (!fsi->info)
386 return 0;
387
388 return fsi->info->flags;
389 }
390
391 static u32 fsi_get_port_shift(struct fsi_priv *fsi, struct fsi_stream *io)
392 {
393 int is_play = fsi_stream_is_play(fsi, io);
394 int is_porta = fsi_is_port_a(fsi);
395 u32 shift;
396
397 if (is_porta)
398 shift = is_play ? AO_SHIFT : AI_SHIFT;
399 else
400 shift = is_play ? BO_SHIFT : BI_SHIFT;
401
402 return shift;
403 }
404
405 static int fsi_frame2sample(struct fsi_priv *fsi, int frames)
406 {
407 return frames * fsi->chan_num;
408 }
409
410 static int fsi_sample2frame(struct fsi_priv *fsi, int samples)
411 {
412 return samples / fsi->chan_num;
413 }
414
415 static int fsi_get_current_fifo_samples(struct fsi_priv *fsi,
416 struct fsi_stream *io)
417 {
418 int is_play = fsi_stream_is_play(fsi, io);
419 u32 status;
420 int frames;
421
422 status = is_play ?
423 fsi_reg_read(fsi, DOFF_ST) :
424 fsi_reg_read(fsi, DIFF_ST);
425
426 frames = 0x1ff & (status >> 8);
427
428 return fsi_frame2sample(fsi, frames);
429 }
430
431 static void fsi_count_fifo_err(struct fsi_priv *fsi)
432 {
433 u32 ostatus = fsi_reg_read(fsi, DOFF_ST);
434 u32 istatus = fsi_reg_read(fsi, DIFF_ST);
435
436 if (ostatus & ERR_OVER)
437 fsi->playback.oerr_num++;
438
439 if (ostatus & ERR_UNDER)
440 fsi->playback.uerr_num++;
441
442 if (istatus & ERR_OVER)
443 fsi->capture.oerr_num++;
444
445 if (istatus & ERR_UNDER)
446 fsi->capture.uerr_num++;
447
448 fsi_reg_write(fsi, DOFF_ST, 0);
449 fsi_reg_write(fsi, DIFF_ST, 0);
450 }
451
452 /*
453 * fsi_stream_xx() function
454 */
455 static inline int fsi_stream_is_play(struct fsi_priv *fsi,
456 struct fsi_stream *io)
457 {
458 return &fsi->playback == io;
459 }
460
461 static inline struct fsi_stream *fsi_stream_get(struct fsi_priv *fsi,
462 struct snd_pcm_substream *substream)
463 {
464 return fsi_is_play(substream) ? &fsi->playback : &fsi->capture;
465 }
466
467 static int fsi_stream_is_working(struct fsi_priv *fsi,
468 struct fsi_stream *io)
469 {
470 struct fsi_master *master = fsi_get_master(fsi);
471 unsigned long flags;
472 int ret;
473
474 spin_lock_irqsave(&master->lock, flags);
475 ret = !!(io->substream && io->substream->runtime);
476 spin_unlock_irqrestore(&master->lock, flags);
477
478 return ret;
479 }
480
481 static struct fsi_priv *fsi_stream_to_priv(struct fsi_stream *io)
482 {
483 return io->priv;
484 }
485
486 static void fsi_stream_init(struct fsi_priv *fsi,
487 struct fsi_stream *io,
488 struct snd_pcm_substream *substream)
489 {
490 struct snd_pcm_runtime *runtime = substream->runtime;
491 struct fsi_master *master = fsi_get_master(fsi);
492 unsigned long flags;
493
494 spin_lock_irqsave(&master->lock, flags);
495 io->substream = substream;
496 io->buff_sample_capa = fsi_frame2sample(fsi, runtime->buffer_size);
497 io->buff_sample_pos = 0;
498 io->period_samples = fsi_frame2sample(fsi, runtime->period_size);
499 io->period_pos = 0;
500 io->sample_width = samples_to_bytes(runtime, 1);
501 io->oerr_num = -1; /* ignore 1st err */
502 io->uerr_num = -1; /* ignore 1st err */
503 fsi_stream_handler_call(io, init, fsi, io);
504 spin_unlock_irqrestore(&master->lock, flags);
505 }
506
507 static void fsi_stream_quit(struct fsi_priv *fsi, struct fsi_stream *io)
508 {
509 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
510 struct fsi_master *master = fsi_get_master(fsi);
511 unsigned long flags;
512
513 spin_lock_irqsave(&master->lock, flags);
514
515 if (io->oerr_num > 0)
516 dev_err(dai->dev, "over_run = %d\n", io->oerr_num);
517
518 if (io->uerr_num > 0)
519 dev_err(dai->dev, "under_run = %d\n", io->uerr_num);
520
521 fsi_stream_handler_call(io, quit, fsi, io);
522 io->substream = NULL;
523 io->buff_sample_capa = 0;
524 io->buff_sample_pos = 0;
525 io->period_samples = 0;
526 io->period_pos = 0;
527 io->sample_width = 0;
528 io->oerr_num = 0;
529 io->uerr_num = 0;
530 spin_unlock_irqrestore(&master->lock, flags);
531 }
532
533 static int fsi_stream_transfer(struct fsi_stream *io)
534 {
535 struct fsi_priv *fsi = fsi_stream_to_priv(io);
536 if (!fsi)
537 return -EIO;
538
539 return fsi_stream_handler_call(io, transfer, fsi, io);
540 }
541
542 #define fsi_stream_start(fsi, io)\
543 fsi_stream_handler_call(io, start_stop, fsi, io, 1)
544
545 #define fsi_stream_stop(fsi, io)\
546 fsi_stream_handler_call(io, start_stop, fsi, io, 0)
547
548 static int fsi_stream_probe(struct fsi_priv *fsi)
549 {
550 struct fsi_stream *io;
551 int ret1, ret2;
552
553 io = &fsi->playback;
554 ret1 = fsi_stream_handler_call(io, probe, fsi, io);
555
556 io = &fsi->capture;
557 ret2 = fsi_stream_handler_call(io, probe, fsi, io);
558
559 if (ret1 < 0)
560 return ret1;
561 if (ret2 < 0)
562 return ret2;
563
564 return 0;
565 }
566
567 static int fsi_stream_remove(struct fsi_priv *fsi)
568 {
569 struct fsi_stream *io;
570 int ret1, ret2;
571
572 io = &fsi->playback;
573 ret1 = fsi_stream_handler_call(io, remove, fsi, io);
574
575 io = &fsi->capture;
576 ret2 = fsi_stream_handler_call(io, remove, fsi, io);
577
578 if (ret1 < 0)
579 return ret1;
580 if (ret2 < 0)
581 return ret2;
582
583 return 0;
584 }
585
586 /*
587 * irq function
588 */
589
590 static void fsi_irq_enable(struct fsi_priv *fsi, struct fsi_stream *io)
591 {
592 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
593 struct fsi_master *master = fsi_get_master(fsi);
594
595 fsi_core_mask_set(master, imsk, data, data);
596 fsi_core_mask_set(master, iemsk, data, data);
597 }
598
599 static void fsi_irq_disable(struct fsi_priv *fsi, struct fsi_stream *io)
600 {
601 u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
602 struct fsi_master *master = fsi_get_master(fsi);
603
604 fsi_core_mask_set(master, imsk, data, 0);
605 fsi_core_mask_set(master, iemsk, data, 0);
606 }
607
608 static u32 fsi_irq_get_status(struct fsi_master *master)
609 {
610 return fsi_core_read(master, int_st);
611 }
612
613 static void fsi_irq_clear_status(struct fsi_priv *fsi)
614 {
615 u32 data = 0;
616 struct fsi_master *master = fsi_get_master(fsi);
617
618 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->playback));
619 data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->capture));
620
621 /* clear interrupt factor */
622 fsi_core_mask_set(master, int_st, data, 0);
623 }
624
625 /*
626 * SPDIF master clock function
627 *
628 * These functions are used later FSI2
629 */
630 static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
631 {
632 struct fsi_master *master = fsi_get_master(fsi);
633 u32 mask, val;
634
635 mask = BP | SE;
636 val = enable ? mask : 0;
637
638 fsi_is_port_a(fsi) ?
639 fsi_core_mask_set(master, a_mclk, mask, val) :
640 fsi_core_mask_set(master, b_mclk, mask, val);
641 }
642
643 /*
644 * clock function
645 */
646 static int fsi_set_master_clk(struct device *dev, struct fsi_priv *fsi,
647 long rate, int enable)
648 {
649 set_rate_func set_rate = fsi_get_info_set_rate(fsi);
650 int ret;
651
652 if (!set_rate)
653 return 0;
654
655 ret = set_rate(dev, rate, enable);
656 if (ret < 0) /* error */
657 return ret;
658
659 if (!enable)
660 return 0;
661
662 if (ret > 0) {
663 u32 data = 0;
664
665 switch (ret & SH_FSI_ACKMD_MASK) {
666 default:
667 /* FALL THROUGH */
668 case SH_FSI_ACKMD_512:
669 data |= (0x0 << 12);
670 break;
671 case SH_FSI_ACKMD_256:
672 data |= (0x1 << 12);
673 break;
674 case SH_FSI_ACKMD_128:
675 data |= (0x2 << 12);
676 break;
677 case SH_FSI_ACKMD_64:
678 data |= (0x3 << 12);
679 break;
680 case SH_FSI_ACKMD_32:
681 data |= (0x4 << 12);
682 break;
683 }
684
685 switch (ret & SH_FSI_BPFMD_MASK) {
686 default:
687 /* FALL THROUGH */
688 case SH_FSI_BPFMD_32:
689 data |= (0x0 << 8);
690 break;
691 case SH_FSI_BPFMD_64:
692 data |= (0x1 << 8);
693 break;
694 case SH_FSI_BPFMD_128:
695 data |= (0x2 << 8);
696 break;
697 case SH_FSI_BPFMD_256:
698 data |= (0x3 << 8);
699 break;
700 case SH_FSI_BPFMD_512:
701 data |= (0x4 << 8);
702 break;
703 case SH_FSI_BPFMD_16:
704 data |= (0x7 << 8);
705 break;
706 }
707
708 fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
709 udelay(10);
710 ret = 0;
711 }
712
713 return ret;
714 }
715
716 /*
717 * pio data transfer handler
718 */
719 static void fsi_pio_push16(struct fsi_priv *fsi, u8 *_buf, int samples)
720 {
721 u16 *buf = (u16 *)_buf;
722 int i;
723
724 for (i = 0; i < samples; i++)
725 fsi_reg_write(fsi, DODT, ((u32)*(buf + i) << 8));
726 }
727
728 static void fsi_pio_pop16(struct fsi_priv *fsi, u8 *_buf, int samples)
729 {
730 u16 *buf = (u16 *)_buf;
731 int i;
732
733 for (i = 0; i < samples; i++)
734 *(buf + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8);
735 }
736
737 static void fsi_pio_push32(struct fsi_priv *fsi, u8 *_buf, int samples)
738 {
739 u32 *buf = (u32 *)_buf;
740 int i;
741
742 for (i = 0; i < samples; i++)
743 fsi_reg_write(fsi, DODT, *(buf + i));
744 }
745
746 static void fsi_pio_pop32(struct fsi_priv *fsi, u8 *_buf, int samples)
747 {
748 u32 *buf = (u32 *)_buf;
749 int i;
750
751 for (i = 0; i < samples; i++)
752 *(buf + i) = fsi_reg_read(fsi, DIDT);
753 }
754
755 static u8 *fsi_pio_get_area(struct fsi_priv *fsi, struct fsi_stream *io)
756 {
757 struct snd_pcm_runtime *runtime = io->substream->runtime;
758
759 return runtime->dma_area +
760 samples_to_bytes(runtime, io->buff_sample_pos);
761 }
762
763 static int fsi_pio_transfer(struct fsi_priv *fsi, struct fsi_stream *io,
764 void (*run16)(struct fsi_priv *fsi, u8 *buf, int samples),
765 void (*run32)(struct fsi_priv *fsi, u8 *buf, int samples),
766 int samples)
767 {
768 struct snd_pcm_runtime *runtime;
769 struct snd_pcm_substream *substream;
770 u8 *buf;
771 int over_period;
772
773 if (!fsi_stream_is_working(fsi, io))
774 return -EINVAL;
775
776 over_period = 0;
777 substream = io->substream;
778 runtime = substream->runtime;
779
780 /* FSI FIFO has limit.
781 * So, this driver can not send periods data at a time
782 */
783 if (io->buff_sample_pos >=
784 io->period_samples * (io->period_pos + 1)) {
785
786 over_period = 1;
787 io->period_pos = (io->period_pos + 1) % runtime->periods;
788
789 if (0 == io->period_pos)
790 io->buff_sample_pos = 0;
791 }
792
793 buf = fsi_pio_get_area(fsi, io);
794
795 switch (io->sample_width) {
796 case 2:
797 run16(fsi, buf, samples);
798 break;
799 case 4:
800 run32(fsi, buf, samples);
801 break;
802 default:
803 return -EINVAL;
804 }
805
806 /* update buff_sample_pos */
807 io->buff_sample_pos += samples;
808
809 if (over_period)
810 snd_pcm_period_elapsed(substream);
811
812 return 0;
813 }
814
815 static int fsi_pio_pop(struct fsi_priv *fsi, struct fsi_stream *io)
816 {
817 int sample_residues; /* samples in FSI fifo */
818 int sample_space; /* ALSA free samples space */
819 int samples;
820
821 sample_residues = fsi_get_current_fifo_samples(fsi, io);
822 sample_space = io->buff_sample_capa - io->buff_sample_pos;
823
824 samples = min(sample_residues, sample_space);
825
826 return fsi_pio_transfer(fsi, io,
827 fsi_pio_pop16,
828 fsi_pio_pop32,
829 samples);
830 }
831
832 static int fsi_pio_push(struct fsi_priv *fsi, struct fsi_stream *io)
833 {
834 int sample_residues; /* ALSA residue samples */
835 int sample_space; /* FSI fifo free samples space */
836 int samples;
837
838 sample_residues = io->buff_sample_capa - io->buff_sample_pos;
839 sample_space = io->fifo_sample_capa -
840 fsi_get_current_fifo_samples(fsi, io);
841
842 samples = min(sample_residues, sample_space);
843
844 return fsi_pio_transfer(fsi, io,
845 fsi_pio_push16,
846 fsi_pio_push32,
847 samples);
848 }
849
850 static void fsi_pio_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
851 int enable)
852 {
853 struct fsi_master *master = fsi_get_master(fsi);
854 u32 clk = fsi_is_port_a(fsi) ? CRA : CRB;
855
856 if (enable)
857 fsi_irq_enable(fsi, io);
858 else
859 fsi_irq_disable(fsi, io);
860
861 if (fsi_is_clk_master(fsi))
862 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
863 }
864
865 static struct fsi_stream_handler fsi_pio_push_handler = {
866 .transfer = fsi_pio_push,
867 .start_stop = fsi_pio_start_stop,
868 };
869
870 static struct fsi_stream_handler fsi_pio_pop_handler = {
871 .transfer = fsi_pio_pop,
872 .start_stop = fsi_pio_start_stop,
873 };
874
875 static irqreturn_t fsi_interrupt(int irq, void *data)
876 {
877 struct fsi_master *master = data;
878 u32 int_st = fsi_irq_get_status(master);
879
880 /* clear irq status */
881 fsi_master_mask_set(master, SOFT_RST, IR, 0);
882 fsi_master_mask_set(master, SOFT_RST, IR, IR);
883
884 if (int_st & AB_IO(1, AO_SHIFT))
885 fsi_stream_transfer(&master->fsia.playback);
886 if (int_st & AB_IO(1, BO_SHIFT))
887 fsi_stream_transfer(&master->fsib.playback);
888 if (int_st & AB_IO(1, AI_SHIFT))
889 fsi_stream_transfer(&master->fsia.capture);
890 if (int_st & AB_IO(1, BI_SHIFT))
891 fsi_stream_transfer(&master->fsib.capture);
892
893 fsi_count_fifo_err(&master->fsia);
894 fsi_count_fifo_err(&master->fsib);
895
896 fsi_irq_clear_status(&master->fsia);
897 fsi_irq_clear_status(&master->fsib);
898
899 return IRQ_HANDLED;
900 }
901
902 /*
903 * dma data transfer handler
904 */
905 static int fsi_dma_init(struct fsi_priv *fsi, struct fsi_stream *io)
906 {
907 struct snd_pcm_runtime *runtime = io->substream->runtime;
908 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
909 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
910 DMA_TO_DEVICE : DMA_FROM_DEVICE;
911
912 io->dma = dma_map_single(dai->dev, runtime->dma_area,
913 snd_pcm_lib_buffer_bytes(io->substream), dir);
914 return 0;
915 }
916
917 static int fsi_dma_quit(struct fsi_priv *fsi, struct fsi_stream *io)
918 {
919 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
920 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
921 DMA_TO_DEVICE : DMA_FROM_DEVICE;
922
923 dma_unmap_single(dai->dev, io->dma,
924 snd_pcm_lib_buffer_bytes(io->substream), dir);
925 return 0;
926 }
927
928 static void fsi_dma_complete(void *data)
929 {
930 struct fsi_stream *io = (struct fsi_stream *)data;
931 struct fsi_priv *fsi = fsi_stream_to_priv(io);
932 struct snd_pcm_runtime *runtime = io->substream->runtime;
933 struct snd_soc_dai *dai = fsi_get_dai(io->substream);
934 enum dma_data_direction dir = fsi_stream_is_play(fsi, io) ?
935 DMA_TO_DEVICE : DMA_FROM_DEVICE;
936
937 dma_sync_single_for_cpu(dai->dev, io->dma,
938 samples_to_bytes(runtime, io->period_samples), dir);
939
940 io->buff_sample_pos += io->period_samples;
941 io->period_pos++;
942
943 if (io->period_pos >= runtime->periods) {
944 io->period_pos = 0;
945 io->buff_sample_pos = 0;
946 }
947
948 fsi_count_fifo_err(fsi);
949 fsi_stream_transfer(io);
950
951 snd_pcm_period_elapsed(io->substream);
952 }
953
954 static dma_addr_t fsi_dma_get_area(struct fsi_stream *io)
955 {
956 struct snd_pcm_runtime *runtime = io->substream->runtime;
957
958 return io->dma + samples_to_bytes(runtime, io->buff_sample_pos);
959 }
960
961 static void fsi_dma_do_tasklet(unsigned long data)
962 {
963 struct fsi_stream *io = (struct fsi_stream *)data;
964 struct fsi_priv *fsi = fsi_stream_to_priv(io);
965 struct dma_chan *chan;
966 struct snd_soc_dai *dai;
967 struct dma_async_tx_descriptor *desc;
968 struct scatterlist sg;
969 struct snd_pcm_runtime *runtime;
970 enum dma_data_direction dir;
971 dma_cookie_t cookie;
972 int is_play = fsi_stream_is_play(fsi, io);
973 int len;
974 dma_addr_t buf;
975
976 if (!fsi_stream_is_working(fsi, io))
977 return;
978
979 dai = fsi_get_dai(io->substream);
980 chan = io->chan;
981 runtime = io->substream->runtime;
982 dir = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
983 len = samples_to_bytes(runtime, io->period_samples);
984 buf = fsi_dma_get_area(io);
985
986 dma_sync_single_for_device(dai->dev, io->dma, len, dir);
987
988 sg_init_table(&sg, 1);
989 sg_set_page(&sg, pfn_to_page(PFN_DOWN(buf)),
990 len , offset_in_page(buf));
991 sg_dma_address(&sg) = buf;
992 sg_dma_len(&sg) = len;
993
994 desc = dmaengine_prep_slave_sg(chan, &sg, 1, dir,
995 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
996 if (!desc) {
997 dev_err(dai->dev, "dmaengine_prep_slave_sg() fail\n");
998 return;
999 }
1000
1001 desc->callback = fsi_dma_complete;
1002 desc->callback_param = io;
1003
1004 cookie = desc->tx_submit(desc);
1005 if (cookie < 0) {
1006 dev_err(dai->dev, "tx_submit() fail\n");
1007 return;
1008 }
1009
1010 dma_async_issue_pending(chan);
1011
1012 /*
1013 * FIXME
1014 *
1015 * In DMAEngine case, codec and FSI cannot be started simultaneously
1016 * since FSI is using tasklet.
1017 * Therefore, in capture case, probably FSI FIFO will have got
1018 * overflow error in this point.
1019 * in that case, DMA cannot start transfer until error was cleared.
1020 */
1021 if (!is_play) {
1022 if (ERR_OVER & fsi_reg_read(fsi, DIFF_ST)) {
1023 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1024 fsi_reg_write(fsi, DIFF_ST, 0);
1025 }
1026 }
1027 }
1028
1029 static bool fsi_dma_filter(struct dma_chan *chan, void *param)
1030 {
1031 struct sh_dmae_slave *slave = param;
1032
1033 chan->private = slave;
1034
1035 return true;
1036 }
1037
1038 static int fsi_dma_transfer(struct fsi_priv *fsi, struct fsi_stream *io)
1039 {
1040 tasklet_schedule(&io->tasklet);
1041
1042 return 0;
1043 }
1044
1045 static void fsi_dma_push_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1046 int start)
1047 {
1048 u32 bws;
1049 u32 dma;
1050
1051 switch (io->sample_width * start) {
1052 case 2:
1053 bws = CR_BWS_16;
1054 dma = VDMD_STREAM | DMA_ON;
1055 break;
1056 case 4:
1057 bws = CR_BWS_24;
1058 dma = VDMD_BACK | DMA_ON;
1059 break;
1060 default:
1061 bws = 0;
1062 dma = 0;
1063 }
1064
1065 fsi_reg_mask_set(fsi, DO_FMT, CR_BWS_MASK, bws);
1066 fsi_reg_write(fsi, OUT_DMAC, dma);
1067 }
1068
1069 static int fsi_dma_probe(struct fsi_priv *fsi, struct fsi_stream *io)
1070 {
1071 dma_cap_mask_t mask;
1072
1073 dma_cap_zero(mask);
1074 dma_cap_set(DMA_SLAVE, mask);
1075
1076 io->chan = dma_request_channel(mask, fsi_dma_filter, &io->slave);
1077 if (!io->chan)
1078 return -EIO;
1079
1080 tasklet_init(&io->tasklet, fsi_dma_do_tasklet, (unsigned long)io);
1081
1082 return 0;
1083 }
1084
1085 static int fsi_dma_remove(struct fsi_priv *fsi, struct fsi_stream *io)
1086 {
1087 tasklet_kill(&io->tasklet);
1088
1089 fsi_stream_stop(fsi, io);
1090
1091 if (io->chan)
1092 dma_release_channel(io->chan);
1093
1094 io->chan = NULL;
1095 return 0;
1096 }
1097
1098 static struct fsi_stream_handler fsi_dma_push_handler = {
1099 .init = fsi_dma_init,
1100 .quit = fsi_dma_quit,
1101 .probe = fsi_dma_probe,
1102 .transfer = fsi_dma_transfer,
1103 .remove = fsi_dma_remove,
1104 .start_stop = fsi_dma_push_start_stop,
1105 };
1106
1107 /*
1108 * dai ops
1109 */
1110 static void fsi_fifo_init(struct fsi_priv *fsi,
1111 struct fsi_stream *io,
1112 struct device *dev)
1113 {
1114 struct fsi_master *master = fsi_get_master(fsi);
1115 int is_play = fsi_stream_is_play(fsi, io);
1116 u32 shift, i;
1117 int frame_capa;
1118
1119 /* get on-chip RAM capacity */
1120 shift = fsi_master_read(master, FIFO_SZ);
1121 shift >>= fsi_get_port_shift(fsi, io);
1122 shift &= FIFO_SZ_MASK;
1123 frame_capa = 256 << shift;
1124 dev_dbg(dev, "fifo = %d words\n", frame_capa);
1125
1126 /*
1127 * The maximum number of sample data varies depending
1128 * on the number of channels selected for the format.
1129 *
1130 * FIFOs are used in 4-channel units in 3-channel mode
1131 * and in 8-channel units in 5- to 7-channel mode
1132 * meaning that more FIFOs than the required size of DPRAM
1133 * are used.
1134 *
1135 * ex) if 256 words of DP-RAM is connected
1136 * 1 channel: 256 (256 x 1 = 256)
1137 * 2 channels: 128 (128 x 2 = 256)
1138 * 3 channels: 64 ( 64 x 3 = 192)
1139 * 4 channels: 64 ( 64 x 4 = 256)
1140 * 5 channels: 32 ( 32 x 5 = 160)
1141 * 6 channels: 32 ( 32 x 6 = 192)
1142 * 7 channels: 32 ( 32 x 7 = 224)
1143 * 8 channels: 32 ( 32 x 8 = 256)
1144 */
1145 for (i = 1; i < fsi->chan_num; i <<= 1)
1146 frame_capa >>= 1;
1147 dev_dbg(dev, "%d channel %d store\n",
1148 fsi->chan_num, frame_capa);
1149
1150 io->fifo_sample_capa = fsi_frame2sample(fsi, frame_capa);
1151
1152 /*
1153 * set interrupt generation factor
1154 * clear FIFO
1155 */
1156 if (is_play) {
1157 fsi_reg_write(fsi, DOFF_CTL, IRQ_HALF);
1158 fsi_reg_mask_set(fsi, DOFF_CTL, FIFO_CLR, FIFO_CLR);
1159 } else {
1160 fsi_reg_write(fsi, DIFF_CTL, IRQ_HALF);
1161 fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1162 }
1163 }
1164
1165 static int fsi_hw_startup(struct fsi_priv *fsi,
1166 struct fsi_stream *io,
1167 struct device *dev)
1168 {
1169 struct fsi_master *master = fsi_get_master(fsi);
1170 u32 flags = fsi_get_info_flags(fsi);
1171 u32 data = 0;
1172
1173 /* clock setting */
1174 if (fsi_is_clk_master(fsi))
1175 data = DIMD | DOMD;
1176
1177 fsi_reg_mask_set(fsi, CKG1, (DIMD | DOMD), data);
1178
1179 /* clock inversion (CKG2) */
1180 data = 0;
1181 if (SH_FSI_LRM_INV & flags)
1182 data |= 1 << 12;
1183 if (SH_FSI_BRM_INV & flags)
1184 data |= 1 << 8;
1185 if (SH_FSI_LRS_INV & flags)
1186 data |= 1 << 4;
1187 if (SH_FSI_BRS_INV & flags)
1188 data |= 1 << 0;
1189
1190 fsi_reg_write(fsi, CKG2, data);
1191
1192 /* set format */
1193 fsi_reg_write(fsi, DO_FMT, fsi->fmt);
1194 fsi_reg_write(fsi, DI_FMT, fsi->fmt);
1195
1196 /* spdif ? */
1197 if (fsi_is_spdif(fsi)) {
1198 fsi_spdif_clk_ctrl(fsi, 1);
1199 fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD);
1200 }
1201
1202 /*
1203 * FIXME
1204 *
1205 * FSI driver assumed that data package is in-back.
1206 * FSI2 chip can select it.
1207 */
1208 if (fsi_version(master) >= 2) {
1209 fsi_reg_write(fsi, OUT_DMAC, VDMD_BACK);
1210 fsi_reg_write(fsi, IN_DMAC, VDMD_BACK);
1211 }
1212
1213 /* irq clear */
1214 fsi_irq_disable(fsi, io);
1215 fsi_irq_clear_status(fsi);
1216
1217 /* fifo init */
1218 fsi_fifo_init(fsi, io, dev);
1219
1220 return 0;
1221 }
1222
1223 static void fsi_hw_shutdown(struct fsi_priv *fsi,
1224 struct device *dev)
1225 {
1226 if (fsi_is_clk_master(fsi))
1227 fsi_set_master_clk(dev, fsi, fsi->rate, 0);
1228 }
1229
1230 static int fsi_dai_startup(struct snd_pcm_substream *substream,
1231 struct snd_soc_dai *dai)
1232 {
1233 struct fsi_priv *fsi = fsi_get_priv(substream);
1234
1235 return fsi_hw_startup(fsi, fsi_stream_get(fsi, substream), dai->dev);
1236 }
1237
1238 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
1239 struct snd_soc_dai *dai)
1240 {
1241 struct fsi_priv *fsi = fsi_get_priv(substream);
1242
1243 fsi_hw_shutdown(fsi, dai->dev);
1244 fsi->rate = 0;
1245 }
1246
1247 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
1248 struct snd_soc_dai *dai)
1249 {
1250 struct fsi_priv *fsi = fsi_get_priv(substream);
1251 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1252 int ret = 0;
1253
1254 switch (cmd) {
1255 case SNDRV_PCM_TRIGGER_START:
1256 fsi_stream_init(fsi, io, substream);
1257 ret = fsi_stream_transfer(io);
1258 if (0 == ret)
1259 fsi_stream_start(fsi, io);
1260 break;
1261 case SNDRV_PCM_TRIGGER_STOP:
1262 fsi_stream_stop(fsi, io);
1263 fsi_stream_quit(fsi, io);
1264 break;
1265 }
1266
1267 return ret;
1268 }
1269
1270 static int fsi_set_fmt_dai(struct fsi_priv *fsi, unsigned int fmt)
1271 {
1272 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1273 case SND_SOC_DAIFMT_I2S:
1274 fsi->fmt = CR_I2S;
1275 fsi->chan_num = 2;
1276 break;
1277 case SND_SOC_DAIFMT_LEFT_J:
1278 fsi->fmt = CR_PCM;
1279 fsi->chan_num = 2;
1280 break;
1281 default:
1282 return -EINVAL;
1283 }
1284
1285 return 0;
1286 }
1287
1288 static int fsi_set_fmt_spdif(struct fsi_priv *fsi)
1289 {
1290 struct fsi_master *master = fsi_get_master(fsi);
1291
1292 if (fsi_version(master) < 2)
1293 return -EINVAL;
1294
1295 fsi->fmt = CR_BWS_16 | CR_DTMD_SPDIF_PCM | CR_PCM;
1296 fsi->chan_num = 2;
1297 fsi->spdif = 1;
1298
1299 return 0;
1300 }
1301
1302 static int fsi_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1303 {
1304 struct fsi_priv *fsi = fsi_get_priv_frm_dai(dai);
1305 set_rate_func set_rate = fsi_get_info_set_rate(fsi);
1306 u32 flags = fsi_get_info_flags(fsi);
1307 int ret;
1308
1309 /* set master/slave audio interface */
1310 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1311 case SND_SOC_DAIFMT_CBM_CFM:
1312 fsi->clk_master = 1;
1313 break;
1314 case SND_SOC_DAIFMT_CBS_CFS:
1315 break;
1316 default:
1317 return -EINVAL;
1318 }
1319
1320 if (fsi_is_clk_master(fsi) && !set_rate) {
1321 dev_err(dai->dev, "platform doesn't have set_rate\n");
1322 return -EINVAL;
1323 }
1324
1325 /* set format */
1326 switch (flags & SH_FSI_FMT_MASK) {
1327 case SH_FSI_FMT_DAI:
1328 ret = fsi_set_fmt_dai(fsi, fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1329 break;
1330 case SH_FSI_FMT_SPDIF:
1331 ret = fsi_set_fmt_spdif(fsi);
1332 break;
1333 default:
1334 ret = -EINVAL;
1335 }
1336
1337 return ret;
1338 }
1339
1340 static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
1341 struct snd_pcm_hw_params *params,
1342 struct snd_soc_dai *dai)
1343 {
1344 struct fsi_priv *fsi = fsi_get_priv(substream);
1345 long rate = params_rate(params);
1346 int ret;
1347
1348 if (!fsi_is_clk_master(fsi))
1349 return 0;
1350
1351 ret = fsi_set_master_clk(dai->dev, fsi, rate, 1);
1352 if (ret < 0)
1353 return ret;
1354
1355 fsi->rate = rate;
1356
1357 return ret;
1358 }
1359
1360 static const struct snd_soc_dai_ops fsi_dai_ops = {
1361 .startup = fsi_dai_startup,
1362 .shutdown = fsi_dai_shutdown,
1363 .trigger = fsi_dai_trigger,
1364 .set_fmt = fsi_dai_set_fmt,
1365 .hw_params = fsi_dai_hw_params,
1366 };
1367
1368 /*
1369 * pcm ops
1370 */
1371
1372 static struct snd_pcm_hardware fsi_pcm_hardware = {
1373 .info = SNDRV_PCM_INFO_INTERLEAVED |
1374 SNDRV_PCM_INFO_MMAP |
1375 SNDRV_PCM_INFO_MMAP_VALID |
1376 SNDRV_PCM_INFO_PAUSE,
1377 .formats = FSI_FMTS,
1378 .rates = FSI_RATES,
1379 .rate_min = 8000,
1380 .rate_max = 192000,
1381 .channels_min = 1,
1382 .channels_max = 2,
1383 .buffer_bytes_max = 64 * 1024,
1384 .period_bytes_min = 32,
1385 .period_bytes_max = 8192,
1386 .periods_min = 1,
1387 .periods_max = 32,
1388 .fifo_size = 256,
1389 };
1390
1391 static int fsi_pcm_open(struct snd_pcm_substream *substream)
1392 {
1393 struct snd_pcm_runtime *runtime = substream->runtime;
1394 int ret = 0;
1395
1396 snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
1397
1398 ret = snd_pcm_hw_constraint_integer(runtime,
1399 SNDRV_PCM_HW_PARAM_PERIODS);
1400
1401 return ret;
1402 }
1403
1404 static int fsi_hw_params(struct snd_pcm_substream *substream,
1405 struct snd_pcm_hw_params *hw_params)
1406 {
1407 return snd_pcm_lib_malloc_pages(substream,
1408 params_buffer_bytes(hw_params));
1409 }
1410
1411 static int fsi_hw_free(struct snd_pcm_substream *substream)
1412 {
1413 return snd_pcm_lib_free_pages(substream);
1414 }
1415
1416 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
1417 {
1418 struct fsi_priv *fsi = fsi_get_priv(substream);
1419 struct fsi_stream *io = fsi_stream_get(fsi, substream);
1420
1421 return fsi_sample2frame(fsi, io->buff_sample_pos);
1422 }
1423
1424 static struct snd_pcm_ops fsi_pcm_ops = {
1425 .open = fsi_pcm_open,
1426 .ioctl = snd_pcm_lib_ioctl,
1427 .hw_params = fsi_hw_params,
1428 .hw_free = fsi_hw_free,
1429 .pointer = fsi_pointer,
1430 };
1431
1432 /*
1433 * snd_soc_platform
1434 */
1435
1436 #define PREALLOC_BUFFER (32 * 1024)
1437 #define PREALLOC_BUFFER_MAX (32 * 1024)
1438
1439 static void fsi_pcm_free(struct snd_pcm *pcm)
1440 {
1441 snd_pcm_lib_preallocate_free_for_all(pcm);
1442 }
1443
1444 static int fsi_pcm_new(struct snd_soc_pcm_runtime *rtd)
1445 {
1446 struct snd_pcm *pcm = rtd->pcm;
1447
1448 /*
1449 * dont use SNDRV_DMA_TYPE_DEV, since it will oops the SH kernel
1450 * in MMAP mode (i.e. aplay -M)
1451 */
1452 return snd_pcm_lib_preallocate_pages_for_all(
1453 pcm,
1454 SNDRV_DMA_TYPE_CONTINUOUS,
1455 snd_dma_continuous_data(GFP_KERNEL),
1456 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
1457 }
1458
1459 /*
1460 * alsa struct
1461 */
1462
1463 static struct snd_soc_dai_driver fsi_soc_dai[] = {
1464 {
1465 .name = "fsia-dai",
1466 .playback = {
1467 .rates = FSI_RATES,
1468 .formats = FSI_FMTS,
1469 .channels_min = 1,
1470 .channels_max = 8,
1471 },
1472 .capture = {
1473 .rates = FSI_RATES,
1474 .formats = FSI_FMTS,
1475 .channels_min = 1,
1476 .channels_max = 8,
1477 },
1478 .ops = &fsi_dai_ops,
1479 },
1480 {
1481 .name = "fsib-dai",
1482 .playback = {
1483 .rates = FSI_RATES,
1484 .formats = FSI_FMTS,
1485 .channels_min = 1,
1486 .channels_max = 8,
1487 },
1488 .capture = {
1489 .rates = FSI_RATES,
1490 .formats = FSI_FMTS,
1491 .channels_min = 1,
1492 .channels_max = 8,
1493 },
1494 .ops = &fsi_dai_ops,
1495 },
1496 };
1497
1498 static struct snd_soc_platform_driver fsi_soc_platform = {
1499 .ops = &fsi_pcm_ops,
1500 .pcm_new = fsi_pcm_new,
1501 .pcm_free = fsi_pcm_free,
1502 };
1503
1504 /*
1505 * platform function
1506 */
1507 static void fsi_handler_init(struct fsi_priv *fsi)
1508 {
1509 fsi->playback.handler = &fsi_pio_push_handler; /* default PIO */
1510 fsi->playback.priv = fsi;
1511 fsi->capture.handler = &fsi_pio_pop_handler; /* default PIO */
1512 fsi->capture.priv = fsi;
1513
1514 if (fsi->info->tx_id) {
1515 fsi->playback.slave.slave_id = fsi->info->tx_id;
1516 fsi->playback.handler = &fsi_dma_push_handler;
1517 }
1518 }
1519
1520 static int fsi_probe(struct platform_device *pdev)
1521 {
1522 struct fsi_master *master;
1523 const struct platform_device_id *id_entry;
1524 struct sh_fsi_platform_info *info = pdev->dev.platform_data;
1525 struct resource *res;
1526 unsigned int irq;
1527 int ret;
1528
1529 id_entry = pdev->id_entry;
1530 if (!id_entry) {
1531 dev_err(&pdev->dev, "unknown fsi device\n");
1532 return -ENODEV;
1533 }
1534
1535 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1536 irq = platform_get_irq(pdev, 0);
1537 if (!res || (int)irq <= 0) {
1538 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
1539 ret = -ENODEV;
1540 goto exit;
1541 }
1542
1543 master = kzalloc(sizeof(*master), GFP_KERNEL);
1544 if (!master) {
1545 dev_err(&pdev->dev, "Could not allocate master\n");
1546 ret = -ENOMEM;
1547 goto exit;
1548 }
1549
1550 master->base = ioremap_nocache(res->start, resource_size(res));
1551 if (!master->base) {
1552 ret = -ENXIO;
1553 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
1554 goto exit_kfree;
1555 }
1556
1557 /* master setting */
1558 master->irq = irq;
1559 master->core = (struct fsi_core *)id_entry->driver_data;
1560 spin_lock_init(&master->lock);
1561
1562 /* FSI A setting */
1563 master->fsia.base = master->base;
1564 master->fsia.master = master;
1565 master->fsia.info = &info->port_a;
1566 fsi_handler_init(&master->fsia);
1567 ret = fsi_stream_probe(&master->fsia);
1568 if (ret < 0) {
1569 dev_err(&pdev->dev, "FSIA stream probe failed\n");
1570 goto exit_iounmap;
1571 }
1572
1573 /* FSI B setting */
1574 master->fsib.base = master->base + 0x40;
1575 master->fsib.master = master;
1576 master->fsib.info = &info->port_b;
1577 fsi_handler_init(&master->fsib);
1578 ret = fsi_stream_probe(&master->fsib);
1579 if (ret < 0) {
1580 dev_err(&pdev->dev, "FSIB stream probe failed\n");
1581 goto exit_fsia;
1582 }
1583
1584 pm_runtime_enable(&pdev->dev);
1585 dev_set_drvdata(&pdev->dev, master);
1586
1587 ret = request_irq(irq, &fsi_interrupt, 0,
1588 id_entry->name, master);
1589 if (ret) {
1590 dev_err(&pdev->dev, "irq request err\n");
1591 goto exit_fsib;
1592 }
1593
1594 ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform);
1595 if (ret < 0) {
1596 dev_err(&pdev->dev, "cannot snd soc register\n");
1597 goto exit_free_irq;
1598 }
1599
1600 ret = snd_soc_register_dais(&pdev->dev, fsi_soc_dai,
1601 ARRAY_SIZE(fsi_soc_dai));
1602 if (ret < 0) {
1603 dev_err(&pdev->dev, "cannot snd dai register\n");
1604 goto exit_snd_soc;
1605 }
1606
1607 return ret;
1608
1609 exit_snd_soc:
1610 snd_soc_unregister_platform(&pdev->dev);
1611 exit_free_irq:
1612 free_irq(irq, master);
1613 exit_fsib:
1614 fsi_stream_remove(&master->fsib);
1615 exit_fsia:
1616 fsi_stream_remove(&master->fsia);
1617 exit_iounmap:
1618 iounmap(master->base);
1619 pm_runtime_disable(&pdev->dev);
1620 exit_kfree:
1621 kfree(master);
1622 master = NULL;
1623 exit:
1624 return ret;
1625 }
1626
1627 static int fsi_remove(struct platform_device *pdev)
1628 {
1629 struct fsi_master *master;
1630
1631 master = dev_get_drvdata(&pdev->dev);
1632
1633 free_irq(master->irq, master);
1634 pm_runtime_disable(&pdev->dev);
1635
1636 snd_soc_unregister_dais(&pdev->dev, ARRAY_SIZE(fsi_soc_dai));
1637 snd_soc_unregister_platform(&pdev->dev);
1638
1639 fsi_stream_remove(&master->fsia);
1640 fsi_stream_remove(&master->fsib);
1641
1642 iounmap(master->base);
1643 kfree(master);
1644
1645 return 0;
1646 }
1647
1648 static void __fsi_suspend(struct fsi_priv *fsi,
1649 struct fsi_stream *io,
1650 struct device *dev)
1651 {
1652 if (!fsi_stream_is_working(fsi, io))
1653 return;
1654
1655 fsi_stream_stop(fsi, io);
1656 fsi_hw_shutdown(fsi, dev);
1657 }
1658
1659 static void __fsi_resume(struct fsi_priv *fsi,
1660 struct fsi_stream *io,
1661 struct device *dev)
1662 {
1663 if (!fsi_stream_is_working(fsi, io))
1664 return;
1665
1666 fsi_hw_startup(fsi, io, dev);
1667
1668 if (fsi_is_clk_master(fsi) && fsi->rate)
1669 fsi_set_master_clk(dev, fsi, fsi->rate, 1);
1670
1671 fsi_stream_start(fsi, io);
1672 }
1673
1674 static int fsi_suspend(struct device *dev)
1675 {
1676 struct fsi_master *master = dev_get_drvdata(dev);
1677 struct fsi_priv *fsia = &master->fsia;
1678 struct fsi_priv *fsib = &master->fsib;
1679
1680 __fsi_suspend(fsia, &fsia->playback, dev);
1681 __fsi_suspend(fsia, &fsia->capture, dev);
1682
1683 __fsi_suspend(fsib, &fsib->playback, dev);
1684 __fsi_suspend(fsib, &fsib->capture, dev);
1685
1686 return 0;
1687 }
1688
1689 static int fsi_resume(struct device *dev)
1690 {
1691 struct fsi_master *master = dev_get_drvdata(dev);
1692 struct fsi_priv *fsia = &master->fsia;
1693 struct fsi_priv *fsib = &master->fsib;
1694
1695 __fsi_resume(fsia, &fsia->playback, dev);
1696 __fsi_resume(fsia, &fsia->capture, dev);
1697
1698 __fsi_resume(fsib, &fsib->playback, dev);
1699 __fsi_resume(fsib, &fsib->capture, dev);
1700
1701 return 0;
1702 }
1703
1704 static struct dev_pm_ops fsi_pm_ops = {
1705 .suspend = fsi_suspend,
1706 .resume = fsi_resume,
1707 };
1708
1709 static struct fsi_core fsi1_core = {
1710 .ver = 1,
1711
1712 /* Interrupt */
1713 .int_st = INT_ST,
1714 .iemsk = IEMSK,
1715 .imsk = IMSK,
1716 };
1717
1718 static struct fsi_core fsi2_core = {
1719 .ver = 2,
1720
1721 /* Interrupt */
1722 .int_st = CPU_INT_ST,
1723 .iemsk = CPU_IEMSK,
1724 .imsk = CPU_IMSK,
1725 .a_mclk = A_MST_CTLR,
1726 .b_mclk = B_MST_CTLR,
1727 };
1728
1729 static struct platform_device_id fsi_id_table[] = {
1730 { "sh_fsi", (kernel_ulong_t)&fsi1_core },
1731 { "sh_fsi2", (kernel_ulong_t)&fsi2_core },
1732 {},
1733 };
1734 MODULE_DEVICE_TABLE(platform, fsi_id_table);
1735
1736 static struct platform_driver fsi_driver = {
1737 .driver = {
1738 .name = "fsi-pcm-audio",
1739 .pm = &fsi_pm_ops,
1740 },
1741 .probe = fsi_probe,
1742 .remove = fsi_remove,
1743 .id_table = fsi_id_table,
1744 };
1745
1746 module_platform_driver(fsi_driver);
1747
1748 MODULE_LICENSE("GPL");
1749 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
1750 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
1751 MODULE_ALIAS("platform:fsi-pcm-audio");
Linux kernel - Deliverables
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