sound/soc/soc-cache.c

   1 /*
   2  * soc-cache.c  --  ASoC register cache helpers
   3  *
   4  * Copyright 2009 Wolfson Microelectronics PLC.
   5  *
   6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
   7  *
   8  *  This program is free software; you can redistribute  it and/or modify it
   9  *  under  the terms of  the GNU General  Public License as published by the
  10  *  Free Software Foundation;  either version 2 of the  License, or (at your
  11  *  option) any later version.
  12  */
  13
  14 #include <linux/i2c.h>
  15 #include <linux/spi/spi.h>
  16 #include <sound/soc.h>
  17
  18 static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
  19                                      unsigned int reg)
  20 {
  21         u16 *cache = codec->reg_cache;
  22
  23         if (reg >= codec->driver->reg_cache_size ||
  24                 snd_soc_codec_volatile_register(codec, reg)) {
  25                         if (codec->cache_only)
  26                                 return -1;
  27
  28                         return codec->hw_read(codec, reg);
  29         }
  30
  31         return cache[reg];
  32 }
  33
  34 static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
  35                              unsigned int value)
  36 {
  37         u16 *cache = codec->reg_cache;
  38         u8 data[2];
  39         int ret;
  40
  41         data[0] = (reg << 4) | ((value >> 8) & 0x000f);
  42         data[1] = value & 0x00ff;
  43
  44         if (!snd_soc_codec_volatile_register(codec, reg) &&
  45                 reg < codec->driver->reg_cache_size)
  46                         cache[reg] = value;
  47
  48         if (codec->cache_only) {
  49                 codec->cache_sync = 1;
  50                 return 0;
  51         }
  52
  53         ret = codec->hw_write(codec->control_data, data, 2);
  54         if (ret == 2)
  55                 return 0;
  56         if (ret < 0)
  57                 return ret;
  58         else
  59                 return -EIO;
  60 }
  61
  62 #if defined(CONFIG_SPI_MASTER)
  63 static int snd_soc_4_12_spi_write(void *control_data, const char *data,
  64                                  int len)
  65 {
  66         struct spi_device *spi = control_data;
  67         struct spi_transfer t;
  68         struct spi_message m;
  69         u8 msg[2];
  70
  71         if (len <= 0)
  72                 return 0;
  73
  74         msg[0] = data[1];
  75         msg[1] = data[0];
  76
  77         spi_message_init(&m);
  78         memset(&t, 0, (sizeof t));
  79
  80         t.tx_buf = &msg[0];
  81         t.len = len;
  82
  83         spi_message_add_tail(&t, &m);
  84         spi_sync(spi, &m);
  85
  86         return len;
  87 }
  88 #else
  89 #define snd_soc_4_12_spi_write NULL
  90 #endif
  91
  92 static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
  93                                      unsigned int reg)
  94 {
  95         u16 *cache = codec->reg_cache;
  96
  97         if (reg >= codec->driver->reg_cache_size ||
  98                 snd_soc_codec_volatile_register(codec, reg)) {
  99                         if (codec->cache_only)
 100                                 return -1;
 101
 102                         return codec->hw_read(codec, reg);
 103         }
 104
 105         return cache[reg];
 106 }
 107
 108 static int snd_soc_7_9_write(struct snd_soc_codec *codec, unsigned int reg,
 109                              unsigned int value)
 110 {
 111         u16 *cache = codec->reg_cache;
 112         u8 data[2];
 113         int ret;
 114
 115         data[0] = (reg << 1) | ((value >> 8) & 0x0001);
 116         data[1] = value & 0x00ff;
 117
 118         if (!snd_soc_codec_volatile_register(codec, reg) &&
 119                 reg < codec->driver->reg_cache_size)
 120                         cache[reg] = value;
 121
 122         if (codec->cache_only) {
 123                 codec->cache_sync = 1;
 124                 return 0;
 125         }
 126
 127         ret = codec->hw_write(codec->control_data, data, 2);
 128         if (ret == 2)
 129                 return 0;
 130         if (ret < 0)
 131                 return ret;
 132         else
 133                 return -EIO;
 134 }
 135
 136 #if defined(CONFIG_SPI_MASTER)
 137 static int snd_soc_7_9_spi_write(void *control_data, const char *data,
 138                                  int len)
 139 {
 140         struct spi_device *spi = control_data;
 141         struct spi_transfer t;
 142         struct spi_message m;
 143         u8 msg[2];
 144
 145         if (len <= 0)
 146                 return 0;
 147
 148         msg[0] = data[0];
 149         msg[1] = data[1];
 150
 151         spi_message_init(&m);
 152         memset(&t, 0, (sizeof t));
 153
 154         t.tx_buf = &msg[0];
 155         t.len = len;
 156
 157         spi_message_add_tail(&t, &m);
 158         spi_sync(spi, &m);
 159
 160         return len;
 161 }
 162 #else
 163 #define snd_soc_7_9_spi_write NULL
 164 #endif
 165
 166 static int snd_soc_8_8_write(struct snd_soc_codec *codec, unsigned int reg,
 167                              unsigned int value)
 168 {
 169         u8 *cache = codec->reg_cache;
 170         u8 data[2];
 171
 172         reg &= 0xff;
 173         data[0] = reg;
 174         data[1] = value & 0xff;
 175
 176         if (!snd_soc_codec_volatile_register(codec, reg) &&
 177                 reg < codec->driver->reg_cache_size)
 178                         cache[reg] = value;
 179
 180         if (codec->cache_only) {
 181                 codec->cache_sync = 1;
 182                 return 0;
 183         }
 184
 185         if (codec->hw_write(codec->control_data, data, 2) == 2)
 186                 return 0;
 187         else
 188                 return -EIO;
 189 }
 190
 191 static unsigned int snd_soc_8_8_read(struct snd_soc_codec *codec,
 192                                      unsigned int reg)
 193 {
 194         u8 *cache = codec->reg_cache;
 195
 196         reg &= 0xff;
 197         if (reg >= codec->driver->reg_cache_size ||
 198                 snd_soc_codec_volatile_register(codec, reg)) {
 199                         if (codec->cache_only)
 200                                 return -1;
 201
 202                         return codec->hw_read(codec, reg);
 203         }
 204
 205         return cache[reg];
 206 }
 207
 208 #if defined(CONFIG_SPI_MASTER)
 209 static int snd_soc_8_8_spi_write(void *control_data, const char *data,
 210                                  int len)
 211 {
 212         struct spi_device *spi = control_data;
 213         struct spi_transfer t;
 214         struct spi_message m;
 215         u8 msg[2];
 216
 217         if (len <= 0)
 218                 return 0;
 219
 220         msg[0] = data[0];
 221         msg[1] = data[1];
 222
 223         spi_message_init(&m);
 224         memset(&t, 0, (sizeof t));
 225
 226         t.tx_buf = &msg[0];
 227         t.len = len;
 228
 229         spi_message_add_tail(&t, &m);
 230         spi_sync(spi, &m);
 231
 232         return len;
 233 }
 234 #else
 235 #define snd_soc_8_8_spi_write NULL
 236 #endif
 237
 238 static int snd_soc_8_16_write(struct snd_soc_codec *codec, unsigned int reg,
 239                               unsigned int value)
 240 {
 241         u16 *reg_cache = codec->reg_cache;
 242         u8 data[3];
 243
 244         data[0] = reg;
 245         data[1] = (value >> 8) & 0xff;
 246         data[2] = value & 0xff;
 247
 248         if (!snd_soc_codec_volatile_register(codec, reg) &&
 249             reg < codec->driver->reg_cache_size)
 250                 reg_cache[reg] = value;
 251
 252         if (codec->cache_only) {
 253                 codec->cache_sync = 1;
 254                 return 0;
 255         }
 256
 257         if (codec->hw_write(codec->control_data, data, 3) == 3)
 258                 return 0;
 259         else
 260                 return -EIO;
 261 }
 262
 263 static unsigned int snd_soc_8_16_read(struct snd_soc_codec *codec,
 264                                       unsigned int reg)
 265 {
 266         u16 *cache = codec->reg_cache;
 267
 268         if (reg >= codec->driver->reg_cache_size ||
 269             snd_soc_codec_volatile_register(codec, reg)) {
 270                 if (codec->cache_only)
 271                         return -1;
 272
 273                 return codec->hw_read(codec, reg);
 274         } else {
 275                 return cache[reg];
 276         }
 277 }
 278
 279 #if defined(CONFIG_SPI_MASTER)
 280 static int snd_soc_8_16_spi_write(void *control_data, const char *data,
 281                                  int len)
 282 {
 283         struct spi_device *spi = control_data;
 284         struct spi_transfer t;
 285         struct spi_message m;
 286         u8 msg[3];
 287
 288         if (len <= 0)
 289                 return 0;
 290
 291         msg[0] = data[0];
 292         msg[1] = data[1];
 293         msg[2] = data[2];
 294
 295         spi_message_init(&m);
 296         memset(&t, 0, (sizeof t));
 297
 298         t.tx_buf = &msg[0];
 299         t.len = len;
 300
 301         spi_message_add_tail(&t, &m);
 302         spi_sync(spi, &m);
 303
 304         return len;
 305 }
 306 #else
 307 #define snd_soc_8_16_spi_write NULL
 308 #endif
 309
 310 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
 311 static unsigned int snd_soc_8_8_read_i2c(struct snd_soc_codec *codec,
 312                                           unsigned int r)
 313 {
 314         struct i2c_msg xfer[2];
 315         u8 reg = r;
 316         u8 data;
 317         int ret;
 318         struct i2c_client *client = codec->control_data;
 319
 320         /* Write register */
 321         xfer[0].addr = client->addr;
 322         xfer[0].flags = 0;
 323         xfer[0].len = 1;
 324         xfer[0].buf = &reg;
 325
 326         /* Read data */
 327         xfer[1].addr = client->addr;
 328         xfer[1].flags = I2C_M_RD;
 329         xfer[1].len = 1;
 330         xfer[1].buf = &data;
 331
 332         ret = i2c_transfer(client->adapter, xfer, 2);
 333         if (ret != 2) {
 334                 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
 335                 return 0;
 336         }
 337
 338         return data;
 339 }
 340 #else
 341 #define snd_soc_8_8_read_i2c NULL
 342 #endif
 343
 344 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
 345 static unsigned int snd_soc_8_16_read_i2c(struct snd_soc_codec *codec,
 346                                           unsigned int r)
 347 {
 348         struct i2c_msg xfer[2];
 349         u8 reg = r;
 350         u16 data;
 351         int ret;
 352         struct i2c_client *client = codec->control_data;
 353
 354         /* Write register */
 355         xfer[0].addr = client->addr;
 356         xfer[0].flags = 0;
 357         xfer[0].len = 1;
 358         xfer[0].buf = &reg;
 359
 360         /* Read data */
 361         xfer[1].addr = client->addr;
 362         xfer[1].flags = I2C_M_RD;
 363         xfer[1].len = 2;
 364         xfer[1].buf = (u8 *)&data;
 365
 366         ret = i2c_transfer(client->adapter, xfer, 2);
 367         if (ret != 2) {
 368                 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
 369                 return 0;
 370         }
 371
 372         return (data >> 8) | ((data & 0xff) << 8);
 373 }
 374 #else
 375 #define snd_soc_8_16_read_i2c NULL
 376 #endif
 377
 378 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
 379 static unsigned int snd_soc_16_8_read_i2c(struct snd_soc_codec *codec,
 380                                           unsigned int r)
 381 {
 382         struct i2c_msg xfer[2];
 383         u16 reg = r;
 384         u8 data;
 385         int ret;
 386         struct i2c_client *client = codec->control_data;
 387
 388         /* Write register */
 389         xfer[0].addr = client->addr;
 390         xfer[0].flags = 0;
 391         xfer[0].len = 2;
 392         xfer[0].buf = (u8 *)&reg;
 393
 394         /* Read data */
 395         xfer[1].addr = client->addr;
 396         xfer[1].flags = I2C_M_RD;
 397         xfer[1].len = 1;
 398         xfer[1].buf = &data;
 399
 400         ret = i2c_transfer(client->adapter, xfer, 2);
 401         if (ret != 2) {
 402                 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
 403                 return 0;
 404         }
 405
 406         return data;
 407 }
 408 #else
 409 #define snd_soc_16_8_read_i2c NULL
 410 #endif
 411
 412 static unsigned int snd_soc_16_8_read(struct snd_soc_codec *codec,
 413                                      unsigned int reg)
 414 {
 415         u8 *cache = codec->reg_cache;
 416
 417         reg &= 0xff;
 418         if (reg >= codec->driver->reg_cache_size ||
 419                 snd_soc_codec_volatile_register(codec, reg)) {
 420                         if (codec->cache_only)
 421                                 return -1;
 422
 423                         return codec->hw_read(codec, reg);
 424         }
 425
 426         return cache[reg];
 427 }
 428
 429 static int snd_soc_16_8_write(struct snd_soc_codec *codec, unsigned int reg,
 430                              unsigned int value)
 431 {
 432         u8 *cache = codec->reg_cache;
 433         u8 data[3];
 434         int ret;
 435
 436         data[0] = (reg >> 8) & 0xff;
 437         data[1] = reg & 0xff;
 438         data[2] = value;
 439
 440         reg &= 0xff;
 441         if (!snd_soc_codec_volatile_register(codec, reg) &&
 442                 reg < codec->driver->reg_cache_size)
 443                         cache[reg] = value;
 444
 445         if (codec->cache_only) {
 446                 codec->cache_sync = 1;
 447                 return 0;
 448         }
 449
 450         ret = codec->hw_write(codec->control_data, data, 3);
 451         if (ret == 3)
 452                 return 0;
 453         if (ret < 0)
 454                 return ret;
 455         else
 456                 return -EIO;
 457 }
 458
 459 #if defined(CONFIG_SPI_MASTER)
 460 static int snd_soc_16_8_spi_write(void *control_data, const char *data,
 461                                  int len)
 462 {
 463         struct spi_device *spi = control_data;
 464         struct spi_transfer t;
 465         struct spi_message m;
 466         u8 msg[3];
 467
 468         if (len <= 0)
 469                 return 0;
 470
 471         msg[0] = data[0];
 472         msg[1] = data[1];
 473         msg[2] = data[2];
 474
 475         spi_message_init(&m);
 476         memset(&t, 0, (sizeof t));
 477
 478         t.tx_buf = &msg[0];
 479         t.len = len;
 480
 481         spi_message_add_tail(&t, &m);
 482         spi_sync(spi, &m);
 483
 484         return len;
 485 }
 486 #else
 487 #define snd_soc_16_8_spi_write NULL
 488 #endif
 489
 490 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
 491 static unsigned int snd_soc_16_16_read_i2c(struct snd_soc_codec *codec,
 492                                            unsigned int r)
 493 {
 494         struct i2c_msg xfer[2];
 495         u16 reg = cpu_to_be16(r);
 496         u16 data;
 497         int ret;
 498         struct i2c_client *client = codec->control_data;
 499
 500         /* Write register */
 501         xfer[0].addr = client->addr;
 502         xfer[0].flags = 0;
 503         xfer[0].len = 2;
 504         xfer[0].buf = (u8 *)&reg;
 505
 506         /* Read data */
 507         xfer[1].addr = client->addr;
 508         xfer[1].flags = I2C_M_RD;
 509         xfer[1].len = 2;
 510         xfer[1].buf = (u8 *)&data;
 511
 512         ret = i2c_transfer(client->adapter, xfer, 2);
 513         if (ret != 2) {
 514                 dev_err(&client->dev, "i2c_transfer() returned %d\n", ret);
 515                 return 0;
 516         }
 517
 518         return be16_to_cpu(data);
 519 }
 520 #else
 521 #define snd_soc_16_16_read_i2c NULL
 522 #endif
 523
 524 static unsigned int snd_soc_16_16_read(struct snd_soc_codec *codec,
 525                                        unsigned int reg)
 526 {
 527         u16 *cache = codec->reg_cache;
 528
 529         if (reg >= codec->driver->reg_cache_size ||
 530             snd_soc_codec_volatile_register(codec, reg)) {
 531                 if (codec->cache_only)
 532                         return -1;
 533
 534                 return codec->hw_read(codec, reg);
 535         }
 536
 537         return cache[reg];
 538 }
 539
 540 static int snd_soc_16_16_write(struct snd_soc_codec *codec, unsigned int reg,
 541                                unsigned int value)
 542 {
 543         u16 *cache = codec->reg_cache;
 544         u8 data[4];
 545         int ret;
 546
 547         data[0] = (reg >> 8) & 0xff;
 548         data[1] = reg & 0xff;
 549         data[2] = (value >> 8) & 0xff;
 550         data[3] = value & 0xff;
 551
 552         if (!snd_soc_codec_volatile_register(codec, reg) &&
 553                 reg < codec->driver->reg_cache_size)
 554                         cache[reg] = value;
 555
 556         if (codec->cache_only) {
 557                 codec->cache_sync = 1;
 558                 return 0;
 559         }
 560
 561         ret = codec->hw_write(codec->control_data, data, 4);
 562         if (ret == 4)
 563                 return 0;
 564         if (ret < 0)
 565                 return ret;
 566         else
 567                 return -EIO;
 568 }
 569
 570 #if defined(CONFIG_SPI_MASTER)
 571 static int snd_soc_16_16_spi_write(void *control_data, const char *data,
 572                                  int len)
 573 {
 574         struct spi_device *spi = control_data;
 575         struct spi_transfer t;
 576         struct spi_message m;
 577         u8 msg[4];
 578
 579         if (len <= 0)
 580                 return 0;
 581
 582         msg[0] = data[0];
 583         msg[1] = data[1];
 584         msg[2] = data[2];
 585         msg[3] = data[3];
 586
 587         spi_message_init(&m);
 588         memset(&t, 0, (sizeof t));
 589
 590         t.tx_buf = &msg[0];
 591         t.len = len;
 592
 593         spi_message_add_tail(&t, &m);
 594         spi_sync(spi, &m);
 595
 596         return len;
 597 }
 598 #else
 599 #define snd_soc_16_16_spi_write NULL
 600 #endif
 601
 602 static struct {
 603         int addr_bits;
 604         int data_bits;
 605         int (*write)(struct snd_soc_codec *codec, unsigned int, unsigned int);
 606         int (*spi_write)(void *, const char *, int);
 607         unsigned int (*read)(struct snd_soc_codec *, unsigned int);
 608         unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
 609 } io_types[] = {
 610         {
 611                 .addr_bits = 4, .data_bits = 12,
 612                 .write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
 613                 .spi_write = snd_soc_4_12_spi_write,
 614         },
 615         {
 616                 .addr_bits = 7, .data_bits = 9,
 617                 .write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
 618                 .spi_write = snd_soc_7_9_spi_write,
 619         },
 620         {
 621                 .addr_bits = 8, .data_bits = 8,
 622                 .write = snd_soc_8_8_write, .read = snd_soc_8_8_read,
 623                 .i2c_read = snd_soc_8_8_read_i2c,
 624                 .spi_write = snd_soc_8_8_spi_write,
 625         },
 626         {
 627                 .addr_bits = 8, .data_bits = 16,
 628                 .write = snd_soc_8_16_write, .read = snd_soc_8_16_read,
 629                 .i2c_read = snd_soc_8_16_read_i2c,
 630                 .spi_write = snd_soc_8_16_spi_write,
 631         },
 632         {
 633                 .addr_bits = 16, .data_bits = 8,
 634                 .write = snd_soc_16_8_write, .read = snd_soc_16_8_read,
 635                 .i2c_read = snd_soc_16_8_read_i2c,
 636                 .spi_write = snd_soc_16_8_spi_write,
 637         },
 638         {
 639                 .addr_bits = 16, .data_bits = 16,
 640                 .write = snd_soc_16_16_write, .read = snd_soc_16_16_read,
 641                 .i2c_read = snd_soc_16_16_read_i2c,
 642                 .spi_write = snd_soc_16_16_spi_write,
 643         },
 644 };
 645
 646 /**
 647  * snd_soc_codec_set_cache_io: Set up standard I/O functions.
 648  *
 649  * @codec: CODEC to configure.
 650  * @type: Type of cache.
 651  * @addr_bits: Number of bits of register address data.
 652  * @data_bits: Number of bits of data per register.
 653  * @control: Control bus used.
 654  *
 655  * Register formats are frequently shared between many I2C and SPI
 656  * devices.  In order to promote code reuse the ASoC core provides
 657  * some standard implementations of CODEC read and write operations
 658  * which can be set up using this function.
 659  *
 660  * The caller is responsible for allocating and initialising the
 661  * actual cache.
 662  *
 663  * Note that at present this code cannot be used by CODECs with
 664  * volatile registers.
 665  */
 666 int snd_soc_codec_set_cache_io(struct snd_soc_codec *codec,
 667                                int addr_bits, int data_bits,
 668                                enum snd_soc_control_type control)
 669 {
 670         int i;
 671
 672         for (i = 0; i < ARRAY_SIZE(io_types); i++)
 673                 if (io_types[i].addr_bits == addr_bits &&
 674                     io_types[i].data_bits == data_bits)
 675                         break;
 676         if (i == ARRAY_SIZE(io_types)) {
 677                 printk(KERN_ERR
 678                        "No I/O functions for %d bit address %d bit data\n",
 679                        addr_bits, data_bits);
 680                 return -EINVAL;
 681         }
 682
 683         codec->driver->write = io_types[i].write;
 684         codec->driver->read = io_types[i].read;
 685
 686         switch (control) {
 687         case SND_SOC_CUSTOM:
 688                 break;
 689
 690         case SND_SOC_I2C:
 691 #if defined(CONFIG_I2C) || (defined(CONFIG_I2C_MODULE) && defined(MODULE))
 692                 codec->hw_write = (hw_write_t)i2c_master_send;
 693 #endif
 694                 if (io_types[i].i2c_read)
 695                         codec->hw_read = io_types[i].i2c_read;
 696
 697                 codec->control_data = container_of(codec->dev,
 698                                                    struct i2c_client,
 699                                                    dev);
 700                 break;
 701
 702         case SND_SOC_SPI:
 703                 if (io_types[i].spi_write)
 704                         codec->hw_write = io_types[i].spi_write;
 705
 706                 codec->control_data = container_of(codec->dev,
 707                                                    struct spi_device,
 708                                                    dev);
 709                 break;
 710         }
 711
 712         return 0;
 713 }
 714 EXPORT_SYMBOL_GPL(snd_soc_codec_set_cache_io);