2 * tegra_i2s.c - Tegra I2S driver
4 * Author: Stephen Warren <swarren@nvidia.com>
5 * Copyright (C) 2010 - NVIDIA, Inc.
7 * Based on code copyright/by:
9 * Copyright (c) 2009-2010, NVIDIA Corporation.
10 * Scott Peterson <speterson@nvidia.com>
12 * Copyright (C) 2010 Google, Inc.
13 * Iliyan Malchev <malchev@google.com>
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * version 2 as published by the Free Software Foundation.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
31 #include <linux/clk.h>
32 #include <linux/module.h>
33 #include <linux/debugfs.h>
34 #include <linux/device.h>
35 #include <linux/platform_device.h>
36 #include <linux/seq_file.h>
37 #include <linux/slab.h>
39 #include <mach/iomap.h>
40 #include <sound/core.h>
41 #include <sound/pcm.h>
42 #include <sound/pcm_params.h>
43 #include <sound/soc.h>
45 #include "tegra_i2s.h"
47 #define DRV_NAME "tegra-i2s"
49 static inline void tegra_i2s_write(struct tegra_i2s
*i2s
, u32 reg
, u32 val
)
51 __raw_writel(val
, i2s
->regs
+ reg
);
54 static inline u32
tegra_i2s_read(struct tegra_i2s
*i2s
, u32 reg
)
56 return __raw_readl(i2s
->regs
+ reg
);
59 #ifdef CONFIG_DEBUG_FS
60 static int tegra_i2s_show(struct seq_file
*s
, void *unused
)
62 #define REG(r) { r, #r }
68 REG(TEGRA_I2S_STATUS
),
69 REG(TEGRA_I2S_TIMING
),
70 REG(TEGRA_I2S_FIFO_SCR
),
71 REG(TEGRA_I2S_PCM_CTRL
),
72 REG(TEGRA_I2S_NW_CTRL
),
73 REG(TEGRA_I2S_TDM_CTRL
),
74 REG(TEGRA_I2S_TDM_TX_RX_CTRL
),
78 struct tegra_i2s
*i2s
= s
->private;
81 for (i
= 0; i
< ARRAY_SIZE(regs
); i
++) {
82 u32 val
= tegra_i2s_read(i2s
, regs
[i
].offset
);
83 seq_printf(s
, "%s = %08x\n", regs
[i
].name
, val
);
89 static int tegra_i2s_debug_open(struct inode
*inode
, struct file
*file
)
91 return single_open(file
, tegra_i2s_show
, inode
->i_private
);
94 static const struct file_operations tegra_i2s_debug_fops
= {
95 .open
= tegra_i2s_debug_open
,
98 .release
= single_release
,
101 static void tegra_i2s_debug_add(struct tegra_i2s
*i2s
, int id
)
103 char name
[] = DRV_NAME
".0";
105 snprintf(name
, sizeof(name
), DRV_NAME
".%1d", id
);
106 i2s
->debug
= debugfs_create_file(name
, S_IRUGO
, snd_soc_debugfs_root
,
107 i2s
, &tegra_i2s_debug_fops
);
110 static void tegra_i2s_debug_remove(struct tegra_i2s
*i2s
)
113 debugfs_remove(i2s
->debug
);
116 static inline void tegra_i2s_debug_add(struct tegra_i2s
*i2s
, int id
)
120 static inline void tegra_i2s_debug_remove(struct tegra_i2s
*i2s
)
125 static int tegra_i2s_set_fmt(struct snd_soc_dai
*dai
,
128 struct tegra_i2s
*i2s
= snd_soc_dai_get_drvdata(dai
);
130 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
131 case SND_SOC_DAIFMT_NB_NF
:
137 i2s
->reg_ctrl
&= ~TEGRA_I2S_CTRL_MASTER_ENABLE
;
138 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
139 case SND_SOC_DAIFMT_CBS_CFS
:
140 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_MASTER_ENABLE
;
142 case SND_SOC_DAIFMT_CBM_CFM
:
148 i2s
->reg_ctrl
&= ~(TEGRA_I2S_CTRL_BIT_FORMAT_MASK
|
149 TEGRA_I2S_CTRL_LRCK_MASK
);
150 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
151 case SND_SOC_DAIFMT_DSP_A
:
152 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_BIT_FORMAT_DSP
;
153 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_LRCK_L_LOW
;
155 case SND_SOC_DAIFMT_DSP_B
:
156 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_BIT_FORMAT_DSP
;
157 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_LRCK_R_LOW
;
159 case SND_SOC_DAIFMT_I2S
:
160 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_BIT_FORMAT_I2S
;
161 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_LRCK_L_LOW
;
163 case SND_SOC_DAIFMT_RIGHT_J
:
164 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_BIT_FORMAT_RJM
;
165 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_LRCK_L_LOW
;
167 case SND_SOC_DAIFMT_LEFT_J
:
168 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_BIT_FORMAT_LJM
;
169 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_LRCK_L_LOW
;
178 static int tegra_i2s_hw_params(struct snd_pcm_substream
*substream
,
179 struct snd_pcm_hw_params
*params
,
180 struct snd_soc_dai
*dai
)
182 struct device
*dev
= substream
->pcm
->card
->dev
;
183 struct tegra_i2s
*i2s
= snd_soc_dai_get_drvdata(dai
);
185 int ret
, sample_size
, srate
, i2sclock
, bitcnt
;
187 i2s
->reg_ctrl
&= ~TEGRA_I2S_CTRL_BIT_SIZE_MASK
;
188 switch (params_format(params
)) {
189 case SNDRV_PCM_FORMAT_S16_LE
:
190 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_BIT_SIZE_16
;
193 case SNDRV_PCM_FORMAT_S24_LE
:
194 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_BIT_SIZE_24
;
197 case SNDRV_PCM_FORMAT_S32_LE
:
198 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_BIT_SIZE_32
;
205 srate
= params_rate(params
);
207 /* Final "* 2" required by Tegra hardware */
208 i2sclock
= srate
* params_channels(params
) * sample_size
* 2;
210 ret
= clk_set_rate(i2s
->clk_i2s
, i2sclock
);
212 dev_err(dev
, "Can't set I2S clock rate: %d\n", ret
);
216 bitcnt
= (i2sclock
/ (2 * srate
)) - 1;
217 if (bitcnt
< 0 || bitcnt
> TEGRA_I2S_TIMING_CHANNEL_BIT_COUNT_MASK_US
)
219 reg
= bitcnt
<< TEGRA_I2S_TIMING_CHANNEL_BIT_COUNT_SHIFT
;
221 if (i2sclock
% (2 * srate
))
222 reg
|= TEGRA_I2S_TIMING_NON_SYM_ENABLE
;
225 clk_enable(i2s
->clk_i2s
);
227 tegra_i2s_write(i2s
, TEGRA_I2S_TIMING
, reg
);
229 tegra_i2s_write(i2s
, TEGRA_I2S_FIFO_SCR
,
230 TEGRA_I2S_FIFO_SCR_FIFO2_ATN_LVL_FOUR_SLOTS
|
231 TEGRA_I2S_FIFO_SCR_FIFO1_ATN_LVL_FOUR_SLOTS
);
234 clk_disable(i2s
->clk_i2s
);
239 static void tegra_i2s_start_playback(struct tegra_i2s
*i2s
)
241 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_FIFO1_ENABLE
;
242 tegra_i2s_write(i2s
, TEGRA_I2S_CTRL
, i2s
->reg_ctrl
);
245 static void tegra_i2s_stop_playback(struct tegra_i2s
*i2s
)
247 i2s
->reg_ctrl
&= ~TEGRA_I2S_CTRL_FIFO1_ENABLE
;
248 tegra_i2s_write(i2s
, TEGRA_I2S_CTRL
, i2s
->reg_ctrl
);
251 static void tegra_i2s_start_capture(struct tegra_i2s
*i2s
)
253 i2s
->reg_ctrl
|= TEGRA_I2S_CTRL_FIFO2_ENABLE
;
254 tegra_i2s_write(i2s
, TEGRA_I2S_CTRL
, i2s
->reg_ctrl
);
257 static void tegra_i2s_stop_capture(struct tegra_i2s
*i2s
)
259 i2s
->reg_ctrl
&= ~TEGRA_I2S_CTRL_FIFO2_ENABLE
;
260 tegra_i2s_write(i2s
, TEGRA_I2S_CTRL
, i2s
->reg_ctrl
);
263 static int tegra_i2s_trigger(struct snd_pcm_substream
*substream
, int cmd
,
264 struct snd_soc_dai
*dai
)
266 struct tegra_i2s
*i2s
= snd_soc_dai_get_drvdata(dai
);
269 case SNDRV_PCM_TRIGGER_START
:
270 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
271 case SNDRV_PCM_TRIGGER_RESUME
:
273 clk_enable(i2s
->clk_i2s
);
275 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
276 tegra_i2s_start_playback(i2s
);
278 tegra_i2s_start_capture(i2s
);
280 case SNDRV_PCM_TRIGGER_STOP
:
281 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
282 case SNDRV_PCM_TRIGGER_SUSPEND
:
283 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
284 tegra_i2s_stop_playback(i2s
);
286 tegra_i2s_stop_capture(i2s
);
289 clk_disable(i2s
->clk_i2s
);
298 static int tegra_i2s_probe(struct snd_soc_dai
*dai
)
300 struct tegra_i2s
* i2s
= snd_soc_dai_get_drvdata(dai
);
302 dai
->capture_dma_data
= &i2s
->capture_dma_data
;
303 dai
->playback_dma_data
= &i2s
->playback_dma_data
;
308 static const struct snd_soc_dai_ops tegra_i2s_dai_ops
= {
309 .set_fmt
= tegra_i2s_set_fmt
,
310 .hw_params
= tegra_i2s_hw_params
,
311 .trigger
= tegra_i2s_trigger
,
314 static struct snd_soc_dai_driver tegra_i2s_dai
[] = {
316 .name
= DRV_NAME
".0",
317 .probe
= tegra_i2s_probe
,
321 .rates
= SNDRV_PCM_RATE_8000_96000
,
322 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
327 .rates
= SNDRV_PCM_RATE_8000_96000
,
328 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
330 .ops
= &tegra_i2s_dai_ops
,
331 .symmetric_rates
= 1,
334 .name
= DRV_NAME
".1",
335 .probe
= tegra_i2s_probe
,
339 .rates
= SNDRV_PCM_RATE_8000_96000
,
340 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
345 .rates
= SNDRV_PCM_RATE_8000_96000
,
346 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,
348 .ops
= &tegra_i2s_dai_ops
,
349 .symmetric_rates
= 1,
353 static __devinit
int tegra_i2s_platform_probe(struct platform_device
*pdev
)
355 struct tegra_i2s
* i2s
;
356 struct resource
*mem
, *memregion
, *dmareq
;
359 if ((pdev
->id
< 0) ||
360 (pdev
->id
>= ARRAY_SIZE(tegra_i2s_dai
))) {
361 dev_err(&pdev
->dev
, "ID %d out of range\n", pdev
->id
);
365 i2s
= devm_kzalloc(&pdev
->dev
, sizeof(struct tegra_i2s
), GFP_KERNEL
);
367 dev_err(&pdev
->dev
, "Can't allocate tegra_i2s\n");
371 dev_set_drvdata(&pdev
->dev
, i2s
);
373 i2s
->clk_i2s
= clk_get(&pdev
->dev
, NULL
);
374 if (IS_ERR(i2s
->clk_i2s
)) {
375 dev_err(&pdev
->dev
, "Can't retrieve i2s clock\n");
376 ret
= PTR_ERR(i2s
->clk_i2s
);
380 mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
382 dev_err(&pdev
->dev
, "No memory resource\n");
387 dmareq
= platform_get_resource(pdev
, IORESOURCE_DMA
, 0);
389 dev_err(&pdev
->dev
, "No DMA resource\n");
394 memregion
= devm_request_mem_region(&pdev
->dev
, mem
->start
,
395 resource_size(mem
), DRV_NAME
);
397 dev_err(&pdev
->dev
, "Memory region already claimed\n");
402 i2s
->regs
= devm_ioremap(&pdev
->dev
, mem
->start
, resource_size(mem
));
404 dev_err(&pdev
->dev
, "ioremap failed\n");
409 i2s
->capture_dma_data
.addr
= mem
->start
+ TEGRA_I2S_FIFO2
;
410 i2s
->capture_dma_data
.wrap
= 4;
411 i2s
->capture_dma_data
.width
= 32;
412 i2s
->capture_dma_data
.req_sel
= dmareq
->start
;
414 i2s
->playback_dma_data
.addr
= mem
->start
+ TEGRA_I2S_FIFO1
;
415 i2s
->playback_dma_data
.wrap
= 4;
416 i2s
->playback_dma_data
.width
= 32;
417 i2s
->playback_dma_data
.req_sel
= dmareq
->start
;
419 i2s
->reg_ctrl
= TEGRA_I2S_CTRL_FIFO_FORMAT_PACKED
;
421 ret
= snd_soc_register_dai(&pdev
->dev
, &tegra_i2s_dai
[pdev
->id
]);
423 dev_err(&pdev
->dev
, "Could not register DAI: %d\n", ret
);
428 tegra_i2s_debug_add(i2s
, pdev
->id
);
433 clk_put(i2s
->clk_i2s
);
438 static int __devexit
tegra_i2s_platform_remove(struct platform_device
*pdev
)
440 struct tegra_i2s
*i2s
= dev_get_drvdata(&pdev
->dev
);
442 snd_soc_unregister_dai(&pdev
->dev
);
444 tegra_i2s_debug_remove(i2s
);
446 clk_put(i2s
->clk_i2s
);
451 static struct platform_driver tegra_i2s_driver
= {
454 .owner
= THIS_MODULE
,
456 .probe
= tegra_i2s_platform_probe
,
457 .remove
= __devexit_p(tegra_i2s_platform_remove
),
459 module_platform_driver(tegra_i2s_driver
);
461 MODULE_AUTHOR("Stephen Warren <swarren@nvidia.com>");
462 MODULE_DESCRIPTION("Tegra I2S ASoC driver");
463 MODULE_LICENSE("GPL");
464 MODULE_ALIAS("platform:" DRV_NAME
);