4 * Copyright (C) 2015,2016 ARM Ltd.
5 * Author: Andre Przywara <andre.przywara@arm.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program. If not, see <http://www.gnu.org/licenses/>.
20 #include <linux/cpu.h>
21 #include <linux/kvm.h>
22 #include <linux/kvm_host.h>
23 #include <linux/interrupt.h>
24 #include <linux/list.h>
25 #include <linux/uaccess.h>
27 #include <linux/irqchip/arm-gic-v3.h>
29 #include <asm/kvm_emulate.h>
30 #include <asm/kvm_arm.h>
31 #include <asm/kvm_mmu.h>
34 #include "vgic-mmio.h"
37 * Creates a new (reference to a) struct vgic_irq for a given LPI.
38 * If this LPI is already mapped on another ITS, we increase its refcount
39 * and return a pointer to the existing structure.
40 * If this is a "new" LPI, we allocate and initialize a new struct vgic_irq.
41 * This function returns a pointer to the _unlocked_ structure.
43 static struct vgic_irq
*vgic_add_lpi(struct kvm
*kvm
, u32 intid
)
45 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
46 struct vgic_irq
*irq
= vgic_get_irq(kvm
, NULL
, intid
), *oldirq
;
48 /* In this case there is no put, since we keep the reference. */
52 irq
= kzalloc(sizeof(struct vgic_irq
), GFP_KERNEL
);
56 INIT_LIST_HEAD(&irq
->lpi_list
);
57 INIT_LIST_HEAD(&irq
->ap_list
);
58 spin_lock_init(&irq
->irq_lock
);
60 irq
->config
= VGIC_CONFIG_EDGE
;
61 kref_init(&irq
->refcount
);
64 spin_lock(&dist
->lpi_list_lock
);
67 * There could be a race with another vgic_add_lpi(), so we need to
68 * check that we don't add a second list entry with the same LPI.
70 list_for_each_entry(oldirq
, &dist
->lpi_list_head
, lpi_list
) {
71 if (oldirq
->intid
!= intid
)
74 /* Someone was faster with adding this LPI, lets use that. */
79 * This increases the refcount, the caller is expected to
80 * call vgic_put_irq() on the returned pointer once it's
81 * finished with the IRQ.
83 vgic_get_irq_kref(irq
);
88 list_add_tail(&irq
->lpi_list
, &dist
->lpi_list_head
);
89 dist
->lpi_list_count
++;
92 spin_unlock(&dist
->lpi_list_lock
);
98 struct list_head dev_list
;
100 /* the head for the list of ITTEs */
101 struct list_head itt_head
;
105 #define COLLECTION_NOT_MAPPED ((u32)~0)
107 struct its_collection
{
108 struct list_head coll_list
;
114 #define its_is_collection_mapped(coll) ((coll) && \
115 ((coll)->target_addr != COLLECTION_NOT_MAPPED))
118 struct list_head itte_list
;
120 struct vgic_irq
*irq
;
121 struct its_collection
*collection
;
127 * Find and returns a device in the device table for an ITS.
128 * Must be called with the its_lock mutex held.
130 static struct its_device
*find_its_device(struct vgic_its
*its
, u32 device_id
)
132 struct its_device
*device
;
134 list_for_each_entry(device
, &its
->device_list
, dev_list
)
135 if (device_id
== device
->device_id
)
142 * Find and returns an interrupt translation table entry (ITTE) for a given
143 * Device ID/Event ID pair on an ITS.
144 * Must be called with the its_lock mutex held.
146 static struct its_itte
*find_itte(struct vgic_its
*its
, u32 device_id
,
149 struct its_device
*device
;
150 struct its_itte
*itte
;
152 device
= find_its_device(its
, device_id
);
156 list_for_each_entry(itte
, &device
->itt_head
, itte_list
)
157 if (itte
->event_id
== event_id
)
163 /* To be used as an iterator this macro misses the enclosing parentheses */
164 #define for_each_lpi_its(dev, itte, its) \
165 list_for_each_entry(dev, &(its)->device_list, dev_list) \
166 list_for_each_entry(itte, &(dev)->itt_head, itte_list)
169 * We only implement 48 bits of PA at the moment, although the ITS
170 * supports more. Let's be restrictive here.
172 #define BASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 16))
173 #define CBASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 12))
174 #define PENDBASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 16))
175 #define PROPBASER_ADDRESS(x) ((x) & GENMASK_ULL(47, 12))
177 #define GIC_LPI_OFFSET 8192
180 * Finds and returns a collection in the ITS collection table.
181 * Must be called with the its_lock mutex held.
183 static struct its_collection
*find_collection(struct vgic_its
*its
, int coll_id
)
185 struct its_collection
*collection
;
187 list_for_each_entry(collection
, &its
->collection_list
, coll_list
) {
188 if (coll_id
== collection
->collection_id
)
195 #define LPI_PROP_ENABLE_BIT(p) ((p) & LPI_PROP_ENABLED)
196 #define LPI_PROP_PRIORITY(p) ((p) & 0xfc)
199 * Reads the configuration data for a given LPI from guest memory and
200 * updates the fields in struct vgic_irq.
201 * If filter_vcpu is not NULL, applies only if the IRQ is targeting this
202 * VCPU. Unconditionally applies if filter_vcpu is NULL.
204 static int update_lpi_config(struct kvm
*kvm
, struct vgic_irq
*irq
,
205 struct kvm_vcpu
*filter_vcpu
)
207 u64 propbase
= PROPBASER_ADDRESS(kvm
->arch
.vgic
.propbaser
);
211 ret
= kvm_read_guest(kvm
, propbase
+ irq
->intid
- GIC_LPI_OFFSET
,
217 spin_lock(&irq
->irq_lock
);
219 if (!filter_vcpu
|| filter_vcpu
== irq
->target_vcpu
) {
220 irq
->priority
= LPI_PROP_PRIORITY(prop
);
221 irq
->enabled
= LPI_PROP_ENABLE_BIT(prop
);
223 vgic_queue_irq_unlock(kvm
, irq
);
225 spin_unlock(&irq
->irq_lock
);
232 * Create a snapshot of the current LPI list, so that we can enumerate all
233 * LPIs without holding any lock.
234 * Returns the array length and puts the kmalloc'ed array into intid_ptr.
236 static int vgic_copy_lpi_list(struct kvm
*kvm
, u32
**intid_ptr
)
238 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
239 struct vgic_irq
*irq
;
241 int irq_count
= dist
->lpi_list_count
, i
= 0;
244 * We use the current value of the list length, which may change
245 * after the kmalloc. We don't care, because the guest shouldn't
246 * change anything while the command handling is still running,
247 * and in the worst case we would miss a new IRQ, which one wouldn't
248 * expect to be covered by this command anyway.
250 intids
= kmalloc_array(irq_count
, sizeof(intids
[0]), GFP_KERNEL
);
254 spin_lock(&dist
->lpi_list_lock
);
255 list_for_each_entry(irq
, &dist
->lpi_list_head
, lpi_list
) {
256 /* We don't need to "get" the IRQ, as we hold the list lock. */
257 intids
[i
] = irq
->intid
;
258 if (++i
== irq_count
)
261 spin_unlock(&dist
->lpi_list_lock
);
268 * Promotes the ITS view of affinity of an ITTE (which redistributor this LPI
269 * is targeting) to the VGIC's view, which deals with target VCPUs.
270 * Needs to be called whenever either the collection for a LPIs has
271 * changed or the collection itself got retargeted.
273 static void update_affinity_itte(struct kvm
*kvm
, struct its_itte
*itte
)
275 struct kvm_vcpu
*vcpu
;
277 if (!its_is_collection_mapped(itte
->collection
))
280 vcpu
= kvm_get_vcpu(kvm
, itte
->collection
->target_addr
);
282 spin_lock(&itte
->irq
->irq_lock
);
283 itte
->irq
->target_vcpu
= vcpu
;
284 spin_unlock(&itte
->irq
->irq_lock
);
288 * Updates the target VCPU for every LPI targeting this collection.
289 * Must be called with the its_lock mutex held.
291 static void update_affinity_collection(struct kvm
*kvm
, struct vgic_its
*its
,
292 struct its_collection
*coll
)
294 struct its_device
*device
;
295 struct its_itte
*itte
;
297 for_each_lpi_its(device
, itte
, its
) {
298 if (!itte
->collection
|| coll
!= itte
->collection
)
301 update_affinity_itte(kvm
, itte
);
305 static u32
max_lpis_propbaser(u64 propbaser
)
307 int nr_idbits
= (propbaser
& 0x1f) + 1;
309 return 1U << min(nr_idbits
, INTERRUPT_ID_BITS_ITS
);
313 * Scan the whole LPI pending table and sync the pending bit in there
314 * with our own data structures. This relies on the LPI being
317 static int its_sync_lpi_pending_table(struct kvm_vcpu
*vcpu
)
319 gpa_t pendbase
= PENDBASER_ADDRESS(vcpu
->arch
.vgic_cpu
.pendbaser
);
320 struct vgic_irq
*irq
;
321 int last_byte_offset
= -1;
326 nr_irqs
= vgic_copy_lpi_list(vcpu
->kvm
, &intids
);
330 for (i
= 0; i
< nr_irqs
; i
++) {
331 int byte_offset
, bit_nr
;
334 byte_offset
= intids
[i
] / BITS_PER_BYTE
;
335 bit_nr
= intids
[i
] % BITS_PER_BYTE
;
338 * For contiguously allocated LPIs chances are we just read
339 * this very same byte in the last iteration. Reuse that.
341 if (byte_offset
!= last_byte_offset
) {
342 ret
= kvm_read_guest(vcpu
->kvm
, pendbase
+ byte_offset
,
348 last_byte_offset
= byte_offset
;
351 irq
= vgic_get_irq(vcpu
->kvm
, NULL
, intids
[i
]);
352 spin_lock(&irq
->irq_lock
);
353 irq
->pending
= pendmask
& (1U << bit_nr
);
354 vgic_queue_irq_unlock(vcpu
->kvm
, irq
);
355 vgic_put_irq(vcpu
->kvm
, irq
);
363 static unsigned long vgic_mmio_read_its_ctlr(struct kvm
*vcpu
,
364 struct vgic_its
*its
,
365 gpa_t addr
, unsigned int len
)
369 mutex_lock(&its
->cmd_lock
);
370 if (its
->creadr
== its
->cwriter
)
371 reg
|= GITS_CTLR_QUIESCENT
;
373 reg
|= GITS_CTLR_ENABLE
;
374 mutex_unlock(&its
->cmd_lock
);
379 static void vgic_mmio_write_its_ctlr(struct kvm
*kvm
, struct vgic_its
*its
,
380 gpa_t addr
, unsigned int len
,
383 its
->enabled
= !!(val
& GITS_CTLR_ENABLE
);
386 static unsigned long vgic_mmio_read_its_typer(struct kvm
*kvm
,
387 struct vgic_its
*its
,
388 gpa_t addr
, unsigned int len
)
390 u64 reg
= GITS_TYPER_PLPIS
;
393 * We use linear CPU numbers for redistributor addressing,
394 * so GITS_TYPER.PTA is 0.
395 * Also we force all PROPBASER registers to be the same, so
396 * CommonLPIAff is 0 as well.
397 * To avoid memory waste in the guest, we keep the number of IDBits and
398 * DevBits low - as least for the time being.
400 reg
|= 0x0f << GITS_TYPER_DEVBITS_SHIFT
;
401 reg
|= 0x0f << GITS_TYPER_IDBITS_SHIFT
;
403 return extract_bytes(reg
, addr
& 7, len
);
406 static unsigned long vgic_mmio_read_its_iidr(struct kvm
*kvm
,
407 struct vgic_its
*its
,
408 gpa_t addr
, unsigned int len
)
410 return (PRODUCT_ID_KVM
<< 24) | (IMPLEMENTER_ARM
<< 0);
413 static unsigned long vgic_mmio_read_its_idregs(struct kvm
*kvm
,
414 struct vgic_its
*its
,
415 gpa_t addr
, unsigned int len
)
417 switch (addr
& 0xffff) {
419 return 0x92; /* part number, bits[7:0] */
421 return 0xb4; /* part number, bits[11:8] */
423 return GIC_PIDR2_ARCH_GICv3
| 0x0b;
425 return 0x40; /* This is a 64K software visible page */
426 /* The following are the ID registers for (any) GIC. */
441 * Find the target VCPU and the LPI number for a given devid/eventid pair
442 * and make this IRQ pending, possibly injecting it.
443 * Must be called with the its_lock mutex held.
445 static void vgic_its_trigger_msi(struct kvm
*kvm
, struct vgic_its
*its
,
446 u32 devid
, u32 eventid
)
448 struct its_itte
*itte
;
453 itte
= find_itte(its
, devid
, eventid
);
454 /* Triggering an unmapped IRQ gets silently dropped. */
455 if (itte
&& its_is_collection_mapped(itte
->collection
)) {
456 struct kvm_vcpu
*vcpu
;
458 vcpu
= kvm_get_vcpu(kvm
, itte
->collection
->target_addr
);
459 if (vcpu
&& vcpu
->arch
.vgic_cpu
.lpis_enabled
) {
460 spin_lock(&itte
->irq
->irq_lock
);
461 itte
->irq
->pending
= true;
462 vgic_queue_irq_unlock(kvm
, itte
->irq
);
468 * Queries the KVM IO bus framework to get the ITS pointer from the given
470 * We then call vgic_its_trigger_msi() with the decoded data.
472 int vgic_its_inject_msi(struct kvm
*kvm
, struct kvm_msi
*msi
)
475 struct kvm_io_device
*kvm_io_dev
;
476 struct vgic_io_device
*iodev
;
478 if (!vgic_has_its(kvm
))
481 if (!(msi
->flags
& KVM_MSI_VALID_DEVID
))
484 address
= (u64
)msi
->address_hi
<< 32 | msi
->address_lo
;
486 kvm_io_dev
= kvm_io_bus_get_dev(kvm
, KVM_MMIO_BUS
, address
);
490 iodev
= container_of(kvm_io_dev
, struct vgic_io_device
, dev
);
492 mutex_lock(&iodev
->its
->its_lock
);
493 vgic_its_trigger_msi(kvm
, iodev
->its
, msi
->devid
, msi
->data
);
494 mutex_unlock(&iodev
->its
->its_lock
);
499 /* Requires the its_lock to be held. */
500 static void its_free_itte(struct kvm
*kvm
, struct its_itte
*itte
)
502 list_del(&itte
->itte_list
);
504 /* This put matches the get in vgic_add_lpi. */
505 vgic_put_irq(kvm
, itte
->irq
);
510 static u64
its_cmd_mask_field(u64
*its_cmd
, int word
, int shift
, int size
)
512 return (le64_to_cpu(its_cmd
[word
]) >> shift
) & (BIT_ULL(size
) - 1);
515 #define its_cmd_get_command(cmd) its_cmd_mask_field(cmd, 0, 0, 8)
516 #define its_cmd_get_deviceid(cmd) its_cmd_mask_field(cmd, 0, 32, 32)
517 #define its_cmd_get_id(cmd) its_cmd_mask_field(cmd, 1, 0, 32)
518 #define its_cmd_get_physical_id(cmd) its_cmd_mask_field(cmd, 1, 32, 32)
519 #define its_cmd_get_collection(cmd) its_cmd_mask_field(cmd, 2, 0, 16)
520 #define its_cmd_get_target_addr(cmd) its_cmd_mask_field(cmd, 2, 16, 32)
521 #define its_cmd_get_validbit(cmd) its_cmd_mask_field(cmd, 2, 63, 1)
524 * The DISCARD command frees an Interrupt Translation Table Entry (ITTE).
525 * Must be called with the its_lock mutex held.
527 static int vgic_its_cmd_handle_discard(struct kvm
*kvm
, struct vgic_its
*its
,
530 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
531 u32 event_id
= its_cmd_get_id(its_cmd
);
532 struct its_itte
*itte
;
535 itte
= find_itte(its
, device_id
, event_id
);
536 if (itte
&& itte
->collection
) {
538 * Though the spec talks about removing the pending state, we
539 * don't bother here since we clear the ITTE anyway and the
540 * pending state is a property of the ITTE struct.
542 its_free_itte(kvm
, itte
);
546 return E_ITS_DISCARD_UNMAPPED_INTERRUPT
;
550 * The MOVI command moves an ITTE to a different collection.
551 * Must be called with the its_lock mutex held.
553 static int vgic_its_cmd_handle_movi(struct kvm
*kvm
, struct vgic_its
*its
,
556 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
557 u32 event_id
= its_cmd_get_id(its_cmd
);
558 u32 coll_id
= its_cmd_get_collection(its_cmd
);
559 struct kvm_vcpu
*vcpu
;
560 struct its_itte
*itte
;
561 struct its_collection
*collection
;
563 itte
= find_itte(its
, device_id
, event_id
);
565 return E_ITS_MOVI_UNMAPPED_INTERRUPT
;
567 if (!its_is_collection_mapped(itte
->collection
))
568 return E_ITS_MOVI_UNMAPPED_COLLECTION
;
570 collection
= find_collection(its
, coll_id
);
571 if (!its_is_collection_mapped(collection
))
572 return E_ITS_MOVI_UNMAPPED_COLLECTION
;
574 itte
->collection
= collection
;
575 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
577 spin_lock(&itte
->irq
->irq_lock
);
578 itte
->irq
->target_vcpu
= vcpu
;
579 spin_unlock(&itte
->irq
->irq_lock
);
585 * Check whether an ID can be stored into the corresponding guest table.
586 * For a direct table this is pretty easy, but gets a bit nasty for
587 * indirect tables. We check whether the resulting guest physical address
588 * is actually valid (covered by a memslot and guest accessbible).
589 * For this we have to read the respective first level entry.
591 static bool vgic_its_check_id(struct vgic_its
*its
, u64 baser
, int id
)
593 int l1_tbl_size
= GITS_BASER_NR_PAGES(baser
) * SZ_64K
;
598 if (!(baser
& GITS_BASER_INDIRECT
)) {
601 if (id
>= (l1_tbl_size
/ GITS_BASER_ENTRY_SIZE(baser
)))
604 addr
= BASER_ADDRESS(baser
) + id
* GITS_BASER_ENTRY_SIZE(baser
);
605 gfn
= addr
>> PAGE_SHIFT
;
607 return kvm_is_visible_gfn(its
->dev
->kvm
, gfn
);
610 /* calculate and check the index into the 1st level */
611 index
= id
/ (SZ_64K
/ GITS_BASER_ENTRY_SIZE(baser
));
612 if (index
>= (l1_tbl_size
/ sizeof(u64
)))
615 /* Each 1st level entry is represented by a 64-bit value. */
616 if (kvm_read_guest(its
->dev
->kvm
,
617 BASER_ADDRESS(baser
) + index
* sizeof(indirect_ptr
),
618 &indirect_ptr
, sizeof(indirect_ptr
)))
621 indirect_ptr
= le64_to_cpu(indirect_ptr
);
623 /* check the valid bit of the first level entry */
624 if (!(indirect_ptr
& BIT_ULL(63)))
628 * Mask the guest physical address and calculate the frame number.
629 * Any address beyond our supported 48 bits of PA will be caught
630 * by the actual check in the final step.
632 indirect_ptr
&= GENMASK_ULL(51, 16);
634 /* Find the address of the actual entry */
635 index
= id
% (SZ_64K
/ GITS_BASER_ENTRY_SIZE(baser
));
636 indirect_ptr
+= index
* GITS_BASER_ENTRY_SIZE(baser
);
637 gfn
= indirect_ptr
>> PAGE_SHIFT
;
639 return kvm_is_visible_gfn(its
->dev
->kvm
, gfn
);
642 static int vgic_its_alloc_collection(struct vgic_its
*its
,
643 struct its_collection
**colp
,
646 struct its_collection
*collection
;
648 if (!vgic_its_check_id(its
, its
->baser_coll_table
, coll_id
))
649 return E_ITS_MAPC_COLLECTION_OOR
;
651 collection
= kzalloc(sizeof(*collection
), GFP_KERNEL
);
653 collection
->collection_id
= coll_id
;
654 collection
->target_addr
= COLLECTION_NOT_MAPPED
;
656 list_add_tail(&collection
->coll_list
, &its
->collection_list
);
662 static void vgic_its_free_collection(struct vgic_its
*its
, u32 coll_id
)
664 struct its_collection
*collection
;
665 struct its_device
*device
;
666 struct its_itte
*itte
;
669 * Clearing the mapping for that collection ID removes the
670 * entry from the list. If there wasn't any before, we can
673 collection
= find_collection(its
, coll_id
);
677 for_each_lpi_its(device
, itte
, its
)
678 if (itte
->collection
&&
679 itte
->collection
->collection_id
== coll_id
)
680 itte
->collection
= NULL
;
682 list_del(&collection
->coll_list
);
687 * The MAPTI and MAPI commands map LPIs to ITTEs.
688 * Must be called with its_lock mutex held.
690 static int vgic_its_cmd_handle_mapi(struct kvm
*kvm
, struct vgic_its
*its
,
693 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
694 u32 event_id
= its_cmd_get_id(its_cmd
);
695 u32 coll_id
= its_cmd_get_collection(its_cmd
);
696 struct its_itte
*itte
;
697 struct its_device
*device
;
698 struct its_collection
*collection
, *new_coll
= NULL
;
701 device
= find_its_device(its
, device_id
);
703 return E_ITS_MAPTI_UNMAPPED_DEVICE
;
705 if (its_cmd_get_command(its_cmd
) == GITS_CMD_MAPTI
)
706 lpi_nr
= its_cmd_get_physical_id(its_cmd
);
709 if (lpi_nr
< GIC_LPI_OFFSET
||
710 lpi_nr
>= max_lpis_propbaser(kvm
->arch
.vgic
.propbaser
))
711 return E_ITS_MAPTI_PHYSICALID_OOR
;
713 collection
= find_collection(its
, coll_id
);
715 int ret
= vgic_its_alloc_collection(its
, &collection
, coll_id
);
718 new_coll
= collection
;
721 itte
= find_itte(its
, device_id
, event_id
);
723 itte
= kzalloc(sizeof(struct its_itte
), GFP_KERNEL
);
726 vgic_its_free_collection(its
, coll_id
);
730 itte
->event_id
= event_id
;
731 list_add_tail(&itte
->itte_list
, &device
->itt_head
);
734 itte
->collection
= collection
;
736 itte
->irq
= vgic_add_lpi(kvm
, lpi_nr
);
737 update_affinity_itte(kvm
, itte
);
740 * We "cache" the configuration table entries in out struct vgic_irq's.
741 * However we only have those structs for mapped IRQs, so we read in
742 * the respective config data from memory here upon mapping the LPI.
744 update_lpi_config(kvm
, itte
->irq
, NULL
);
749 /* Requires the its_lock to be held. */
750 static void vgic_its_unmap_device(struct kvm
*kvm
, struct its_device
*device
)
752 struct its_itte
*itte
, *temp
;
755 * The spec says that unmapping a device with still valid
756 * ITTEs associated is UNPREDICTABLE. We remove all ITTEs,
757 * since we cannot leave the memory unreferenced.
759 list_for_each_entry_safe(itte
, temp
, &device
->itt_head
, itte_list
)
760 its_free_itte(kvm
, itte
);
762 list_del(&device
->dev_list
);
767 * MAPD maps or unmaps a device ID to Interrupt Translation Tables (ITTs).
768 * Must be called with the its_lock mutex held.
770 static int vgic_its_cmd_handle_mapd(struct kvm
*kvm
, struct vgic_its
*its
,
773 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
774 bool valid
= its_cmd_get_validbit(its_cmd
);
775 struct its_device
*device
;
777 if (!vgic_its_check_id(its
, its
->baser_device_table
, device_id
))
778 return E_ITS_MAPD_DEVICE_OOR
;
780 device
= find_its_device(its
, device_id
);
783 * The spec says that calling MAPD on an already mapped device
784 * invalidates all cached data for this device. We implement this
785 * by removing the mapping and re-establishing it.
788 vgic_its_unmap_device(kvm
, device
);
791 * The spec does not say whether unmapping a not-mapped device
792 * is an error, so we are done in any case.
797 device
= kzalloc(sizeof(struct its_device
), GFP_KERNEL
);
801 device
->device_id
= device_id
;
802 INIT_LIST_HEAD(&device
->itt_head
);
804 list_add_tail(&device
->dev_list
, &its
->device_list
);
810 * The MAPC command maps collection IDs to redistributors.
811 * Must be called with the its_lock mutex held.
813 static int vgic_its_cmd_handle_mapc(struct kvm
*kvm
, struct vgic_its
*its
,
818 struct its_collection
*collection
;
821 valid
= its_cmd_get_validbit(its_cmd
);
822 coll_id
= its_cmd_get_collection(its_cmd
);
823 target_addr
= its_cmd_get_target_addr(its_cmd
);
825 if (target_addr
>= atomic_read(&kvm
->online_vcpus
))
826 return E_ITS_MAPC_PROCNUM_OOR
;
829 vgic_its_free_collection(its
, coll_id
);
831 collection
= find_collection(its
, coll_id
);
836 ret
= vgic_its_alloc_collection(its
, &collection
,
840 collection
->target_addr
= target_addr
;
842 collection
->target_addr
= target_addr
;
843 update_affinity_collection(kvm
, its
, collection
);
851 * The CLEAR command removes the pending state for a particular LPI.
852 * Must be called with the its_lock mutex held.
854 static int vgic_its_cmd_handle_clear(struct kvm
*kvm
, struct vgic_its
*its
,
857 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
858 u32 event_id
= its_cmd_get_id(its_cmd
);
859 struct its_itte
*itte
;
862 itte
= find_itte(its
, device_id
, event_id
);
864 return E_ITS_CLEAR_UNMAPPED_INTERRUPT
;
866 itte
->irq
->pending
= false;
872 * The INV command syncs the configuration bits from the memory table.
873 * Must be called with the its_lock mutex held.
875 static int vgic_its_cmd_handle_inv(struct kvm
*kvm
, struct vgic_its
*its
,
878 u32 device_id
= its_cmd_get_deviceid(its_cmd
);
879 u32 event_id
= its_cmd_get_id(its_cmd
);
880 struct its_itte
*itte
;
883 itte
= find_itte(its
, device_id
, event_id
);
885 return E_ITS_INV_UNMAPPED_INTERRUPT
;
887 return update_lpi_config(kvm
, itte
->irq
, NULL
);
891 * The INVALL command requests flushing of all IRQ data in this collection.
892 * Find the VCPU mapped to that collection, then iterate over the VM's list
893 * of mapped LPIs and update the configuration for each IRQ which targets
894 * the specified vcpu. The configuration will be read from the in-memory
895 * configuration table.
896 * Must be called with the its_lock mutex held.
898 static int vgic_its_cmd_handle_invall(struct kvm
*kvm
, struct vgic_its
*its
,
901 u32 coll_id
= its_cmd_get_collection(its_cmd
);
902 struct its_collection
*collection
;
903 struct kvm_vcpu
*vcpu
;
904 struct vgic_irq
*irq
;
908 collection
= find_collection(its
, coll_id
);
909 if (!its_is_collection_mapped(collection
))
910 return E_ITS_INVALL_UNMAPPED_COLLECTION
;
912 vcpu
= kvm_get_vcpu(kvm
, collection
->target_addr
);
914 irq_count
= vgic_copy_lpi_list(kvm
, &intids
);
918 for (i
= 0; i
< irq_count
; i
++) {
919 irq
= vgic_get_irq(kvm
, NULL
, intids
[i
]);
922 update_lpi_config(kvm
, irq
, vcpu
);
923 vgic_put_irq(kvm
, irq
);
932 * The MOVALL command moves the pending state of all IRQs targeting one
933 * redistributor to another. We don't hold the pending state in the VCPUs,
934 * but in the IRQs instead, so there is really not much to do for us here.
935 * However the spec says that no IRQ must target the old redistributor
936 * afterwards, so we make sure that no LPI is using the associated target_vcpu.
937 * This command affects all LPIs in the system that target that redistributor.
939 static int vgic_its_cmd_handle_movall(struct kvm
*kvm
, struct vgic_its
*its
,
942 struct vgic_dist
*dist
= &kvm
->arch
.vgic
;
943 u32 target1_addr
= its_cmd_get_target_addr(its_cmd
);
944 u32 target2_addr
= its_cmd_mask_field(its_cmd
, 3, 16, 32);
945 struct kvm_vcpu
*vcpu1
, *vcpu2
;
946 struct vgic_irq
*irq
;
948 if (target1_addr
>= atomic_read(&kvm
->online_vcpus
) ||
949 target2_addr
>= atomic_read(&kvm
->online_vcpus
))
950 return E_ITS_MOVALL_PROCNUM_OOR
;
952 if (target1_addr
== target2_addr
)
955 vcpu1
= kvm_get_vcpu(kvm
, target1_addr
);
956 vcpu2
= kvm_get_vcpu(kvm
, target2_addr
);
958 spin_lock(&dist
->lpi_list_lock
);
960 list_for_each_entry(irq
, &dist
->lpi_list_head
, lpi_list
) {
961 spin_lock(&irq
->irq_lock
);
963 if (irq
->target_vcpu
== vcpu1
)
964 irq
->target_vcpu
= vcpu2
;
966 spin_unlock(&irq
->irq_lock
);
969 spin_unlock(&dist
->lpi_list_lock
);
975 * The INT command injects the LPI associated with that DevID/EvID pair.
976 * Must be called with the its_lock mutex held.
978 static int vgic_its_cmd_handle_int(struct kvm
*kvm
, struct vgic_its
*its
,
981 u32 msi_data
= its_cmd_get_id(its_cmd
);
982 u64 msi_devid
= its_cmd_get_deviceid(its_cmd
);
984 vgic_its_trigger_msi(kvm
, its
, msi_devid
, msi_data
);
990 * This function is called with the its_cmd lock held, but the ITS data
991 * structure lock dropped.
993 static int vgic_its_handle_command(struct kvm
*kvm
, struct vgic_its
*its
,
998 mutex_lock(&its
->its_lock
);
999 switch (its_cmd_get_command(its_cmd
)) {
1001 ret
= vgic_its_cmd_handle_mapd(kvm
, its
, its_cmd
);
1004 ret
= vgic_its_cmd_handle_mapc(kvm
, its
, its_cmd
);
1007 ret
= vgic_its_cmd_handle_mapi(kvm
, its
, its_cmd
);
1009 case GITS_CMD_MAPTI
:
1010 ret
= vgic_its_cmd_handle_mapi(kvm
, its
, its_cmd
);
1013 ret
= vgic_its_cmd_handle_movi(kvm
, its
, its_cmd
);
1015 case GITS_CMD_DISCARD
:
1016 ret
= vgic_its_cmd_handle_discard(kvm
, its
, its_cmd
);
1018 case GITS_CMD_CLEAR
:
1019 ret
= vgic_its_cmd_handle_clear(kvm
, its
, its_cmd
);
1021 case GITS_CMD_MOVALL
:
1022 ret
= vgic_its_cmd_handle_movall(kvm
, its
, its_cmd
);
1025 ret
= vgic_its_cmd_handle_int(kvm
, its
, its_cmd
);
1028 ret
= vgic_its_cmd_handle_inv(kvm
, its
, its_cmd
);
1030 case GITS_CMD_INVALL
:
1031 ret
= vgic_its_cmd_handle_invall(kvm
, its
, its_cmd
);
1034 /* we ignore this command: we are in sync all of the time */
1038 mutex_unlock(&its
->its_lock
);
1043 static u64
vgic_sanitise_its_baser(u64 reg
)
1045 reg
= vgic_sanitise_field(reg
, GITS_BASER_SHAREABILITY_MASK
,
1046 GITS_BASER_SHAREABILITY_SHIFT
,
1047 vgic_sanitise_shareability
);
1048 reg
= vgic_sanitise_field(reg
, GITS_BASER_INNER_CACHEABILITY_MASK
,
1049 GITS_BASER_INNER_CACHEABILITY_SHIFT
,
1050 vgic_sanitise_inner_cacheability
);
1051 reg
= vgic_sanitise_field(reg
, GITS_BASER_OUTER_CACHEABILITY_MASK
,
1052 GITS_BASER_OUTER_CACHEABILITY_SHIFT
,
1053 vgic_sanitise_outer_cacheability
);
1055 /* Bits 15:12 contain bits 51:48 of the PA, which we don't support. */
1056 reg
&= ~GENMASK_ULL(15, 12);
1058 /* We support only one (ITS) page size: 64K */
1059 reg
= (reg
& ~GITS_BASER_PAGE_SIZE_MASK
) | GITS_BASER_PAGE_SIZE_64K
;
1064 static u64
vgic_sanitise_its_cbaser(u64 reg
)
1066 reg
= vgic_sanitise_field(reg
, GITS_CBASER_SHAREABILITY_MASK
,
1067 GITS_CBASER_SHAREABILITY_SHIFT
,
1068 vgic_sanitise_shareability
);
1069 reg
= vgic_sanitise_field(reg
, GITS_CBASER_INNER_CACHEABILITY_MASK
,
1070 GITS_CBASER_INNER_CACHEABILITY_SHIFT
,
1071 vgic_sanitise_inner_cacheability
);
1072 reg
= vgic_sanitise_field(reg
, GITS_CBASER_OUTER_CACHEABILITY_MASK
,
1073 GITS_CBASER_OUTER_CACHEABILITY_SHIFT
,
1074 vgic_sanitise_outer_cacheability
);
1077 * Sanitise the physical address to be 64k aligned.
1078 * Also limit the physical addresses to 48 bits.
1080 reg
&= ~(GENMASK_ULL(51, 48) | GENMASK_ULL(15, 12));
1085 static unsigned long vgic_mmio_read_its_cbaser(struct kvm
*kvm
,
1086 struct vgic_its
*its
,
1087 gpa_t addr
, unsigned int len
)
1089 return extract_bytes(its
->cbaser
, addr
& 7, len
);
1092 static void vgic_mmio_write_its_cbaser(struct kvm
*kvm
, struct vgic_its
*its
,
1093 gpa_t addr
, unsigned int len
,
1096 /* When GITS_CTLR.Enable is 1, this register is RO. */
1100 mutex_lock(&its
->cmd_lock
);
1101 its
->cbaser
= update_64bit_reg(its
->cbaser
, addr
& 7, len
, val
);
1102 its
->cbaser
= vgic_sanitise_its_cbaser(its
->cbaser
);
1105 * CWRITER is architecturally UNKNOWN on reset, but we need to reset
1106 * it to CREADR to make sure we start with an empty command buffer.
1108 its
->cwriter
= its
->creadr
;
1109 mutex_unlock(&its
->cmd_lock
);
1112 #define ITS_CMD_BUFFER_SIZE(baser) ((((baser) & 0xff) + 1) << 12)
1113 #define ITS_CMD_SIZE 32
1114 #define ITS_CMD_OFFSET(reg) ((reg) & GENMASK(19, 5))
1117 * By writing to CWRITER the guest announces new commands to be processed.
1118 * To avoid any races in the first place, we take the its_cmd lock, which
1119 * protects our ring buffer variables, so that there is only one user
1120 * per ITS handling commands at a given time.
1122 static void vgic_mmio_write_its_cwriter(struct kvm
*kvm
, struct vgic_its
*its
,
1123 gpa_t addr
, unsigned int len
,
1133 mutex_lock(&its
->cmd_lock
);
1135 reg
= update_64bit_reg(its
->cwriter
, addr
& 7, len
, val
);
1136 reg
= ITS_CMD_OFFSET(reg
);
1137 if (reg
>= ITS_CMD_BUFFER_SIZE(its
->cbaser
)) {
1138 mutex_unlock(&its
->cmd_lock
);
1143 cbaser
= CBASER_ADDRESS(its
->cbaser
);
1145 while (its
->cwriter
!= its
->creadr
) {
1146 int ret
= kvm_read_guest(kvm
, cbaser
+ its
->creadr
,
1147 cmd_buf
, ITS_CMD_SIZE
);
1149 * If kvm_read_guest() fails, this could be due to the guest
1150 * programming a bogus value in CBASER or something else going
1151 * wrong from which we cannot easily recover.
1152 * According to section 6.3.2 in the GICv3 spec we can just
1153 * ignore that command then.
1156 vgic_its_handle_command(kvm
, its
, cmd_buf
);
1158 its
->creadr
+= ITS_CMD_SIZE
;
1159 if (its
->creadr
== ITS_CMD_BUFFER_SIZE(its
->cbaser
))
1163 mutex_unlock(&its
->cmd_lock
);
1166 static unsigned long vgic_mmio_read_its_cwriter(struct kvm
*kvm
,
1167 struct vgic_its
*its
,
1168 gpa_t addr
, unsigned int len
)
1170 return extract_bytes(its
->cwriter
, addr
& 0x7, len
);
1173 static unsigned long vgic_mmio_read_its_creadr(struct kvm
*kvm
,
1174 struct vgic_its
*its
,
1175 gpa_t addr
, unsigned int len
)
1177 return extract_bytes(its
->creadr
, addr
& 0x7, len
);
1180 #define BASER_INDEX(addr) (((addr) / sizeof(u64)) & 0x7)
1181 static unsigned long vgic_mmio_read_its_baser(struct kvm
*kvm
,
1182 struct vgic_its
*its
,
1183 gpa_t addr
, unsigned int len
)
1187 switch (BASER_INDEX(addr
)) {
1189 reg
= its
->baser_device_table
;
1192 reg
= its
->baser_coll_table
;
1199 return extract_bytes(reg
, addr
& 7, len
);
1202 #define GITS_BASER_RO_MASK (GENMASK_ULL(52, 48) | GENMASK_ULL(58, 56))
1203 static void vgic_mmio_write_its_baser(struct kvm
*kvm
,
1204 struct vgic_its
*its
,
1205 gpa_t addr
, unsigned int len
,
1208 u64 entry_size
, device_type
;
1209 u64 reg
, *regptr
, clearbits
= 0;
1211 /* When GITS_CTLR.Enable is 1, we ignore write accesses. */
1215 switch (BASER_INDEX(addr
)) {
1217 regptr
= &its
->baser_device_table
;
1219 device_type
= GITS_BASER_TYPE_DEVICE
;
1222 regptr
= &its
->baser_coll_table
;
1224 device_type
= GITS_BASER_TYPE_COLLECTION
;
1225 clearbits
= GITS_BASER_INDIRECT
;
1231 reg
= update_64bit_reg(*regptr
, addr
& 7, len
, val
);
1232 reg
&= ~GITS_BASER_RO_MASK
;
1235 reg
|= (entry_size
- 1) << GITS_BASER_ENTRY_SIZE_SHIFT
;
1236 reg
|= device_type
<< GITS_BASER_TYPE_SHIFT
;
1237 reg
= vgic_sanitise_its_baser(reg
);
1242 #define REGISTER_ITS_DESC(off, rd, wr, length, acc) \
1244 .reg_offset = off, \
1246 .access_flags = acc, \
1251 static void its_mmio_write_wi(struct kvm
*kvm
, struct vgic_its
*its
,
1252 gpa_t addr
, unsigned int len
, unsigned long val
)
1257 static struct vgic_register_region its_registers
[] = {
1258 REGISTER_ITS_DESC(GITS_CTLR
,
1259 vgic_mmio_read_its_ctlr
, vgic_mmio_write_its_ctlr
, 4,
1261 REGISTER_ITS_DESC(GITS_IIDR
,
1262 vgic_mmio_read_its_iidr
, its_mmio_write_wi
, 4,
1264 REGISTER_ITS_DESC(GITS_TYPER
,
1265 vgic_mmio_read_its_typer
, its_mmio_write_wi
, 8,
1266 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1267 REGISTER_ITS_DESC(GITS_CBASER
,
1268 vgic_mmio_read_its_cbaser
, vgic_mmio_write_its_cbaser
, 8,
1269 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1270 REGISTER_ITS_DESC(GITS_CWRITER
,
1271 vgic_mmio_read_its_cwriter
, vgic_mmio_write_its_cwriter
, 8,
1272 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1273 REGISTER_ITS_DESC(GITS_CREADR
,
1274 vgic_mmio_read_its_creadr
, its_mmio_write_wi
, 8,
1275 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1276 REGISTER_ITS_DESC(GITS_BASER
,
1277 vgic_mmio_read_its_baser
, vgic_mmio_write_its_baser
, 0x40,
1278 VGIC_ACCESS_64bit
| VGIC_ACCESS_32bit
),
1279 REGISTER_ITS_DESC(GITS_IDREGS_BASE
,
1280 vgic_mmio_read_its_idregs
, its_mmio_write_wi
, 0x30,
1284 /* This is called on setting the LPI enable bit in the redistributor. */
1285 void vgic_enable_lpis(struct kvm_vcpu
*vcpu
)
1287 if (!(vcpu
->arch
.vgic_cpu
.pendbaser
& GICR_PENDBASER_PTZ
))
1288 its_sync_lpi_pending_table(vcpu
);
1291 static int vgic_its_init_its(struct kvm
*kvm
, struct vgic_its
*its
)
1293 struct vgic_io_device
*iodev
= &its
->iodev
;
1296 if (its
->initialized
)
1299 if (IS_VGIC_ADDR_UNDEF(its
->vgic_its_base
))
1302 iodev
->regions
= its_registers
;
1303 iodev
->nr_regions
= ARRAY_SIZE(its_registers
);
1304 kvm_iodevice_init(&iodev
->dev
, &kvm_io_gic_ops
);
1306 iodev
->base_addr
= its
->vgic_its_base
;
1307 iodev
->iodev_type
= IODEV_ITS
;
1309 mutex_lock(&kvm
->slots_lock
);
1310 ret
= kvm_io_bus_register_dev(kvm
, KVM_MMIO_BUS
, iodev
->base_addr
,
1311 KVM_VGIC_V3_ITS_SIZE
, &iodev
->dev
);
1312 mutex_unlock(&kvm
->slots_lock
);
1315 its
->initialized
= true;
1320 #define INITIAL_BASER_VALUE \
1321 (GIC_BASER_CACHEABILITY(GITS_BASER, INNER, RaWb) | \
1322 GIC_BASER_CACHEABILITY(GITS_BASER, OUTER, SameAsInner) | \
1323 GIC_BASER_SHAREABILITY(GITS_BASER, InnerShareable) | \
1324 ((8ULL - 1) << GITS_BASER_ENTRY_SIZE_SHIFT) | \
1325 GITS_BASER_PAGE_SIZE_64K)
1327 #define INITIAL_PROPBASER_VALUE \
1328 (GIC_BASER_CACHEABILITY(GICR_PROPBASER, INNER, RaWb) | \
1329 GIC_BASER_CACHEABILITY(GICR_PROPBASER, OUTER, SameAsInner) | \
1330 GIC_BASER_SHAREABILITY(GICR_PROPBASER, InnerShareable))
1332 static int vgic_its_create(struct kvm_device
*dev
, u32 type
)
1334 struct vgic_its
*its
;
1336 if (type
!= KVM_DEV_TYPE_ARM_VGIC_ITS
)
1339 its
= kzalloc(sizeof(struct vgic_its
), GFP_KERNEL
);
1343 mutex_init(&its
->its_lock
);
1344 mutex_init(&its
->cmd_lock
);
1346 its
->vgic_its_base
= VGIC_ADDR_UNDEF
;
1348 INIT_LIST_HEAD(&its
->device_list
);
1349 INIT_LIST_HEAD(&its
->collection_list
);
1351 dev
->kvm
->arch
.vgic
.has_its
= true;
1352 its
->initialized
= false;
1353 its
->enabled
= false;
1356 its
->baser_device_table
= INITIAL_BASER_VALUE
|
1357 ((u64
)GITS_BASER_TYPE_DEVICE
<< GITS_BASER_TYPE_SHIFT
);
1358 its
->baser_coll_table
= INITIAL_BASER_VALUE
|
1359 ((u64
)GITS_BASER_TYPE_COLLECTION
<< GITS_BASER_TYPE_SHIFT
);
1360 dev
->kvm
->arch
.vgic
.propbaser
= INITIAL_PROPBASER_VALUE
;
1367 static void vgic_its_destroy(struct kvm_device
*kvm_dev
)
1369 struct kvm
*kvm
= kvm_dev
->kvm
;
1370 struct vgic_its
*its
= kvm_dev
->private;
1371 struct its_device
*dev
;
1372 struct its_itte
*itte
;
1373 struct list_head
*dev_cur
, *dev_temp
;
1374 struct list_head
*cur
, *temp
;
1377 * We may end up here without the lists ever having been initialized.
1378 * Check this and bail out early to avoid dereferencing a NULL pointer.
1380 if (!its
->device_list
.next
)
1383 mutex_lock(&its
->its_lock
);
1384 list_for_each_safe(dev_cur
, dev_temp
, &its
->device_list
) {
1385 dev
= container_of(dev_cur
, struct its_device
, dev_list
);
1386 list_for_each_safe(cur
, temp
, &dev
->itt_head
) {
1387 itte
= (container_of(cur
, struct its_itte
, itte_list
));
1388 its_free_itte(kvm
, itte
);
1394 list_for_each_safe(cur
, temp
, &its
->collection_list
) {
1396 kfree(container_of(cur
, struct its_collection
, coll_list
));
1398 mutex_unlock(&its
->its_lock
);
1403 static int vgic_its_has_attr(struct kvm_device
*dev
,
1404 struct kvm_device_attr
*attr
)
1406 switch (attr
->group
) {
1407 case KVM_DEV_ARM_VGIC_GRP_ADDR
:
1408 switch (attr
->attr
) {
1409 case KVM_VGIC_ITS_ADDR_TYPE
:
1413 case KVM_DEV_ARM_VGIC_GRP_CTRL
:
1414 switch (attr
->attr
) {
1415 case KVM_DEV_ARM_VGIC_CTRL_INIT
:
1423 static int vgic_its_set_attr(struct kvm_device
*dev
,
1424 struct kvm_device_attr
*attr
)
1426 struct vgic_its
*its
= dev
->private;
1429 switch (attr
->group
) {
1430 case KVM_DEV_ARM_VGIC_GRP_ADDR
: {
1431 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
1432 unsigned long type
= (unsigned long)attr
->attr
;
1435 if (type
!= KVM_VGIC_ITS_ADDR_TYPE
)
1438 if (its
->initialized
)
1441 if (copy_from_user(&addr
, uaddr
, sizeof(addr
)))
1444 ret
= vgic_check_ioaddr(dev
->kvm
, &its
->vgic_its_base
,
1449 its
->vgic_its_base
= addr
;
1453 case KVM_DEV_ARM_VGIC_GRP_CTRL
:
1454 switch (attr
->attr
) {
1455 case KVM_DEV_ARM_VGIC_CTRL_INIT
:
1456 return vgic_its_init_its(dev
->kvm
, its
);
1463 static int vgic_its_get_attr(struct kvm_device
*dev
,
1464 struct kvm_device_attr
*attr
)
1466 switch (attr
->group
) {
1467 case KVM_DEV_ARM_VGIC_GRP_ADDR
: {
1468 struct vgic_its
*its
= dev
->private;
1469 u64 addr
= its
->vgic_its_base
;
1470 u64 __user
*uaddr
= (u64 __user
*)(long)attr
->addr
;
1471 unsigned long type
= (unsigned long)attr
->attr
;
1473 if (type
!= KVM_VGIC_ITS_ADDR_TYPE
)
1476 if (copy_to_user(uaddr
, &addr
, sizeof(addr
)))
1487 static struct kvm_device_ops kvm_arm_vgic_its_ops
= {
1488 .name
= "kvm-arm-vgic-its",
1489 .create
= vgic_its_create
,
1490 .destroy
= vgic_its_destroy
,
1491 .set_attr
= vgic_its_set_attr
,
1492 .get_attr
= vgic_its_get_attr
,
1493 .has_attr
= vgic_its_has_attr
,
1496 int kvm_vgic_register_its_device(void)
1498 return kvm_register_device_ops(&kvm_arm_vgic_its_ops
,
1499 KVM_DEV_TYPE_ARM_VGIC_ITS
);