2 * Copyright (C) 2001 MandrakeSoft S.A.
3 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
8 * http://www.linux-mandrake.com/
9 * http://www.mandrakesoft.com/
11 * This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU Lesser General Public
13 * License as published by the Free Software Foundation; either
14 * version 2 of the License, or (at your option) any later version.
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * Lesser General Public License for more details.
21 * You should have received a copy of the GNU Lesser General Public
22 * License along with this library; if not, write to the Free Software
23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 * Yunhong Jiang <yunhong.jiang@intel.com>
26 * Yaozu (Eddie) Dong <eddie.dong@intel.com>
27 * Based on Xen 3.1 code.
30 #include <linux/kvm_host.h>
31 #include <linux/kvm.h>
33 #include <linux/highmem.h>
34 #include <linux/smp.h>
35 #include <linux/hrtimer.h>
37 #include <linux/slab.h>
38 #include <linux/export.h>
39 #include <asm/processor.h>
41 #include <asm/current.h>
42 #include <trace/events/kvm.h>
49 #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
51 #define ioapic_debug(fmt, arg...)
53 static int ioapic_deliver(struct kvm_ioapic
*vioapic
, int irq
,
56 static unsigned long ioapic_read_indirect(struct kvm_ioapic
*ioapic
,
60 unsigned long result
= 0;
62 switch (ioapic
->ioregsel
) {
63 case IOAPIC_REG_VERSION
:
64 result
= ((((IOAPIC_NUM_PINS
- 1) & 0xff) << 16)
65 | (IOAPIC_VERSION_ID
& 0xff));
68 case IOAPIC_REG_APIC_ID
:
69 case IOAPIC_REG_ARB_ID
:
70 result
= ((ioapic
->id
& 0xf) << 24);
75 u32 redir_index
= (ioapic
->ioregsel
- 0x10) >> 1;
78 if (redir_index
< IOAPIC_NUM_PINS
)
80 ioapic
->redirtbl
[redir_index
].bits
;
82 redir_content
= ~0ULL;
84 result
= (ioapic
->ioregsel
& 0x1) ?
85 (redir_content
>> 32) & 0xffffffff :
86 redir_content
& 0xffffffff;
94 static void rtc_irq_eoi_tracking_reset(struct kvm_ioapic
*ioapic
)
96 ioapic
->rtc_status
.pending_eoi
= 0;
97 bitmap_zero(ioapic
->rtc_status
.dest_map
, KVM_MAX_VCPUS
);
100 static void __rtc_irq_eoi_tracking_restore_one(struct kvm_vcpu
*vcpu
)
102 bool new_val
, old_val
;
103 struct kvm_ioapic
*ioapic
= vcpu
->kvm
->arch
.vioapic
;
104 union kvm_ioapic_redirect_entry
*e
;
106 e
= &ioapic
->redirtbl
[RTC_GSI
];
107 if (!kvm_apic_match_dest(vcpu
, NULL
, 0, e
->fields
.dest_id
,
108 e
->fields
.dest_mode
))
111 new_val
= kvm_apic_pending_eoi(vcpu
, e
->fields
.vector
);
112 old_val
= test_bit(vcpu
->vcpu_id
, ioapic
->rtc_status
.dest_map
);
114 if (new_val
== old_val
)
118 __set_bit(vcpu
->vcpu_id
, ioapic
->rtc_status
.dest_map
);
119 ioapic
->rtc_status
.pending_eoi
++;
121 __clear_bit(vcpu
->vcpu_id
, ioapic
->rtc_status
.dest_map
);
122 ioapic
->rtc_status
.pending_eoi
--;
125 WARN_ON(ioapic
->rtc_status
.pending_eoi
< 0);
128 void kvm_rtc_eoi_tracking_restore_one(struct kvm_vcpu
*vcpu
)
130 struct kvm_ioapic
*ioapic
= vcpu
->kvm
->arch
.vioapic
;
132 spin_lock(&ioapic
->lock
);
133 __rtc_irq_eoi_tracking_restore_one(vcpu
);
134 spin_unlock(&ioapic
->lock
);
137 static void kvm_rtc_eoi_tracking_restore_all(struct kvm_ioapic
*ioapic
)
139 struct kvm_vcpu
*vcpu
;
142 if (RTC_GSI
>= IOAPIC_NUM_PINS
)
145 rtc_irq_eoi_tracking_reset(ioapic
);
146 kvm_for_each_vcpu(i
, vcpu
, ioapic
->kvm
)
147 __rtc_irq_eoi_tracking_restore_one(vcpu
);
150 static int ioapic_service(struct kvm_ioapic
*ioapic
, unsigned int idx
,
153 union kvm_ioapic_redirect_entry
*pent
;
156 pent
= &ioapic
->redirtbl
[idx
];
158 if (!pent
->fields
.mask
) {
159 injected
= ioapic_deliver(ioapic
, idx
, line_status
);
160 if (injected
&& pent
->fields
.trig_mode
== IOAPIC_LEVEL_TRIG
)
161 pent
->fields
.remote_irr
= 1;
167 static void update_handled_vectors(struct kvm_ioapic
*ioapic
)
169 DECLARE_BITMAP(handled_vectors
, 256);
172 memset(handled_vectors
, 0, sizeof(handled_vectors
));
173 for (i
= 0; i
< IOAPIC_NUM_PINS
; ++i
)
174 __set_bit(ioapic
->redirtbl
[i
].fields
.vector
, handled_vectors
);
175 memcpy(ioapic
->handled_vectors
, handled_vectors
,
176 sizeof(handled_vectors
));
180 void kvm_ioapic_calculate_eoi_exitmap(struct kvm_vcpu
*vcpu
,
181 u64
*eoi_exit_bitmap
)
183 struct kvm_ioapic
*ioapic
= vcpu
->kvm
->arch
.vioapic
;
184 union kvm_ioapic_redirect_entry
*e
;
187 spin_lock(&ioapic
->lock
);
188 /* traverse ioapic entry to set eoi exit bitmap*/
189 for (index
= 0; index
< IOAPIC_NUM_PINS
; index
++) {
190 e
= &ioapic
->redirtbl
[index
];
191 if (!e
->fields
.mask
&&
192 (e
->fields
.trig_mode
== IOAPIC_LEVEL_TRIG
||
193 kvm_irq_has_notifier(ioapic
->kvm
, KVM_IRQCHIP_IOAPIC
,
194 index
) || index
== RTC_GSI
)) {
195 if (kvm_apic_match_dest(vcpu
, NULL
, 0,
196 e
->fields
.dest_id
, e
->fields
.dest_mode
))
197 __set_bit(e
->fields
.vector
, (unsigned long *)eoi_exit_bitmap
);
200 spin_unlock(&ioapic
->lock
);
202 EXPORT_SYMBOL_GPL(kvm_ioapic_calculate_eoi_exitmap
);
204 void kvm_ioapic_make_eoibitmap_request(struct kvm
*kvm
)
206 struct kvm_ioapic
*ioapic
= kvm
->arch
.vioapic
;
208 if (!kvm_apic_vid_enabled(kvm
) || !ioapic
)
210 kvm_make_update_eoibitmap_request(kvm
);
213 static void ioapic_write_indirect(struct kvm_ioapic
*ioapic
, u32 val
)
216 bool mask_before
, mask_after
;
217 union kvm_ioapic_redirect_entry
*e
;
219 switch (ioapic
->ioregsel
) {
220 case IOAPIC_REG_VERSION
:
221 /* Writes are ignored. */
224 case IOAPIC_REG_APIC_ID
:
225 ioapic
->id
= (val
>> 24) & 0xf;
228 case IOAPIC_REG_ARB_ID
:
232 index
= (ioapic
->ioregsel
- 0x10) >> 1;
234 ioapic_debug("change redir index %x val %x\n", index
, val
);
235 if (index
>= IOAPIC_NUM_PINS
)
237 e
= &ioapic
->redirtbl
[index
];
238 mask_before
= e
->fields
.mask
;
239 if (ioapic
->ioregsel
& 1) {
240 e
->bits
&= 0xffffffff;
241 e
->bits
|= (u64
) val
<< 32;
243 e
->bits
&= ~0xffffffffULL
;
244 e
->bits
|= (u32
) val
;
245 e
->fields
.remote_irr
= 0;
247 update_handled_vectors(ioapic
);
248 mask_after
= e
->fields
.mask
;
249 if (mask_before
!= mask_after
)
250 kvm_fire_mask_notifiers(ioapic
->kvm
, KVM_IRQCHIP_IOAPIC
, index
, mask_after
);
251 if (e
->fields
.trig_mode
== IOAPIC_LEVEL_TRIG
252 && ioapic
->irr
& (1 << index
))
253 ioapic_service(ioapic
, index
, false);
254 kvm_ioapic_make_eoibitmap_request(ioapic
->kvm
);
259 static int ioapic_deliver(struct kvm_ioapic
*ioapic
, int irq
, bool line_status
)
261 union kvm_ioapic_redirect_entry
*entry
= &ioapic
->redirtbl
[irq
];
262 struct kvm_lapic_irq irqe
;
264 ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x "
265 "vector=%x trig_mode=%x\n",
266 entry
->fields
.dest_id
, entry
->fields
.dest_mode
,
267 entry
->fields
.delivery_mode
, entry
->fields
.vector
,
268 entry
->fields
.trig_mode
);
270 irqe
.dest_id
= entry
->fields
.dest_id
;
271 irqe
.vector
= entry
->fields
.vector
;
272 irqe
.dest_mode
= entry
->fields
.dest_mode
;
273 irqe
.trig_mode
= entry
->fields
.trig_mode
;
274 irqe
.delivery_mode
= entry
->fields
.delivery_mode
<< 8;
278 return kvm_irq_delivery_to_apic(ioapic
->kvm
, NULL
, &irqe
, NULL
);
281 int kvm_ioapic_set_irq(struct kvm_ioapic
*ioapic
, int irq
, int irq_source_id
,
282 int level
, bool line_status
)
286 union kvm_ioapic_redirect_entry entry
;
289 BUG_ON(irq
< 0 || irq
>= IOAPIC_NUM_PINS
);
291 spin_lock(&ioapic
->lock
);
292 old_irr
= ioapic
->irr
;
293 irq_level
= __kvm_irq_line_state(&ioapic
->irq_states
[irq
],
294 irq_source_id
, level
);
295 entry
= ioapic
->redirtbl
[irq
];
296 irq_level
^= entry
.fields
.polarity
;
298 ioapic
->irr
&= ~mask
;
301 int edge
= (entry
.fields
.trig_mode
== IOAPIC_EDGE_TRIG
);
303 if ((edge
&& old_irr
!= ioapic
->irr
) ||
304 (!edge
&& !entry
.fields
.remote_irr
))
305 ret
= ioapic_service(ioapic
, irq
, line_status
);
307 ret
= 0; /* report coalesced interrupt */
309 trace_kvm_ioapic_set_irq(entry
.bits
, irq
, ret
== 0);
310 spin_unlock(&ioapic
->lock
);
315 void kvm_ioapic_clear_all(struct kvm_ioapic
*ioapic
, int irq_source_id
)
319 spin_lock(&ioapic
->lock
);
320 for (i
= 0; i
< KVM_IOAPIC_NUM_PINS
; i
++)
321 __clear_bit(irq_source_id
, &ioapic
->irq_states
[i
]);
322 spin_unlock(&ioapic
->lock
);
325 static void __kvm_ioapic_update_eoi(struct kvm_vcpu
*vcpu
,
326 struct kvm_ioapic
*ioapic
, int vector
, int trigger_mode
)
330 for (i
= 0; i
< IOAPIC_NUM_PINS
; i
++) {
331 union kvm_ioapic_redirect_entry
*ent
= &ioapic
->redirtbl
[i
];
333 if (ent
->fields
.vector
!= vector
)
337 * We are dropping lock while calling ack notifiers because ack
338 * notifier callbacks for assigned devices call into IOAPIC
339 * recursively. Since remote_irr is cleared only after call
340 * to notifiers if the same vector will be delivered while lock
341 * is dropped it will be put into irr and will be delivered
342 * after ack notifier returns.
344 spin_unlock(&ioapic
->lock
);
345 kvm_notify_acked_irq(ioapic
->kvm
, KVM_IRQCHIP_IOAPIC
, i
);
346 spin_lock(&ioapic
->lock
);
348 if (trigger_mode
!= IOAPIC_LEVEL_TRIG
)
351 ASSERT(ent
->fields
.trig_mode
== IOAPIC_LEVEL_TRIG
);
352 ent
->fields
.remote_irr
= 0;
353 if (!ent
->fields
.mask
&& (ioapic
->irr
& (1 << i
)))
354 ioapic_service(ioapic
, i
, false);
358 bool kvm_ioapic_handles_vector(struct kvm
*kvm
, int vector
)
360 struct kvm_ioapic
*ioapic
= kvm
->arch
.vioapic
;
362 return test_bit(vector
, ioapic
->handled_vectors
);
365 void kvm_ioapic_update_eoi(struct kvm_vcpu
*vcpu
, int vector
, int trigger_mode
)
367 struct kvm_ioapic
*ioapic
= vcpu
->kvm
->arch
.vioapic
;
369 spin_lock(&ioapic
->lock
);
370 __kvm_ioapic_update_eoi(vcpu
, ioapic
, vector
, trigger_mode
);
371 spin_unlock(&ioapic
->lock
);
374 static inline struct kvm_ioapic
*to_ioapic(struct kvm_io_device
*dev
)
376 return container_of(dev
, struct kvm_ioapic
, dev
);
379 static inline int ioapic_in_range(struct kvm_ioapic
*ioapic
, gpa_t addr
)
381 return ((addr
>= ioapic
->base_address
&&
382 (addr
< ioapic
->base_address
+ IOAPIC_MEM_LENGTH
)));
385 static int ioapic_mmio_read(struct kvm_io_device
*this, gpa_t addr
, int len
,
388 struct kvm_ioapic
*ioapic
= to_ioapic(this);
390 if (!ioapic_in_range(ioapic
, addr
))
393 ioapic_debug("addr %lx\n", (unsigned long)addr
);
394 ASSERT(!(addr
& 0xf)); /* check alignment */
397 spin_lock(&ioapic
->lock
);
399 case IOAPIC_REG_SELECT
:
400 result
= ioapic
->ioregsel
;
403 case IOAPIC_REG_WINDOW
:
404 result
= ioapic_read_indirect(ioapic
, addr
, len
);
411 spin_unlock(&ioapic
->lock
);
415 *(u64
*) val
= result
;
420 memcpy(val
, (char *)&result
, len
);
423 printk(KERN_WARNING
"ioapic: wrong length %d\n", len
);
428 static int ioapic_mmio_write(struct kvm_io_device
*this, gpa_t addr
, int len
,
431 struct kvm_ioapic
*ioapic
= to_ioapic(this);
433 if (!ioapic_in_range(ioapic
, addr
))
436 ioapic_debug("ioapic_mmio_write addr=%p len=%d val=%p\n",
437 (void*)addr
, len
, val
);
438 ASSERT(!(addr
& 0xf)); /* check alignment */
452 printk(KERN_WARNING
"ioapic: Unsupported size %d\n", len
);
457 spin_lock(&ioapic
->lock
);
459 case IOAPIC_REG_SELECT
:
460 ioapic
->ioregsel
= data
& 0xFF; /* 8-bit register */
463 case IOAPIC_REG_WINDOW
:
464 ioapic_write_indirect(ioapic
, data
);
468 __kvm_ioapic_update_eoi(NULL
, ioapic
, data
, IOAPIC_LEVEL_TRIG
);
475 spin_unlock(&ioapic
->lock
);
479 void kvm_ioapic_reset(struct kvm_ioapic
*ioapic
)
483 for (i
= 0; i
< IOAPIC_NUM_PINS
; i
++)
484 ioapic
->redirtbl
[i
].fields
.mask
= 1;
485 ioapic
->base_address
= IOAPIC_DEFAULT_BASE_ADDRESS
;
486 ioapic
->ioregsel
= 0;
489 rtc_irq_eoi_tracking_reset(ioapic
);
490 update_handled_vectors(ioapic
);
493 static const struct kvm_io_device_ops ioapic_mmio_ops
= {
494 .read
= ioapic_mmio_read
,
495 .write
= ioapic_mmio_write
,
498 int kvm_ioapic_init(struct kvm
*kvm
)
500 struct kvm_ioapic
*ioapic
;
503 ioapic
= kzalloc(sizeof(struct kvm_ioapic
), GFP_KERNEL
);
506 spin_lock_init(&ioapic
->lock
);
507 kvm
->arch
.vioapic
= ioapic
;
508 kvm_ioapic_reset(ioapic
);
509 kvm_iodevice_init(&ioapic
->dev
, &ioapic_mmio_ops
);
511 mutex_lock(&kvm
->slots_lock
);
512 ret
= kvm_io_bus_register_dev(kvm
, KVM_MMIO_BUS
, ioapic
->base_address
,
513 IOAPIC_MEM_LENGTH
, &ioapic
->dev
);
514 mutex_unlock(&kvm
->slots_lock
);
516 kvm
->arch
.vioapic
= NULL
;
523 void kvm_ioapic_destroy(struct kvm
*kvm
)
525 struct kvm_ioapic
*ioapic
= kvm
->arch
.vioapic
;
528 kvm_io_bus_unregister_dev(kvm
, KVM_MMIO_BUS
, &ioapic
->dev
);
529 kvm
->arch
.vioapic
= NULL
;
534 int kvm_get_ioapic(struct kvm
*kvm
, struct kvm_ioapic_state
*state
)
536 struct kvm_ioapic
*ioapic
= ioapic_irqchip(kvm
);
540 spin_lock(&ioapic
->lock
);
541 memcpy(state
, ioapic
, sizeof(struct kvm_ioapic_state
));
542 spin_unlock(&ioapic
->lock
);
546 int kvm_set_ioapic(struct kvm
*kvm
, struct kvm_ioapic_state
*state
)
548 struct kvm_ioapic
*ioapic
= ioapic_irqchip(kvm
);
552 spin_lock(&ioapic
->lock
);
553 memcpy(ioapic
, state
, sizeof(struct kvm_ioapic_state
));
554 update_handled_vectors(ioapic
);
555 kvm_ioapic_make_eoibitmap_request(kvm
);
556 kvm_rtc_eoi_tracking_restore_all(ioapic
);
557 spin_unlock(&ioapic
->lock
);