Z80 Dependent Features
**********************

Command-line Options
====================

-march=CPU[-EXT...][+EXT...]
     This option specifies the target processor. The assembler will issue an error message if an attempt is made to assemble an instruction which will not execute on the target processor. The following processor names are recognized: z80, z180, ez80, gbz80, z80n, r800. In addition to the basic instruction set, the assembler can be told to accept some extention mnemonics. For example, -march=z180+sli+infc extends Z180 with SLI instructions and IN F,(C). The following extentions are currently supported: full (all known instructions), adl (ADL CPU mode by default, eZ80 only), sli (instruction known as SLI, SLL or SL1), xyhl (instructions with halves of index registers: IXL, IXH, IYL, IYH), xdcb (instructions like ROTOP (II+D),R and BITOP N,(II+D),R), infc (instruction IN F,(C) or IN (C)), outc0 (instruction OUT (C),0). Note that rather than extending a basic instruction set, the extention mnemonics starting with - revoke the respective functionality: -march=z80-full+xyhl first removes all default extentions and adds support for index registers halves only.

     If this option is not specified then -march=z80+xyhl+infc is assumed.

-local-prefix=PREFIX
     Mark all labels with specified prefix as local. But such label can be marked global explicitly in the code. This option do not change default local label prefix .L, it is just adds new one.

-colonless
     Accept colonless labels. All symbols at line begin are treated as labels.

-sdcc
     Accept assembler code produced by SDCC.

-fp-s=FORMAT
     Single precision floating point numbers format. Default: ieee754 (32 bit).

-fp-d=FORMAT
     Double precision floating point numbers format. Default: ieee754 (64 bit).

Floating point numbers formats.

ieee754
     Single or double precision IEEE754 compatible format.

half
     Half precision IEEE754 compatible format (16 bits).

single
     Single precision IEEE754 compatible format (32 bits).

double
     Double precision IEEE754 compatible format (64 bits).

zeda32
     32 bit floating point format from z80float library by Zeda.

math48
     48 bit floating point format from Math48 package by Anders Hejlsberg.

Syntax
======

The assembler syntax closely follows the 'Z80 family CPU User Manual' by Zilog. In expressions a single = may be used as ``is equal to'' comparison operator.

Suffices can be used to indicate the radix of integer constants; H or h for hexadecimal, D or d for decimal, Q, O, q or o for octal, and B for binary.

The suffix b denotes a backreference to local label.

Special Characters
------------------

The semicolon ; is the line comment character;

If a # appears as the first character of a line then the whole line is treated as a comment, but in this case the line could also be a logical line number directive (see Comments) or a preprocessor control command (see Preprocessing).

The Z80 assembler does not support a line separator character.

The dollar sign $ can be used as a prefix for hexadecimal numbers and as a symbol denoting the current location counter.

A backslash \ is an ordinary character for the Z80 assembler.

The single quote ' must be followed by a closing quote. If there is one character in between, it is a character constant, otherwise it is a string constant.

Register Names
--------------

The registers are referred to with the letters assigned to them by Zilog. In addition AS recognizes ixl and ixh as the least and most significant octet in ix, and similarly iyl and  iyh as parts of iy.

Case Sensitivity
----------------

Upper and lower case are equivalent in register names, opcodes, condition codes  and assembler directives. The case of letters is significant in labels and symbol names. The case is also important to distinguish the suffix b for a backward reference to a local label from the suffix B for a number in binary notation.

Labels
------

Labels started by .L acts as local labels. You may specify custom local label prefix by -local-prefix command-line option. Dollar, forward and backward local labels are supported. By default, all labels are followed by colon. Legacy code with colonless labels can be built with -colonless command-line option specified. In this case all tokens at line begin are treated as labels.

Floating Point
==============

Floating-point numbers of following types are supported:

ieee754
     Supported half, single and double precision IEEE754 compatible numbers.

zeda32
     32 bit floating point numbers from z80float library by Zeda.

math48
     48 bit floating point numbers from Math48 package by Anders Hejlsberg.

Z80 Assembler Directives
========================

AS for the Z80 supports some additional directives for compatibility with other assemblers.

These are the additional directives in AS for the Z80:

.assume ADL = EXPRESSION
     Set ADL status for eZ80. Non-zero value enable compilation in ADL mode else used Z80 mode. ADL and Z80 mode produces incompatible object code. Mixing both of them within one binary may lead problems with disassembler.

db EXPRESSION|STRING[,EXPRESSION|STRING...]
defb EXPRESSION|STRING[,EXPRESSION|STRING...]
defm STRING[,STRING...]
     For each STRING the characters are copied to the object file, for each other EXPRESSION the value is stored in one byte. A warning is issued in case of an overflow. Backslash symbol in the strings is generic symbol, it cannot be used as escape character (see .ascii).

dw EXPRESSION[,EXPRESSION...]
defw EXPRESSION[,EXPRESSION...]
     For each EXPRESSION the value is stored in two bytes, ignoring overflow.

d24 EXPRESSION[,EXPRESSION...]
def24 EXPRESSION[,EXPRESSION...]
     For each EXPRESSION the value is stored in three bytes, ignoring overflow.

d32 EXPRESSION[,EXPRESSION...]
def32 EXPRESSION[,EXPRESSION...]
     For each EXPRESSION the value is stored in four bytes, ignoring overflow.

ds COUNT[, VALUE]
defs COUNT[, VALUE]
     Fill COUNT bytes in the object file with VALUE, if VALUE is omitted it defaults to zero.

SYMBOL defl EXPRESSION
     The defl directive is like .set but with different syntax (see .set). It set the value of SYMBOL to EXPRESSION. Symbols defined with defl are not protected from redefinition.

SYMBOL equ EXPRESSION
     The equ directive is like .equiv but with different syntax (see .equiv). It set the value of SYMBOL to EXPRESSION. It is an error if SYMBOL is already defined. Symbols defined with equ are not protected from redefinition.

psect NAME
     A synonym for .section, no second argument should be given (see .section).

xdef SYMBOL
     A synonym for .global, make SYMBOL is visible to linker (see .global).

xref NAME
     A synonym for .extern (.extern).

Opcodes
=======

In line with common practice, Z80 mnemonics are used for the Z80, Z80N, Z180, eZ80, Ascii R800 and the GameBoy Z80.

In many instructions it is possible to use one of the half index registers (ixl,ixh,iyl,iyh) in stead of an 8-bit general purpose register. This yields instructions that are documented on the eZ80 and the R800, undocumented on the Z80 and unsupported on the Z180. Similarly in f,(c) is documented on the R800, undocumented on the Z80 and unsupported on the Z180 and the eZ80.

The assembler also supports the following undocumented Z80-instructions, that have not been adopted in any other instruction set:

out (c),0
     Sends zero to the port pointed to by register C.

sli M
     Equivalent to M = (M<<1)+1, the operand M can be any operand that is valid for sla. One can use sll as a synonym for sli.

OP (ix+D), R
     This is equivalent to

          ld R, (ix+D)
          OP R
          ld (ix+D), R

     The operation OP may be any of res B,, set B,, rl, rlc, rr, rrc, sla, sli, sra and srl, and the register R may be any of a, b, c, d, e, h and l.

OP (iy+D), R
     As above, but with iy instead of ix.

The web site at http://www.z80.info is a good starting place to find more information on programming the Z80.

You may enable or disable any of these instructions for any target CPU even this instruction is not supported by any real CPU of this type. Useful for custom CPU cores.