2004-11-08 Inderpreet Singh Vineet Sharma * maxq.h: New file: Disassembly information for the maxq port. 2004-11-05 H.J. Lu * i386.h (i386_optab): Put back "movzb". 2004-11-04 Hans-Peter Nilsson * cris.h (enum cris_insn_version_usage): Tweak formatting and comments. Remove member cris_ver_sim. Add members cris_ver_sim_v0_10, cris_ver_v0_10, cris_ver_v3_10, cris_ver_v8_10, cris_ver_v10, cris_ver_v10p. (struct cris_support_reg, struct cris_cond15): New types. (cris_conds15): Declare. (JUMP_PC_INCR_OPCODE_V32, BA_DWORD_OPCODE, NOP_OPCODE_COMMON) (NOP_OPCODE_ZBITS_COMMON, LAPC_DWORD_OPCODE, LAPC_DWORD_Z_BITS) (NOP_OPCODE_V32, NOP_Z_BITS_V32): New macros. (NOP_Z_BITS): Define in terms of NOP_OPCODE. (cris_imm_oprnd_size_type): New members SIZE_FIELD_SIGNED and SIZE_FIELD_UNSIGNED. 2004-11-04 Jan Beulich * i386.h (sldx_Suf): Remove. (FP, l_FP, sl_FP, x_FP): Don't imply IgnoreSize. (q_FP): Define, implying no REX64. (x_FP, sl_FP): Imply FloatMF. (i386_optab): Split reg and mem forms of moving from segment registers so that the memory forms can ignore the 16-/32-bit operand size distinction. Adjust a few others for Intel mode. Remove *FP uses from all non-floating-point instructions. Unite 32- and 64-bit forms of movsx, movzx, and movd. Adjust floating point operations for the above changes to the *FP macros. Add DefaultSize to floating point control insns operating on larger memory ranges. Remove left over comments hinting at certain insns being Intel-syntax ones where the ones actually meant are already gone. 2004-10-07 Tomer Levi * crx.h: Add COPS_REG_INS - Coprocessor Special register instruction type. 2004-09-30 Paul Brook * arm.h (ARM_EXT_V6K, ARM_EXT_V6Z): Define. (ARM_ARCH_V6K, ARM_ARCH_V6Z, ARM_ARCH_V6ZK): Define. 2004-09-11 Theodore A. Roth * avr.h: Add support for atmega48, atmega88, atmega168, attiny13, attiny2313, at90can128. 2004-09-09 Segher Boessenkool * ppc.h (PPC_OPERAND_OPTIONAL): Fix comment. 2004-08-24 Dmitry Diky * msp430.h (msp430_opc): Add new instructions. (msp430_rcodes): Declare new instructions. (msp430_hcodes): Likewise.. 2004-08-13 Nick Clifton PR/301 * h8300.h (O_JSR): Do not allow VECIND addressing for non-SX processors. 2004-08-30 Michal Ludvig * i386.h (i386_optab): Added montmul/xsha1/xsha256 insns. 2004-07-22 H.J. Lu * i386.h (i386_optab): Allow cs/ds in 64bit for branch hints. 2004-07-21 Jan Beulich * i386.h: Adjust instruction descriptions to better match the specification. 2004-07-16 Richard Earnshaw * arm.h: Remove all old content. Replace with architecture defines from gas/config/tc-arm.c. 2004-07-09 Andreas Schwab * m68k.h: Fix comment. 2004-07-07 Tomer Levi * crx.h: New file. 2004-06-24 Alan Modra * i386.h (i386_optab): Remove fildd, fistpd and fisttpd. 2004-05-24 Peter Barada * m68k.h: Add 'size' to m68k_opcode. 2004-05-05 Peter Barada * m68k.h: Switch from ColdFire chip name to core variant. 2004-04-22 Peter Barada * m68k.h: Add mcfmac/mcfemac definitions. Update operand descriptions for new EMAC cases. Remove ColdFire macmw/macml/msacmw/msacmw hacks and properly handle Motorola MAC syntax. Allow disassembly of ColdFire V4e object files. 2004-03-16 Alan Modra * ppc.h (PPC_OPERAND_GPR_0): Define. Bump other operand defines. 2004-03-12 Jakub Jelinek * i386.h (i386_optab): Remove CpuNo64 from sysenter and sysexit. 2004-03-12 Michal Ludvig * i386.h (i386_optab): Added xstore as an alias for xstorerng. 2004-03-12 Michal Ludvig * i386.h (i386_optab): Added xstore/xcrypt insns. 2004-02-09 Anil Paranjpe * h8300.h (32bit ldc/stc): Add relaxing support. 2004-01-12 Anil Paranjpe * h8300.h (BITOP): Pass MEMRELAX flag. 2004-01-09 Anil Paranjpe * h8300.h (BITOP): Dissallow operations on @aa:16 and @aa:32 except for the H8S. For older changes see ChangeLog-9103 Local Variables: mode: change-log left-margin: 8 fill-column: 74 version-control: never End: