/* GNU/Linux on ARM native support.
- Copyright (C) 1999-2015 Free Software Foundation, Inc.
+ Copyright (C) 1999-2016 Free Software Foundation, Inc.
This file is part of GDB.
#include "arm-tdep.h"
#include "arm-linux-tdep.h"
+#include "aarch32-linux-nat.h"
#include <elf/common.h>
#include <sys/user.h>
-#include <sys/ptrace.h>
+#include "nat/gdb_ptrace.h"
#include <sys/utsname.h>
#include <sys/procfs.h>
extern int arm_apcs_32;
-/* On GNU/Linux, threads are implemented as pseudo-processes, in which
- case we may be tracing more than one process at a time. In that
- case, inferior_ptid will contain the main process ID and the
- individual thread (process) ID. get_thread_id () is used to get
- the thread id if it's available, and the process id otherwise. */
-
-static int
-get_thread_id (ptid_t ptid)
-{
- int tid = ptid_get_lwp (ptid);
- if (0 == tid)
- tid = ptid_get_pid (ptid);
- return tid;
-}
-
-#define GET_THREAD_ID(PTID) get_thread_id (PTID)
-
/* Get the whole floating point state of the process and store it
into regcache. */
gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
+ tid = ptid_get_lwp (inferior_ptid);
/* Read the floating point state. */
if (have_ptrace_getregset == TRIBOOL_TRUE)
ret = ptrace (PT_GETFPREGS, tid, 0, fp);
if (ret < 0)
- {
- warning (_("Unable to fetch the floating point registers."));
- return;
- }
+ perror_with_name (_("Unable to fetch the floating point registers."));
/* Fetch fpsr. */
regcache_raw_supply (regcache, ARM_FPS_REGNUM,
gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
+ tid = ptid_get_lwp (inferior_ptid);
/* Read the floating point state. */
if (have_ptrace_getregset == TRIBOOL_TRUE)
ret = ptrace (PT_GETFPREGS, tid, 0, fp);
if (ret < 0)
- {
- warning (_("Unable to fetch the floating point registers."));
- return;
- }
+ perror_with_name (_("Unable to fetch the floating point registers."));
/* Store fpsr. */
if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
if (ret < 0)
- {
- warning (_("Unable to store floating point registers."));
- return;
- }
+ perror_with_name (_("Unable to store floating point registers."));
}
/* Fetch all general registers of the process and store into
elf_gregset_t regs;
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
+ tid = ptid_get_lwp (inferior_ptid);
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
- {
- warning (_("Unable to fetch general registers."));
- return;
- }
-
- for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
- regcache_raw_supply (regcache, regno, (char *) ®s[regno]);
+ perror_with_name (_("Unable to fetch general registers."));
- if (arm_apcs_32)
- regcache_raw_supply (regcache, ARM_PS_REGNUM,
- (char *) ®s[ARM_CPSR_GREGNUM]);
- else
- regcache_raw_supply (regcache, ARM_PS_REGNUM,
- (char *) ®s[ARM_PC_REGNUM]);
-
- regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
- (get_regcache_arch (regcache), regs[ARM_PC_REGNUM]);
- regcache_raw_supply (regcache, ARM_PC_REGNUM,
- (char *) ®s[ARM_PC_REGNUM]);
+ aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, arm_apcs_32);
}
static void
elf_gregset_t regs;
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
+ tid = ptid_get_lwp (inferior_ptid);
/* Fetch the general registers. */
if (have_ptrace_getregset == TRIBOOL_TRUE)
ret = ptrace (PTRACE_GETREGS, tid, 0, ®s);
if (ret < 0)
- {
- warning (_("Unable to fetch general registers."));
- return;
- }
+ perror_with_name (_("Unable to fetch general registers."));
- for (regno = ARM_A1_REGNUM; regno <= ARM_PC_REGNUM; regno++)
- {
- if (REG_VALID == regcache_register_status (regcache, regno))
- regcache_raw_collect (regcache, regno, (char *) ®s[regno]);
- }
-
- if (arm_apcs_32 && REG_VALID == regcache_register_status (regcache, ARM_PS_REGNUM))
- regcache_raw_collect (regcache, ARM_PS_REGNUM,
- (char *) ®s[ARM_CPSR_GREGNUM]);
+ aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, arm_apcs_32);
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
ret = ptrace (PTRACE_SETREGS, tid, 0, ®s);
if (ret < 0)
- {
- warning (_("Unable to store general registers."));
- return;
- }
+ perror_with_name (_("Unable to store general registers."));
}
/* Fetch all WMMX registers of the process and store into
int ret, regno, tid;
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
+ tid = ptid_get_lwp (inferior_ptid);
ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
if (ret < 0)
- {
- warning (_("Unable to fetch WMMX registers."));
- return;
- }
+ perror_with_name (_("Unable to fetch WMMX registers."));
for (regno = 0; regno < 16; regno++)
regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM,
int ret, regno, tid;
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
+ tid = ptid_get_lwp (inferior_ptid);
ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
if (ret < 0)
- {
- warning (_("Unable to fetch WMMX registers."));
- return;
- }
+ perror_with_name (_("Unable to fetch WMMX registers."));
for (regno = 0; regno < 16; regno++)
if (REG_VALID == regcache_register_status (regcache,
ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
if (ret < 0)
- {
- warning (_("Unable to store WMMX registers."));
- return;
- }
+ perror_with_name (_("Unable to store WMMX registers."));
}
-/* Fetch and store VFP Registers. The kernel object has space for 32
- 64-bit registers, and the FPSCR. This is even when on a VFPv2 or
- VFPv3D16 target. */
-#define VFP_REGS_SIZE (32 * 8 + 4)
-
static void
fetch_vfp_regs (struct regcache *regcache)
{
- char regbuf[VFP_REGS_SIZE];
+ gdb_byte regbuf[VFP_REGS_SIZE];
int ret, regno, tid;
struct gdbarch *gdbarch = get_regcache_arch (regcache);
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
+ tid = ptid_get_lwp (inferior_ptid);
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
if (ret < 0)
- {
- warning (_("Unable to fetch VFP registers."));
- return;
- }
-
- for (regno = 0; regno < tdep->vfp_register_count; regno++)
- regcache_raw_supply (regcache, regno + ARM_D0_REGNUM,
- (char *) regbuf + regno * 8);
+ perror_with_name (_("Unable to fetch VFP registers."));
- regcache_raw_supply (regcache, ARM_FPSCR_REGNUM,
- (char *) regbuf + 32 * 8);
+ aarch32_vfp_regcache_supply (regcache, regbuf,
+ tdep->vfp_register_count);
}
static void
store_vfp_regs (const struct regcache *regcache)
{
- char regbuf[VFP_REGS_SIZE];
+ gdb_byte regbuf[VFP_REGS_SIZE];
int ret, regno, tid;
struct gdbarch *gdbarch = get_regcache_arch (regcache);
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
/* Get the thread id for the ptrace call. */
- tid = GET_THREAD_ID (inferior_ptid);
+ tid = ptid_get_lwp (inferior_ptid);
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
if (ret < 0)
- {
- warning (_("Unable to fetch VFP registers (for update)."));
- return;
- }
-
- for (regno = 0; regno < tdep->vfp_register_count; regno++)
- regcache_raw_collect (regcache, regno + ARM_D0_REGNUM,
- (char *) regbuf + regno * 8);
+ perror_with_name (_("Unable to fetch VFP registers (for update)."));
- regcache_raw_collect (regcache, ARM_FPSCR_REGNUM,
- (char *) regbuf + 32 * 8);
+ aarch32_vfp_regcache_collect (regcache, regbuf,
+ tdep->vfp_register_count);
if (have_ptrace_getregset == TRIBOOL_TRUE)
{
ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
if (ret < 0)
- {
- warning (_("Unable to store VFP registers."));
- return;
- }
+ perror_with_name (_("Unable to store VFP registers."));
}
/* Fetch registers from the child process. Fetch all registers if
{
elf_gregset_t gpregs;
struct iovec iov;
- int tid = GET_THREAD_ID (inferior_ptid);
+ int tid = ptid_get_lwp (inferior_ptid);
iov.iov_base = &gpregs;
iov.iov_len = sizeof (gpregs);
registers. Support was added in 2.6.30. */
pid = ptid_get_lwp (inferior_ptid);
errno = 0;
- buf = alloca (VFP_REGS_SIZE);
+ buf = (char *) alloca (VFP_REGS_SIZE);
if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
&& errno == EIO)
result = NULL;
int tid;
unsigned int val;
- tid = GET_THREAD_ID (inferior_ptid);
+ tid = ptid_get_lwp (inferior_ptid);
if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
available = 0;
else
there is not an appropriate resource available, otherwise returns 1. */
static int
arm_linux_can_use_hw_breakpoint (struct target_ops *self,
- int type, int cnt, int ot)
+ enum bptype type,
+ int cnt, int ot)
{
if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
|| type == bp_access_watchpoint || type == bp_watchpoint)
{
struct arm_linux_process_info *proc;
- proc = xcalloc (1, sizeof (*proc));
+ proc = XCNEW (struct arm_linux_process_info);
proc->pid = pid;
proc->next = arm_linux_process_list;
p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
}
-/* Get the ARM hardware breakpoint type from the RW value we're given when
- asked to set a watchpoint. */
+/* Get the ARM hardware breakpoint type from the TYPE value we're
+ given when asked to set a watchpoint. */
static arm_hwbp_type
-arm_linux_get_hwbp_type (int rw)
+arm_linux_get_hwbp_type (enum target_hw_bp_type type)
{
- if (rw == hw_read)
+ if (type == hw_read)
return arm_hwbp_load;
- else if (rw == hw_write)
+ else if (type == hw_write)
return arm_hwbp_store;
else
return arm_hwbp_access;
/* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
to LEN. The type of watchpoint is given in RW. */
static void
-arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len, int rw,
+arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len,
+ enum target_hw_bp_type type,
struct arm_linux_hw_breakpoint *p)
{
const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
p->address = (unsigned int) addr;
p->control = arm_hwbp_control_initialize (mask,
- arm_linux_get_hwbp_type (rw), 1);
+ arm_linux_get_hwbp_type (type), 1);
}
/* Are two break-/watch-points equal? */
/* Insert a Hardware breakpoint. */
static int
arm_linux_insert_watchpoint (struct target_ops *self,
- CORE_ADDR addr, int len, int rw,
+ CORE_ADDR addr, int len,
+ enum target_hw_bp_type rw,
struct expression *cond)
{
struct lwp_info *lp;
/* Remove a hardware breakpoint. */
static int
-arm_linux_remove_watchpoint (struct target_ops *self,
- CORE_ADDR addr, int len, int rw,
+arm_linux_remove_watchpoint (struct target_ops *self, CORE_ADDR addr,
+ int len, enum target_hw_bp_type rw,
struct expression *cond)
{
struct lwp_info *lp;