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powerpc/mm: Add SMP support to no-hash TLB handling
[deliverable/linux.git]
/
arch
/
powerpc
/
kernel
/
misc_32.S
diff --git
a/arch/powerpc/kernel/misc_32.S
b/arch/powerpc/kernel/misc_32.S
index d108715129e264524854cac071748dcfbd313f6c..2c2ab89f0b64af7c6e0e2acd20c3a40916839d63 100644
(file)
--- a/
arch/powerpc/kernel/misc_32.S
+++ b/
arch/powerpc/kernel/misc_32.S
@@
-29,6
+29,7
@@
#include <asm/asm-offsets.h>
#include <asm/processor.h>
#include <asm/kexec.h>
#include <asm/asm-offsets.h>
#include <asm/processor.h>
#include <asm/kexec.h>
+#include <asm/bug.h>
.text
.text
@@
-486,16
+487,24
@@
_GLOBAL(_tlbil_va)
tlbsx 0,r3
mfspr r4,SPRN_MAS1 /* check valid */
andis. r3,r4,MAS1_VALID@h
tlbsx 0,r3
mfspr r4,SPRN_MAS1 /* check valid */
andis. r3,r4,MAS1_VALID@h
- beq
lr
+ beq
1f
rlwinm r4,r4,0,1,31
mtspr SPRN_MAS1,r4
tlbwe
msync
isync
rlwinm r4,r4,0,1,31
mtspr SPRN_MAS1,r4
tlbwe
msync
isync
-
wrtee r10
+
1:
wrtee r10
blr
#endif /* CONFIG_FSL_BOOKE */
blr
#endif /* CONFIG_FSL_BOOKE */
+/*
+ * Nobody implements this yet
+ */
+_GLOBAL(_tlbivax_bcast)
+1: trap
+ EMIT_BUG_ENTRY 1b,__FILE__,__LINE__,0;
+ blr
+
/*
* Flush instruction cache.
/*
* Flush instruction cache.
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