- branches. These represent [26|16] bit addresses.
- The low order 2 bits are preserved.
- REL[24|14] : branches relative to the Instruction Address
- register. These represent [26|16] bit addresses,
- as before. The instruction field will be zero, and
- the address of the SYM will be inserted at link time.
- TOCREL16 : 16 bit displacement field referring to a slot in
- toc.
- TOCREL14 : 16 bit displacement field, similar to REL14 or ADDR14.
- ADDR32NB : 32 bit address relative to the virtual origin.
- (On the alpha, this is always a linker generated thunk)
- (i.e. 32bit addr relative to the image base)
- SECREL : The value is relative to the start of the section
- containing the symbol.
- SECTION : access to the header containing the item. Supports the
- codeview debugger.
+ branches. These represent [26|16] bit addresses.
+ The low order 2 bits are preserved.
+ REL[24|14] : branches relative to the Instruction Address
+ register. These represent [26|16] bit addresses,
+ as before. The instruction field will be zero, and
+ the address of the SYM will be inserted at link time.
+ TOCREL16 : 16 bit displacement field referring to a slot in
+ toc.
+ TOCREL14 : 16 bit displacement field, similar to REL14 or ADDR14.
+ ADDR32NB : 32 bit address relative to the virtual origin.
+ (On the alpha, this is always a linker generated thunk)
+ (i.e. 32bit addr relative to the image base)
+ SECREL : The value is relative to the start of the section
+ containing the symbol.
+ SECTION : access to the header containing the item. Supports the
+ codeview debugger.