+#ifdef BFD64
+ mips*el-*-vxworks*)
+ targ_defvec=bfd_elf32_littlemips_vxworks_vec
+ targ_selvecs="bfd_elf32_littlemips_vec bfd_elf32_bigmips_vxworks_vec bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
+ want64=true
+ ;;
+ mips*-*-vxworks*)
+ targ_defvec=bfd_elf32_bigmips_vxworks_vec
+ targ_selvecs="bfd_elf32_bigmips_vec bfd_elf32_littlemips_vxworks_vec bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec"
+ want64=true
+ ;;
+#endif
+ mips*el-sde-elf*)
+ targ_defvec=bfd_elf32_tradlittlemips_vec
+ targ_selvecs="bfd_elf32_tradbigmips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
+ want64=true
+ ;;
+ mips*-sde-elf*)
+ targ_defvec=bfd_elf32_tradbigmips_vec
+ targ_selvecs="bfd_elf32_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec"
+ want64=true
+ ;;