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Handle R_X86_64_64 properly for x32
[deliverable/binutils-gdb.git]
/
bfd
/
cpu-d10v.c
diff --git
a/bfd/cpu-d10v.c
b/bfd/cpu-d10v.c
index b69e840635095179b0782222c3a1d26c712e79b1..7bc208e26202578ade729ca4e6cb3fa9c9b881bc 100644
(file)
--- a/
bfd/cpu-d10v.c
+++ b/
bfd/cpu-d10v.c
@@
-1,5
+1,5
@@
/* BFD support for the D10V processor
/* BFD support for the D10V processor
- Copyright 1996, 1999, 2000, 2002, 2005, 2007
+ Copyright 1996, 1999, 2000, 2002, 2005, 2007
, 2010
Free Software Foundation, Inc.
Contributed by Martin Hunt (hunt@cygnus.com).
Free Software Foundation, Inc.
Contributed by Martin Hunt (hunt@cygnus.com).
@@
-27,7
+27,7
@@
static const bfd_arch_info_type d10v_ts3_info =
{
16, /* 16 bits in a word. */
static const bfd_arch_info_type d10v_ts3_info =
{
16, /* 16 bits in a word. */
- 1
6, /* 16 bits in an address
. */
+ 1
8, /* really 16 bits in an address, but code has 18 bit range
. */
8, /* 8 bits in a byte. */
bfd_arch_d10v,
bfd_mach_d10v_ts3,
8, /* 8 bits in a byte. */
bfd_arch_d10v,
bfd_mach_d10v_ts3,
@@
-37,37
+37,40
@@
static const bfd_arch_info_type d10v_ts3_info =
FALSE,
bfd_default_compatible,
bfd_default_scan,
FALSE,
bfd_default_compatible,
bfd_default_scan,
+ bfd_arch_default_fill,
0,
};
static const bfd_arch_info_type d10v_ts2_info =
{
0,
};
static const bfd_arch_info_type d10v_ts2_info =
{
- 16,
/* 16 bits in a word. */
- 1
6, /* 16 bits in an address. */
- 8,
/* 8 bits in a byte. */
+ 16,
+ 1
8,
+ 8,
bfd_arch_d10v,
bfd_mach_d10v_ts2,
"d10v",
"d10v:ts2",
bfd_arch_d10v,
bfd_mach_d10v_ts2,
"d10v",
"d10v:ts2",
- 4,
/* Section alignment power. */
+ 4,
FALSE,
bfd_default_compatible,
bfd_default_scan,
FALSE,
bfd_default_compatible,
bfd_default_scan,
+ bfd_arch_default_fill,
& d10v_ts3_info,
};
const bfd_arch_info_type bfd_d10v_arch =
{
& d10v_ts3_info,
};
const bfd_arch_info_type bfd_d10v_arch =
{
- 16,
/* 16 bits in a word. */
- 1
6, /* 16 bits in an address. */
- 8,
/* 8 bits in a byte. */
+ 16,
+ 1
8,
+ 8,
bfd_arch_d10v,
bfd_mach_d10v,
"d10v",
"d10v",
bfd_arch_d10v,
bfd_mach_d10v,
"d10v",
"d10v",
- 4,
/* Section alignment power. */
+ 4,
TRUE,
bfd_default_compatible,
bfd_default_scan,
TRUE,
bfd_default_compatible,
bfd_default_scan,
+ bfd_arch_default_fill,
& d10v_ts2_info,
};
& d10v_ts2_info,
};
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