+/* Returns TRUE iff RELOC_TYPE is a 32-bit absolute RELA relocation used in
+ DWARF debug sections. This is a target specific test. Note - we do not
+ go through the whole including-target-headers-multiple-times route, (as
+ we have already done with <elf/h8.h>) because this would become very
+ messy and even then this function would have to contain target specific
+ information (the names of the relocs instead of their numeric values).
+ FIXME: This is not the correct way to solve this problem. The proper way
+ is to have target specific reloc sizing and typing functions created by
+ the reloc-macros.h header, in the same way that it already creates the
+ reloc naming functions. */
+
+static bfd_boolean
+is_32bit_abs_reloc (unsigned int reloc_type)
+{
+ switch (elf_header.e_machine)
+ {
+ case EM_386:
+ case EM_486:
+ return reloc_type == 1; /* R_386_32. */
+ case EM_68K:
+ return reloc_type == 1; /* R_68K_32. */
+ case EM_860:
+ return reloc_type == 1; /* R_860_32. */
+ case EM_ALPHA:
+ return reloc_type == 1; /* XXX Is this right ? */
+ case EM_ARC:
+ return reloc_type == 1; /* R_ARC_32. */
+ case EM_ARM:
+ return reloc_type == 2; /* R_ARM_ABS32 */
+ case EM_AVR_OLD:
+ case EM_AVR:
+ return reloc_type == 1;
+ case EM_BLACKFIN:
+ return reloc_type == 0x12; /* R_byte4_data. */
+ case EM_CRIS:
+ return reloc_type == 3; /* R_CRIS_32. */
+ case EM_CR16:
+ return reloc_type == 3; /* R_CR16_NUM32. */
+ case EM_CRX:
+ return reloc_type == 15; /* R_CRX_NUM32. */
+ case EM_CYGNUS_FRV:
+ return reloc_type == 1;
+ case EM_CYGNUS_D10V:
+ case EM_D10V:
+ return reloc_type == 6; /* R_D10V_32. */
+ case EM_CYGNUS_D30V:
+ case EM_D30V:
+ return reloc_type == 12; /* R_D30V_32_NORMAL. */
+ case EM_DLX:
+ return reloc_type == 3; /* R_DLX_RELOC_32. */
+ case EM_CYGNUS_FR30:
+ case EM_FR30:
+ return reloc_type == 3; /* R_FR30_32. */
+ case EM_H8S:
+ case EM_H8_300:
+ case EM_H8_300H:
+ return reloc_type == 1; /* R_H8_DIR32. */
+ case EM_IA_64:
+ return reloc_type == 0x65; /* R_IA64_SECREL32LSB. */
+ case EM_IP2K_OLD:
+ case EM_IP2K:
+ return reloc_type == 2; /* R_IP2K_32. */
+ case EM_IQ2000:
+ return reloc_type == 2; /* R_IQ2000_32. */
+ case EM_M32C:
+ return reloc_type == 3; /* R_M32C_32. */
+ case EM_M32R:
+ return reloc_type == 34; /* R_M32R_32_RELA. */
+ case EM_MCORE:
+ return reloc_type == 1; /* R_MCORE_ADDR32. */
+ case EM_CYGNUS_MEP:
+ return reloc_type == 4; /* R_MEP_32. */
+ case EM_MIPS:
+ return reloc_type == 2; /* R_MIPS_32. */
+ case EM_MMIX:
+ return reloc_type == 4; /* R_MMIX_32. */
+ case EM_CYGNUS_MN10200:
+ case EM_MN10200:
+ return reloc_type == 1; /* R_MN10200_32. */
+ case EM_CYGNUS_MN10300:
+ case EM_MN10300:
+ return reloc_type == 1; /* R_MN10300_32. */
+ case EM_MSP430_OLD:
+ case EM_MSP430:
+ return reloc_type == 1; /* R_MSP43_32. */
+ case EM_MT:
+ return reloc_type == 2; /* R_MT_32. */
+ case EM_ALTERA_NIOS2:
+ case EM_NIOS32:
+ return reloc_type == 1; /* R_NIOS_32. */
+ case EM_OPENRISC:
+ case EM_OR32:
+ return reloc_type == 1; /* R_OR32_32. */
+ case EM_PARISC:
+ return reloc_type == 1; /* R_PARISC_DIR32. */
+ case EM_PJ:
+ case EM_PJ_OLD:
+ return reloc_type == 1; /* R_PJ_DATA_DIR32. */
+ case EM_PPC64:
+ return reloc_type == 1; /* R_PPC64_ADDR32. */
+ case EM_PPC:
+ return reloc_type == 1; /* R_PPC_ADDR32. */
+ case EM_S370:
+ return reloc_type == 1; /* R_I370_ADDR31. */
+ case EM_S390_OLD:
+ case EM_S390:
+ return reloc_type == 4; /* R_S390_32. */
+ case EM_SCORE:
+ return reloc_type == 8; /* R_SCORE_ABS32. */
+ case EM_SH:
+ return reloc_type == 1; /* R_SH_DIR32. */
+ case EM_SPARC32PLUS:
+ case EM_SPARCV9:
+ case EM_SPARC:
+ return reloc_type == 3 /* R_SPARC_32. */
+ || reloc_type == 23; /* R_SPARC_UA32. */
+ case EM_SPU:
+ return reloc_type == 6; /* R_SPU_ADDR32 */
+ case EM_CYGNUS_V850:
+ case EM_V850:
+ return reloc_type == 6; /* R_V850_ABS32. */
+ case EM_VAX:
+ return reloc_type == 1; /* R_VAX_32. */
+ case EM_X86_64:
+ return reloc_type == 10; /* R_X86_64_32. */
+ case EM_XSTORMY16:
+ return reloc_type == 1; /* R_XSTROMY16_32. */
+ case EM_XTENSA_OLD:
+ case EM_XTENSA:
+ return reloc_type == 1; /* R_XTENSA_32. */