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[gdb/testsuite] Change kfail into xfail in gdb.ada/packed_tagged.exp
[deliverable/binutils-gdb.git]
/
cpu
/
frv.cpu
diff --git
a/cpu/frv.cpu
b/cpu/frv.cpu
index 03f22a55358d463c727655d14ff0f1027a0e1bd2..cdb169eddc1c11d99df72a32e14f86e6d07de391 100644
(file)
--- a/
cpu/frv.cpu
+++ b/
cpu/frv.cpu
@@
-1,6
+1,6
@@
; Fujitsu FRV opcode support, for GNU Binutils. -*- Scheme -*-
;
; Fujitsu FRV opcode support, for GNU Binutils. -*- Scheme -*-
;
-; Copyright 2000, 2001, 2003, 2004 Free Software Foundation, Inc.
+; Copyright 2000, 2001, 2003, 2004
, 2007, 2009
Free Software Foundation, Inc.
;
; Contributed by Red Hat Inc; developed under contract from Fujitsu.
;
;
; Contributed by Red Hat Inc; developed under contract from Fujitsu.
;
@@
-8,7
+8,7
@@
;
; This program is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
;
; This program is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
-; the Free Software Foundation; either version
2
of the License, or
+; the Free Software Foundation; either version
3
of the License, or
; (at your option) any later version.
;
; This program is distributed in the hope that it will be useful,
; (at your option) any later version.
;
; This program is distributed in the hope that it will be useful,
@@
-18,7
+18,8
@@
;
; You should have received a copy of the GNU General Public License
; along with this program; if not, write to the Free Software
;
; You should have received a copy of the GNU General Public License
; along with this program; if not, write to the Free Software
-; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
+; Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
+; MA 02110-1301, USA.
(include "simplify.inc")
(include "simplify.inc")
@@
-1983,7
+1984,7
@@
(set (ifield f-u12-l) (and (ifield f-u12) #x3f))
)
(sequence () ; extract
(set (ifield f-u12-l) (and (ifield f-u12) #x3f))
)
(sequence () ; extract
- (set (ifield f-u12) (or (
sll (ifield f-u12-h) 6
)
+ (set (ifield f-u12) (or (
mul (ifield f-u12-h) 64
)
(ifield f-u12-l)))
)
)
(ifield f-u12-l)))
)
)
@@
-2015,7
+2016,7
@@
(df f-label16 "18 bit pc relative signed offset" (PCREL-ADDR) 15 16 INT
((value pc) (sra WI (sub WI value pc) (const 2)))
(df f-label16 "18 bit pc relative signed offset" (PCREL-ADDR) 15 16 INT
((value pc) (sra WI (sub WI value pc) (const 2)))
- ((value pc) (add WI (
sll WI value (const 2
)) pc))
+ ((value pc) (add WI (
mul WI value (const 4
)) pc))
)
(df f-labelH6 "upper 6 bits of label24" () 30 6 INT #f #f)
)
(df f-labelH6 "upper 6 bits of label24" () 30 6 INT #f #f)
@@
-2033,9
+2034,9
@@
; extract
(sequence ()
(set (ifield f-label24)
; extract
(sequence ()
(set (ifield f-label24)
- (add (
sll (or (sll (ifield f-labelH6) (const
18))
+ (add (
mul (or (mul (ifield f-labelH6) (sll 1
18))
(ifield f-labelL18))
(ifield f-labelL18))
- (const
2
))
+ (const
4
))
pc)))
)
pc)))
)
@@
-2808,12
+2809,21
@@
(dbmr20 2084) (dbmr21 2085) (dbmr22 2086) (dbmr23 2087)
(dbmr30 2088) (dbmr31 2089) (dbmr32 2090) (dbmr33 2091)
(dbmr20 2084) (dbmr21 2085) (dbmr22 2086) (dbmr23 2087)
(dbmr30 2088) (dbmr31 2089) (dbmr32 2090) (dbmr33 2091)
- (cpcfr 2092) (cpcr 2093) (cpsr 2094)
+ (cpcfr 2304) (cpcr 2305) (cpsr 2306) (cptr 2307)
+ (cphsr0 2308) (cphsr1 2309) (cpesr0 2320) (cpesr1 2321)
+ (cpemr0 2322) (cpemr1 2323)
- (cpesr0 2096) (cpesr1 2097)
- (cpemr0 2098) (cpemr1 2099)
+ (iperr0 2324) (iperr1 2325) (ipjsr 2326) (ipjrr 2327)
+ (ipcsr0 2336) (ipcsr1 2337) (ipcwer0 2338) (ipcwer1 2339)
+ (ipcwr 2340)
- (ihsr8 3848)
+ (mbhsr 2352) (mbssr 2353) (mbrsr 2354) (mbsdr 2355)
+ (mbrdr 2356) (mbsmr 2357) (mbstr0 2359) (mbstr1 2360)
+
+ (slpr 2368) (sldr 2369) (slhsr 2370) (sltr 2371)
+ (slwr 2372)
+
+ (ihsr8 3848) (ihsr9 3849) (ihsr10 3850)
)
)
)
)
@@
-7040,7
+7050,7
@@
(.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr))
(.str name "$pack $" src ",$" targ)
(+ pack targ op (rs-null) ope src)
(.splice (UNIT FMALL) (FR500-MAJOR F-1) (.unsplice attr))
(.str name "$pack $" src ",$" targ)
(+ pack targ op (rs-null) ope src)
- (set targ (conv mode src))
+ (set targ (conv mode
FPCONV-DEFAULT
src))
((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
)
)
((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
)
)
@@
-7066,9
+7076,9
@@
(.str name "$pack $" src ",$" targ)
(+ pack targ op (rs-null) ope src)
(sequence ()
(.str name "$pack $" src ",$" targ)
(+ pack targ op (rs-null) ope src)
(sequence ()
- (set targ (conv mode src))
+ (set targ (conv mode
FPCONV-DEFAULT
src))
(set (nextreg targ_hw targ 1)
(set (nextreg targ_hw targ 1)
- (conv mode (nextreg src_hw src 1))))
+ (conv mode
FPCONV-DEFAULT
(nextreg src_hw src 1))))
((fr500 (unit u-float-dual-convert)))
)
)
((fr500 (unit u-float-dual-convert)))
)
)
@@
-7085,10
+7095,10
@@
(+ pack targ op (rs-null) ope src)
(sequence ()
(c-call VOID "@cpu@_set_ne_index" (index-of targ))
(+ pack targ op (rs-null) ope src)
(sequence ()
(c-call VOID "@cpu@_set_ne_index" (index-of targ))
- (set targ (conv mode src))
+ (set targ (conv mode
FPCONV-DEFAULT
src))
(c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1))
(set (nextreg targ_hw targ 1)
(c-call VOID "@cpu@_set_ne_index" (add (index-of targ) 1))
(set (nextreg targ_hw targ 1)
- (conv mode (nextreg src_hw src 1))))
+ (conv mode
FPCONV-DEFAULT
(nextreg src_hw src 1))))
((fr500 (unit u-float-dual-convert)))
)
)
((fr500 (unit u-float-dual-convert)))
)
)
@@
-7104,7
+7114,7
@@
(.str name "$pack $" src ",$" targ ",$CCi,$cond")
(+ pack targ op (rs-null) CCi cond ope src)
(if (eq CCi (or cond 2))
(.str name "$pack $" src ",$" targ ",$CCi,$cond")
(+ pack targ op (rs-null) CCi cond ope src)
(if (eq CCi (or cond 2))
- (set targ (conv mode src)))
+ (set targ (conv mode
FPCONV-DEFAULT
src)))
((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
)
)
((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
)
)
@@
-7121,7
+7131,7
@@
(+ pack targ op (rs-null) ope src)
(sequence ()
(c-call VOID "@cpu@_set_ne_index" (index-of targ))
(+ pack targ op (rs-null) ope src)
(sequence ()
(c-call VOID "@cpu@_set_ne_index" (index-of targ))
- (set targ (conv mode src)))
+ (set targ (conv mode
FPCONV-DEFAULT
src)))
((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
)
)
((fr500 (unit u-float-convert)) (fr550 (unit u-float-convert)))
)
)
@@
-7616,11
+7626,15
@@
(define-pmacro (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ)
(sequence ()
(define-pmacro (float-parallel-mul-add-double-semantics add_sub arg1 arg2 targ)
(sequence ()
- (set targ (ftrunc SF (mul DF (fext DF arg1) (fext DF arg2))))
+ (set targ (ftrunc SF FPCONV-DEFAULT
+ (mul DF
+ (fext DF FPCONV-DEFAULT arg1)
+ (fext DF FPCONV-DEFAULT arg2))))
(set (nextreg h-fr targ 1)
(set (nextreg h-fr targ 1)
- (ftrunc SF (add_sub DF
- (fext DF (nextreg h-fr arg1 1))
- (fext DF (nextreg h-fr arg2 1))))))
+ (ftrunc SF FPCONV-DEFAULT
+ (add_sub DF
+ (fext DF FPCONV-DEFAULT (nextreg h-fr arg1 1))
+ (fext DF FPCONV-DEFAULT (nextreg h-fr arg2 1))))))
)
(define-pmacro (float-parallel-mul-add-double
)
(define-pmacro (float-parallel-mul-add-double
@@
-8219,18
+8233,28
@@
(set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
(set arghi (halfword hi FRintj 0))
(set arglo (halfword lo FRintj 0))
(set FRintk (c-raw-call SI "frv_ref_SI" FRintk))
(set arghi (halfword hi FRintj 0))
(set arglo (halfword lo FRintj 0))
- (saturate-v (abs arghi) 32767 -32768 (msr-sie-fri-hi)
+ ; We extend the argument before the abs operation so we can
+ ; notice -32768 overflowing as 32768.
+ (saturate-v (abs (ext DI arghi)) 32767 -32768 (msr-sie-fri-hi)
(halfword hi FRintk 0))
(halfword hi FRintk 0))
- (saturate-v (abs
arglo
) 32767 -32768 (msr-sie-fri-lo)
+ (saturate-v (abs
(ext DI arglo)
) 32767 -32768 (msr-sie-fri-lo)
(halfword lo FRintk 0)))
((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
(fr550 (unit u-media)))
)
(halfword lo FRintk 0)))
((fr400 (unit u-media-1)) (fr450 (unit u-media-1))
(fr550 (unit u-media)))
)
+; How to extend from a mode to get the intended signedness.
+(define-pmacro (DI-ext-HI x) (ext DI x))
+(define-pmacro (DI-ext-UHI x) (zext DI x))
+(define-pmacro (DI-ext-DI x) x)
+
(define-pmacro (media-arith-sat-semantics
operation arg1 arg2 res mode max min sie)
(sequence ((DI tmp))
(define-pmacro (media-arith-sat-semantics
operation arg1 arg2 res mode max min sie)
(sequence ((DI tmp))
- (set tmp (operation arg1 arg2))
+ ; Make sure we saturate at max/min against a value that is
+ ; sign- or zero-extended appropriately from "mode".
+ (set tmp (operation DI
+ ((.sym DI-ext- mode) arg1) ((.sym DI-ext- mode) arg2)))
(saturate-v tmp max min sie res))
)
(saturate-v tmp max min sie res))
)
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