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drm/gf100-/gr: unhardcode bundle cb config
[deliverable/linux.git]
/
drivers
/
gpu
/
drm
/
nouveau
/
core
/
engine
/
graph
/
ctxnvf0.c
diff --git
a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c
b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c
index dec03f04114d8bd0594946183de4bac43dccbe63..89a77a2788ba0267a50ab98c28f16be3fba91408 100644
(file)
--- a/
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c
+++ b/
drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c
@@
-279,7
+279,7
@@
nvf0_grctx_init_icmd_0[] = {
{}
};
{}
};
-
static
const struct nvc0_graph_pack
+const struct nvc0_graph_pack
nvf0_grctx_pack_icmd[] = {
{ nvf0_grctx_init_icmd_0 },
{}
nvf0_grctx_pack_icmd[] = {
{ nvf0_grctx_init_icmd_0 },
{}
@@
-668,7
+668,7
@@
nvf0_grctx_init_be_0[] = {
{}
};
{}
};
-
static
const struct nvc0_graph_pack
+const struct nvc0_graph_pack
nvf0_grctx_pack_hub[] = {
{ nvc0_grctx_init_main_0 },
{ nvf0_grctx_init_fe_0 },
nvf0_grctx_pack_hub[] = {
{ nvc0_grctx_init_main_0 },
{ nvf0_grctx_init_fe_0 },
@@
-704,7
+704,7
@@
nvf0_grctx_init_gpc_unk_2[] = {
{}
};
{}
};
-
static
const struct nvc0_graph_pack
+const struct nvc0_graph_pack
nvf0_grctx_pack_gpc[] = {
{ nvc0_grctx_init_gpc_unk_0 },
{ nvd9_grctx_init_prop_0 },
nvf0_grctx_pack_gpc[] = {
{ nvc0_grctx_init_gpc_unk_0 },
{ nvd9_grctx_init_prop_0 },
@@
-718,7
+718,7
@@
nvf0_grctx_pack_gpc[] = {
{}
};
{}
};
-
static
const struct nvc0_graph_init
+const struct nvc0_graph_init
nvf0_grctx_init_tex_0[] = {
{ 0x419a00, 1, 0x04, 0x000000f0 },
{ 0x419a04, 1, 0x04, 0x00000001 },
nvf0_grctx_init_tex_0[] = {
{ 0x419a00, 1, 0x04, 0x000000f0 },
{ 0x419a04, 1, 0x04, 0x00000001 },
@@
-797,7
+797,7
@@
nvf0_grctx_init_cbm_0[] = {
{}
};
{}
};
-
static
const struct nvc0_graph_pack
+const struct nvc0_graph_pack
nvf0_grctx_pack_ppc[] = {
{ nve4_grctx_init_pes_0 },
{ nvf0_grctx_init_cbm_0 },
nvf0_grctx_pack_ppc[] = {
{ nve4_grctx_init_pes_0 },
{ nvf0_grctx_init_cbm_0 },
@@
-809,14
+809,13
@@
nvf0_grctx_pack_ppc[] = {
* PGRAPH context implementation
******************************************************************************/
* PGRAPH context implementation
******************************************************************************/
-
static
void
+void
nvf0_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
{
u32 magic[GPC_MAX][4];
u32 offset;
int gpc;
nvf0_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
{
u32 magic[GPC_MAX][4];
u32 offset;
int gpc;
- mmio_data(0x003000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
mmio_data(0x008000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
mmio_data(0x060000, 0x1000, NV_MEM_ACCESS_RW);
mmio_list(0x40800c, 0x00000000, 8, 1);
mmio_data(0x008000, 0x0100, NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS);
mmio_data(0x060000, 0x1000, NV_MEM_ACCESS_RW);
mmio_list(0x40800c, 0x00000000, 8, 1);
@@
-824,11
+823,6
@@
nvf0_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info)
mmio_list(0x419004, 0x00000000, 8, 1);
mmio_list(0x419008, 0x00000000, 0, 0);
mmio_list(0x4064cc, 0x80000000, 0, 0);
mmio_list(0x419004, 0x00000000, 8, 1);
mmio_list(0x419008, 0x00000000, 0, 0);
mmio_list(0x4064cc, 0x80000000, 0, 0);
- mmio_list(0x408004, 0x00000000, 8, 0);
- mmio_list(0x408008, 0x80000030, 0, 0);
- mmio_list(0x418808, 0x00000000, 8, 0);
- mmio_list(0x41880c, 0x80000030, 0, 0);
- mmio_list(0x4064c8, 0x01800600, 0, 0);
mmio_list(0x418810, 0x80000000, 12, 2);
mmio_list(0x419848, 0x10000000, 12, 2);
mmio_list(0x418810, 0x80000000, 12, 2);
mmio_list(0x419848, 0x10000000, 12, 2);
@@
-882,4
+876,8
@@
nvf0_grctx_oclass = &(struct nvc0_grctx_oclass) {
.ppc = nvf0_grctx_pack_ppc,
.icmd = nvf0_grctx_pack_icmd,
.mthd = nvf0_grctx_pack_mthd,
.ppc = nvf0_grctx_pack_ppc,
.icmd = nvf0_grctx_pack_icmd,
.mthd = nvf0_grctx_pack_mthd,
+ .bundle = nve4_grctx_generate_bundle,
+ .bundle_size = 0x3000,
+ .bundle_min_gpm_fifo_depth = 0x180,
+ .bundle_token_limit = 0x7c0,
}.base;
}.base;
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