+2001-12-21 Jakub Jelinek <jakub@redhat.com>
+
+ * config/tc-sparc.h (TC_PARSE_CONS_EXPRESSION): Define.
+ (sparc_cons): Provide prototype.
+ * config/tc-sparc.c (tc_gen_reloc): Handle BFD_RELOC_*_PCREL and
+ BFD_RELOC_SPARC_PLT{32,64}. Enumerate for which relocs
+ reloc->addend = fixp->fx_addnumber shouldn't be done instead of
+ enumarating for which pc relative ones it should be done.
+ (sparc_cons_special_reloc): New variable.
+ (sparc_cons): New function.
+ (cons_fix_new_sparc): Use sparc_cons_special_reloc.
+ * testsuite/gas/sparc/pcrel.s: New test.
+ * testsuite/gas/sparc/pcrel.d: Expected output.
+ * testsuite/gas/sparc/pcrel64.s: New test.
+ * testsuite/gas/sparc/pcrel64.d: Expected output.
+ * testsuite/gas/sparc/plt.s: New test.
+ * testsuite/gas/sparc/plt.d: Expected output.
+ * testsuite/gas/sparc/plt64.s: New test.
+ * testsuite/gas/sparc/plt64.d: Expected output.
+ * testsuite/gas/sparc/sparc.exp: Add pcrel, pcrel64, plt and plt64
+ tests.
+
+2001-12-20 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+ Daniel Jacobowitz <drow@mvista.com>
+
+ * config/tc-mips.c (file_mips_gp32): Initialize to invalid value.
+ (file_mips_fp32): Likewise.
+ (md_begin): Compatibility handling for -mipsN option.
+
+2001-12-20 Alexandre Oliva <aoliva@redhat.com>
+
+ * config/tc-sh.c (parse_at): Reject @(r0) and @(r0,).
+
+2001-12-20 matthew green <mrg@redhat.com>
+
+ * config/tc-ppc.c (md_parse_option): Make -maltivec default
+ to generating PowerPC instructions.
+
+2001-12-20 Jason Thorpe <thorpej@wasabisystems.com>
+
+ * configure.in (mips-dec-netbsd*): Delete.
+ * configure: Regenerate.
+
+ * configure.in (arm-*-netbsdelf*): Add target.
+ * configure: Regenerate.
+
+2001-12-18 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * config/tc-mips.h (TC_HANDLE_FX_DONE): Remove redundant
+ definition.
+
+2001-12-18 Niibe Yutaka <gniibe@m17n.org>
+
+ * configure.in (assign object format): Bug fix for setting
+ endian.
+ * configure: Regenerate.
+
+2001-12-18 matthew green <mrg@eterna.com.au>
+
+ * configure.in (m68k-*-netbsdelf*): New target.
+ (m68k-*-netbsd*): Also include ELF support.
+ (m68k-*-netbsdaout*): New alias for m68*-*-netbsd*.
+ * configure: Regenerate.
+
+2001-12-18 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de>
+
+ * gasp.c (main): Protoype.
+
+2001-12-17 Richard Henderson <rth@redhat.com>
+
+ * config/tc-alpha.c (alpha_handle_align): Encode unop with RB as $sp.
+
+2001-12-17 Nick Clifton <nickc@cambridge.redhat.com>
+
+ * cgen.c: Add prototype for queue_fixup.
+ (gas_cgen_parse_operand): Move initilisastion of errmsg to avoid
+ possible longjmp corruption.
+ * cgen.h: Add prototype for gas_cgen_md_operand.
+
+2001-12-15 Alan Modra <amodra@bigpond.net.au>
+
+ * config/obj-elf.c (obj_elf_init_stab_section): References are
+ kept to section name strings. Don't alloca them!
+
+2001-12-12 Alexandre Oliva <aoliva@redhat.com>
+
+ * config/tc-d10v.c (get_operands): Mark OPERAND_PLUS after
+ OPERAND_ATSIGN as O_absent.
+
+2001-12-07 Geoffrey Keating <geoffk@redhat.com>
+ Richard Henderson <rth@redhat.com>
+
+ * configure.in: Add support for xstormy16.
+ * configure: Regenerated.
+ * Makefile.am: Add support for xstormy16.
+ * Makefile.in: Regenerated.
+ * config/tc-xstormy16.c: New file.
+ * config/tc-xstormy16.h: New file.
+
+2001-12-06 Richard Earnshaw (rearnsha@arm.com)
+
+ * tc-arm.c (do_arit, do_cmp, do_mov, do_ldst, do_ldstt, do_ldmstm)
+ (do_branch, do_swi, do_adr, do_adrl, do_empty, do_mul, do_mla)
+ (do_swap, do_msr, do_mrs, do_mull, do_ldstv4, do_bx, do_blx)
+ (do_bkpt, do_clz, do_lstc2, do_cdp2, do_co_reg2, do_smla, do_smlal)
+ (do_smul, do_qadd, do_pld, do_ldrd, do_co_reg2c, do_cdp, do_lstc)
+ (do_co_reg, do_fpa_ctrl, do_fpa_ldst, do_fpa_ldmstm, do_fpa_monadic)
+ (do_fpa_dyadic, do_fpa_cmp, do_fpa_from_reg, do_fpa_to_reg, do_mia)
+ (do_mar, do_mra, do_c_binops, do_c_binops_1, do_c_binops_2)
+ (do_c_binops_3, do_c_triple, do_c_triple_4, do_c_triple_5, do_c_quad)
+ (do_c_quad_6, do_c_dspsc, do_c_dspsc_1, do_c_dspsc_2, do_c_shift)
+ (do_c_shift_1, do_c_shift_2, do_c_ldst, do_c_ldst_1, do_c_ldst_2)
+ (do_c_ldst_3, do_c_ldst_4, do_branch25): Delete redundant argument,
+ FLAGS.
+ (struct asm_opcode): Adjust parms field accordingly.
+ (md_assemble): Don't pass dummy second argument when calling worker
+ functions.
+ (build_arm_ops_hsh): Add prototype
+ (BAD_FLAGS): Delete.
+
+2001-12-05 Richard Earnshaw <rearnsha@arm.com>
+
+ * tc-arm.c (struct asm_opcode): Delete comp_suffix and flags. Add
+ cond_offset. Rename variants->variant.
+ (insns): Adjust for new format. Explicitly code each variant that
+ takes flags. Remove temporary instructions.
+ (struct arm_it): Remove redundant field suffix.
+ (s_flag, ldr_flags, str_flags, byte_flag, cmp_flags, ldm_flags)
+ (stm_flags, lfm_flags, sfm_flags, round_flags, fix_flags, except_flag)
+ (long_flag): Delete.
+ (struct asm_flg): Delete.
+ (LONGEST_INST): Delete.
+ (V4_STR_BIT): Define.
+ (struct thumb_opcode): Rename variants->variant.
+ (do_empty): Renamed from do_nop.
+ (ldst_extend): Delete argument hwse. Split code for half-word and
+ signed byte instructions to ...
+ (ldst_extend_v4): ... here.
+ (ld_mode_required_here): Use ldst_extend_v4.
+ (do_ldrd): Simplify now that this is only called for ldrd. No
+ need to test for XScale, which was wrong anyway. Don't reject r12
+ as a target register. Add test that ldrd doesn't update an index
+ register.
+ (do_pld): Don't allow post-indexed or write-back addressing modes.
+ Adjust call to ldst_extend.
+ (do_adr): Split code for adrl to ...
+ (do_adrl): ... here.
+ (do_cmp): No need to fold in COND_BIT.
+ (do_ldst): Simplify. Split code for ldrt/strt into do_ldstt. Split
+ code to handle half-word and signed byte instructions to ...
+ (do_ldstv4): ... here.
+ (do_ldstt): New function. Handle load/store with translate.
+ (do_ldmstm): Write feature modification bits directly into
+ inst.instruction.
+ (do_fpa_ldst): Remove suffix handling code.
+ (do_fpa_dyadic, do_fpa_monadic, do_fpa_from_reg): Likewise.
+ (do_fpa_ldmstm): Type of access is now held in inst.instruction.
+ (build_arm_ops_hsh): New function.
+ (md_begin): Call it. Don't build the ARM opcode directly.
+ (md_assemble): Simplify ARM instruction handling.
+