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Adds the new Fields and Operand types for the new instructions in Armv8.4-a.
[deliverable/binutils-gdb.git]
/
gas
/
config
/
bfin-parse.y
diff --git
a/gas/config/bfin-parse.y
b/gas/config/bfin-parse.y
index be532808a86aa05c27aafdd7985a311230a06ea5..3484448f4195e7f5be57269af79be32520053d05 100644
(file)
--- a/
gas/config/bfin-parse.y
+++ b/
gas/config/bfin-parse.y
@@
-1,5
+1,5
@@
/* bfin-parse.y ADI Blackfin parser
/* bfin-parse.y ADI Blackfin parser
- Copyright (C) 2005-201
6
Free Software Foundation, Inc.
+ Copyright (C) 2005-201
7
Free Software Foundation, Inc.
This file is part of GAS, the GNU Assembler.
This file is part of GAS, the GNU Assembler.
@@
-22,7
+22,6
@@
#include "as.h"
#include "bfin-aux.h" /* Opcode generating auxiliaries. */
#include "as.h"
#include "bfin-aux.h" /* Opcode generating auxiliaries. */
-#include "libbfd.h"
#include "elf/common.h"
#include "elf/bfin.h"
#include "elf/common.h"
#include "elf/bfin.h"
@@
-160,7
+159,6
@@
static Expr_Node *unary (Expr_Op_Type, Expr_Node *);
static void notethat (const char *, ...);
static void notethat (const char *, ...);
-char *current_inputline;
extern char *yytext;
int yyerror (const char *);
extern char *yytext;
int yyerror (const char *);
@@
-668,7
+666,7
@@
asm: asm_1 SEMICOLON
else if (is_group2 ($3) && is_group1 ($5))
$$ = gen_multi_instr_1 ($1, $5, $3);
else
else if (is_group2 ($3) && is_group1 ($5))
$$ = gen_multi_instr_1 ($1, $5, $3);
else
- return yyerror ("Wrong 16 bit instructions groups, slot 2 and slot 3 must be 16-bit instrution group");
+ return yyerror ("Wrong 16 bit instructions groups, slot 2 and slot 3 must be 16-bit instru
c
tion group");
}
else if (($3->value & 0xf800) == 0xc000)
{
}
else if (($3->value & 0xf800) == 0xc000)
{
@@
-677,7
+675,7
@@
asm: asm_1 SEMICOLON
else if (is_group2 ($1) && is_group1 ($5))
$$ = gen_multi_instr_1 ($3, $5, $1);
else
else if (is_group2 ($1) && is_group1 ($5))
$$ = gen_multi_instr_1 ($3, $5, $1);
else
- return yyerror ("Wrong 16 bit instructions groups, slot 1 and slot 3 must be 16-bit instrution group");
+ return yyerror ("Wrong 16 bit instructions groups, slot 1 and slot 3 must be 16-bit instru
c
tion group");
}
else if (($5->value & 0xf800) == 0xc000)
{
}
else if (($5->value & 0xf800) == 0xc000)
{
@@
-686,7
+684,7
@@
asm: asm_1 SEMICOLON
else if (is_group2 ($1) && is_group1 ($3))
$$ = gen_multi_instr_1 ($5, $3, $1);
else
else if (is_group2 ($1) && is_group1 ($3))
$$ = gen_multi_instr_1 ($5, $3, $1);
else
- return yyerror ("Wrong 16 bit instructions groups, slot 1 and slot 2 must be 16-bit instrution group");
+ return yyerror ("Wrong 16 bit instructions groups, slot 1 and slot 2 must be 16-bit instru
c
tion group");
}
else
error ("\nIllegal Multi Issue Construct, at least any one of the slot must be DSP32 instruction group\n");
}
else
error ("\nIllegal Multi Issue Construct, at least any one of the slot must be DSP32 instruction group\n");
@@
-4495,7
+4493,7
@@
expr_1: expr_1 STAR expr_1
EXPR_T
mkexpr (int x, SYMBOL_T s)
{
EXPR_T
mkexpr (int x, SYMBOL_T s)
{
- EXPR_T e =
(EXPR_T) ALLOCATE (sizeof (struct expression_cell)
);
+ EXPR_T e =
XNEW (struct expression_cell
);
e->value = x;
EXPR_SYMBOL(e) = s;
return e;
e->value = x;
EXPR_SYMBOL(e) = s;
return e;
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