+ /* Pseudo ops. */
+ tCE(adr, 28f0000, adr, 2, (RR, EXP), adr, t_adr),
+ C3(adrl, 28f0000, 2, (RR, EXP), adrl),
+ tCE(nop, 1a00000, nop, 1, (oI255c), nop, t_nop),
+
+ /* Thumb-compatibility pseudo ops. */
+ tCE(lsl, 1a00000, lsl, 3, (RR, oRR, SH), shift, t_shift),
+ tC3(lsls, 1b00000, lsls, 3, (RR, oRR, SH), shift, t_shift),
+ tCE(lsr, 1a00020, lsr, 3, (RR, oRR, SH), shift, t_shift),
+ tC3(lsrs, 1b00020, lsrs, 3, (RR, oRR, SH), shift, t_shift),
+ tCE(asr, 1a00040, asr, 3, (RR, oRR, SH), shift, t_shift),
+ tC3(asrs, 1b00040, asrs, 3, (RR, oRR, SH), shift, t_shift),
+ tCE(ror, 1a00060, ror, 3, (RR, oRR, SH), shift, t_shift),
+ tC3(rors, 1b00060, rors, 3, (RR, oRR, SH), shift, t_shift),
+ tCE(neg, 2600000, neg, 2, (RR, RR), rd_rn, t_neg),
+ tC3(negs, 2700000, negs, 2, (RR, RR), rd_rn, t_neg),
+ tCE(push, 92d0000, push, 1, (REGLST), push_pop, t_push_pop),
+ tCE(pop, 8bd0000, pop, 1, (REGLST), push_pop, t_push_pop),
+
+#undef THUMB_VARIANT
+#define THUMB_VARIANT ARM_EXT_V6
+ TCE(cpy, 1a00000, 4600, 2, (RR, RR), rd_rm, t_cpy),
+
+ /* V1 instructions with no Thumb analogue prior to V6T2. */
+#undef THUMB_VARIANT
+#define THUMB_VARIANT ARM_EXT_V6T2
+ TCE(rsb, 0600000, ebc00000, 3, (RR, oRR, SH), arit, t_rsb),
+ TC3(rsbs, 0700000, ebd00000, 3, (RR, oRR, SH), arit, t_rsb),
+ TCE(teq, 1300000, ea900f00, 2, (RR, SH), cmp, t_mvn_tst),
+ TC3(teqs, 1300000, ea900f00, 2, (RR, SH), cmp, t_mvn_tst),
+ C3(teqp, 130f000, 2, (RR, SH), cmp),
+
+ TC3(ldrt, 4300000, f8500e00, 2, (RR, ADDR), ldstt, t_ldstt),
+ TC3(ldrbt, 4700000, f8300e00, 2, (RR, ADDR), ldstt, t_ldstt),
+ TC3(strt, 4200000, f8400e00, 2, (RR, ADDR), ldstt, t_ldstt),
+ TC3(strbt, 4600000, f8200e00, 2, (RR, ADDR), ldstt, t_ldstt),
+
+ TC3(stmdb, 9000000, e9000000, 2, (RRw, REGLST), ldmstm, t_ldmstm),
+ TC3(stmfd, 9000000, e9000000, 2, (RRw, REGLST), ldmstm, t_ldmstm),
+
+ TC3(ldmdb, 9100000, e9100000, 2, (RRw, REGLST), ldmstm, t_ldmstm),
+ TC3(ldmea, 9100000, e9100000, 2, (RRw, REGLST), ldmstm, t_ldmstm),
+
+ /* V1 instructions with no Thumb analogue at all. */
+ CE(rsc, 0e00000, 3, (RR, oRR, SH), arit),
+ C3(rscs, 0f00000, 3, (RR, oRR, SH), arit),
+
+ C3(stmib, 9800000, 2, (RRw, REGLST), ldmstm),
+ C3(stmfa, 9800000, 2, (RRw, REGLST), ldmstm),
+ C3(stmda, 8000000, 2, (RRw, REGLST), ldmstm),
+ C3(stmed, 8000000, 2, (RRw, REGLST), ldmstm),
+ C3(ldmib, 9900000, 2, (RRw, REGLST), ldmstm),
+ C3(ldmed, 9900000, 2, (RRw, REGLST), ldmstm),
+ C3(ldmda, 8100000, 2, (RRw, REGLST), ldmstm),
+ C3(ldmfa, 8100000, 2, (RRw, REGLST), ldmstm),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT ARM_EXT_V2 /* ARM 2 - multiplies. */
+#undef THUMB_VARIANT
+#define THUMB_VARIANT ARM_EXT_V4T
+ tCE(mul, 0000090, mul, 3, (RRnpc, RRnpc, oRR), mul, t_mul),
+ tC3(muls, 0100090, muls, 3, (RRnpc, RRnpc, oRR), mul, t_mul),
+
+#undef THUMB_VARIANT
+#define THUMB_VARIANT ARM_EXT_V6T2
+ TCE(mla, 0200090, fb000000, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mlas, t_mla),
+ C3(mlas, 0300090, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mlas),
+
+ /* Generic coprocessor instructions. */
+ TCE(cdp, e000000, ee000000, 6, (RCP, I15b, RCN, RCN, RCN, oI7b), cdp, cdp),
+ TCE(ldc, c100000, ec100000, 3, (RCP, RCN, ADDR), lstc, lstc),
+ TC3(ldcl, c500000, ec500000, 3, (RCP, RCN, ADDR), lstc, lstc),
+ TCE(stc, c000000, ec000000, 3, (RCP, RCN, ADDR), lstc, lstc),
+ TC3(stcl, c400000, ec400000, 3, (RCP, RCN, ADDR), lstc, lstc),
+ TCE(mcr, e000010, ee000010, 6, (RCP, I7b, RR, RCN, RCN, oI7b), co_reg, co_reg),
+ TCE(mrc, e100010, ee100010, 6, (RCP, I7b, RR, RCN, RCN, oI7b), co_reg, co_reg),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT ARM_EXT_V2S /* ARM 3 - swp instructions. */
+ CE(swp, 1000090, 3, (RRnpc, RRnpc, RRnpcb), rd_rm_rn),
+ C3(swpb, 1400090, 3, (RRnpc, RRnpc, RRnpcb), rd_rm_rn),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT ARM_EXT_V3 /* ARM 6 Status register instructions. */
+ TCE(mrs, 10f0000, f3ef8000, 2, (RR, PSR), mrs, t_mrs),
+ TCE(msr, 120f000, f3808000, 2, (PSR, RR_EXi), msr, t_msr),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT ARM_EXT_V3M /* ARM 7M long multiplies. */
+ TCE(smull, 0c00090, fb800000, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mull, t_mull),
+ CM(smull,s, 0d00090, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mull),
+ TCE(umull, 0800090, fba00000, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mull, t_mull),
+ CM(umull,s, 0900090, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mull),
+ TCE(smlal, 0e00090, fbc00000, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mull, t_mull),
+ CM(smlal,s, 0f00090, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mull),
+ TCE(umlal, 0a00090, fbe00000, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mull, t_mull),
+ CM(umlal,s, 0b00090, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mull),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT ARM_EXT_V4 /* ARM Architecture 4. */
+#undef THUMB_VARIANT
+#define THUMB_VARIANT ARM_EXT_V4T
+ tC3(ldrh, 01000b0, ldrh, 2, (RR, ADDR), ldstv4, t_ldst),
+ tC3(strh, 00000b0, strh, 2, (RR, ADDR), ldstv4, t_ldst),
+ tC3(ldrsh, 01000f0, ldrsh, 2, (RR, ADDR), ldstv4, t_ldst),
+ tC3(ldrsb, 01000d0, ldrsb, 2, (RR, ADDR), ldstv4, t_ldst),
+ tCM(ld,sh, 01000f0, ldrsh, 2, (RR, ADDR), ldstv4, t_ldst),
+ tCM(ld,sb, 01000d0, ldrsb, 2, (RR, ADDR), ldstv4, t_ldst),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT ARM_EXT_V4T|ARM_EXT_V5
+ /* ARM Architecture 4T. */
+ /* Note: bx (and blx) are required on V5, even if the processor does
+ not support Thumb. */
+ TCE(bx, 12fff10, 4700, 1, (RR), bx, t_bx),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT ARM_EXT_V5 /* ARM Architecture 5T. */
+#undef THUMB_VARIANT
+#define THUMB_VARIANT ARM_EXT_V5T
+ /* Note: blx has 2 variants; the .value coded here is for
+ BLX(2). Only this variant has conditional execution. */
+ TCE(blx, 12fff30, 4780, 1, (RR_EXr), blx, t_blx),
+ TUE(bkpt, 1200070, be00, 1, (oIffffb), bkpt, t_bkpt),
+
+#undef THUMB_VARIANT
+#define THUMB_VARIANT ARM_EXT_V6T2
+ TCE(clz, 16f0f10, fab0f080, 2, (RRnpc, RRnpc), rd_rm, t_clz),
+ TUF(ldc2, c100000, fc100000, 3, (RCP, RCN, ADDR), lstc, lstc),
+ TUF(ldc2l, c500000, fc500000, 3, (RCP, RCN, ADDR), lstc, lstc),
+ TUF(stc2, c000000, fc000000, 3, (RCP, RCN, ADDR), lstc, lstc),
+ TUF(stc2l, c400000, fc400000, 3, (RCP, RCN, ADDR), lstc, lstc),
+ TUF(cdp2, e000000, fe000000, 6, (RCP, I15b, RCN, RCN, RCN, oI7b), cdp, cdp),
+ TUF(mcr2, e000010, fe000010, 6, (RCP, I7b, RR, RCN, RCN, oI7b), co_reg, co_reg),
+ TUF(mrc2, e100010, fe100010, 6, (RCP, I7b, RR, RCN, RCN, oI7b), co_reg, co_reg),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT ARM_EXT_V5ExP /* ARM Architecture 5TExP. */
+ TCE(smlabb, 1000080, fb100000, 4, (RRnpc, RRnpc, RRnpc, RRnpc), smla, t_mla),
+ TCE(smlatb, 10000a0, fb100020, 4, (RRnpc, RRnpc, RRnpc, RRnpc), smla, t_mla),
+ TCE(smlabt, 10000c0, fb100010, 4, (RRnpc, RRnpc, RRnpc, RRnpc), smla, t_mla),
+ TCE(smlatt, 10000e0, fb100030, 4, (RRnpc, RRnpc, RRnpc, RRnpc), smla, t_mla),
+
+ TCE(smlawb, 1200080, fb300000, 4, (RRnpc, RRnpc, RRnpc, RRnpc), smla, t_mla),
+ TCE(smlawt, 12000c0, fb300010, 4, (RRnpc, RRnpc, RRnpc, RRnpc), smla, t_mla),
+
+ TCE(smlalbb, 1400080, fbc00080, 4, (RRnpc, RRnpc, RRnpc, RRnpc), smlal, t_mlal),
+ TCE(smlaltb, 14000a0, fbc000a0, 4, (RRnpc, RRnpc, RRnpc, RRnpc), smlal, t_mlal),
+ TCE(smlalbt, 14000c0, fbc00090, 4, (RRnpc, RRnpc, RRnpc, RRnpc), smlal, t_mlal),
+ TCE(smlaltt, 14000e0, fbc000b0, 4, (RRnpc, RRnpc, RRnpc, RRnpc), smlal, t_mlal),
+
+ TCE(smulbb, 1600080, fb10f000, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
+ TCE(smultb, 16000a0, fb10f020, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
+ TCE(smulbt, 16000c0, fb10f010, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
+ TCE(smultt, 16000e0, fb10f030, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
+
+ TCE(smulwb, 12000a0, fb30f000, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
+ TCE(smulwt, 12000e0, fb30f010, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
+
+ TCE(qadd, 1000050, fa80f080, 3, (RRnpc, RRnpc, RRnpc), rd_rm_rn, rd_rm_rn),
+ TCE(qdadd, 1400050, fa80f090, 3, (RRnpc, RRnpc, RRnpc), rd_rm_rn, rd_rm_rn),
+ TCE(qsub, 1200050, fa80f0a0, 3, (RRnpc, RRnpc, RRnpc), rd_rm_rn, rd_rm_rn),
+ TCE(qdsub, 1600050, fa80f0b0, 3, (RRnpc, RRnpc, RRnpc), rd_rm_rn, rd_rm_rn),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT ARM_EXT_V5E /* ARM Architecture 5TE. */
+ TUF(pld, 450f000, f810f000, 1, (ADDR), pld, t_pld),
+ TC3(ldrd, 00000d0, e9500000, 3, (RRnpc, oRRnpc, ADDR), ldrd, t_ldstd),
+ TC3(strd, 00000f0, e9400000, 3, (RRnpc, oRRnpc, ADDR), ldrd, t_ldstd),
+
+ TCE(mcrr, c400000, ec400000, 5, (RCP, I15b, RRnpc, RRnpc, RCN), co_reg2c, co_reg2c),
+ TCE(mrrc, c500000, ec500000, 5, (RCP, I15b, RRnpc, RRnpc, RCN), co_reg2c, co_reg2c),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT ARM_EXT_V5J /* ARM Architecture 5TEJ. */
+ TCE(bxj, 12fff20, f3c08f00, 1, (RR), bxj, t_bxj),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT ARM_EXT_V6 /* ARM V6. */
+#undef THUMB_VARIANT
+#define THUMB_VARIANT ARM_EXT_V6
+ TUF(cpsie, 1080000, b660, 2, (CPSF, oI31b), cpsi, t_cpsi),
+ TUF(cpsid, 10c0000, b670, 2, (CPSF, oI31b), cpsi, t_cpsi),
+ tCE(rev, 6bf0f30, rev, 2, (RRnpc, RRnpc), rd_rm, t_rev),
+ tCE(rev16, 6bf0fb0, rev16, 2, (RRnpc, RRnpc), rd_rm, t_rev),
+ tCE(revsh, 6ff0fb0, revsh, 2, (RRnpc, RRnpc), rd_rm, t_rev),
+ tCE(sxth, 6bf0070, sxth, 3, (RRnpc, RRnpc, oROR), sxth, t_sxth),
+ tCE(uxth, 6ff0070, uxth, 3, (RRnpc, RRnpc, oROR), sxth, t_sxth),
+ tCE(sxtb, 6af0070, sxtb, 3, (RRnpc, RRnpc, oROR), sxth, t_sxth),
+ tCE(uxtb, 6ef0070, uxtb, 3, (RRnpc, RRnpc, oROR), sxth, t_sxth),
+ TUF(setend, 1010000, b650, 1, (ENDI), setend, t_setend),
+
+#undef THUMB_VARIANT
+#define THUMB_VARIANT ARM_EXT_V6T2
+ TUF(cps, 1020000, f3af8100, 1, (I31b), imm0, imm0),
+ TCE(ldrex, 1900f9f, e8500f00, 2, (RRnpc, ADDR), ldrex, t_ldrex),
+ TUF(mcrr2, c400000, fc400000, 5, (RCP, I15b, RRnpc, RRnpc, RCN), co_reg2c, co_reg2c),
+ TUF(mrrc2, c500000, fc500000, 5, (RCP, I15b, RRnpc, RRnpc, RCN), co_reg2c, co_reg2c),
+ TCE(pkhbt, 6800010, eac00000, 4, (RRnpc, RRnpc, RRnpc, oSHll), pkhbt, t_pkhbt),
+ TCE(pkhtb, 6800050, eac00020, 4, (RRnpc, RRnpc, RRnpc, oSHar), pkhtb, t_pkhtb),
+ TCE(qadd16, 6200f10, fa90f010, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(qadd8, 6200f90, fa80f010, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(qaddsubx, 6200f30, faa0f010, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(qsub16, 6200f70, fad0f010, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(qsub8, 6200ff0, fac0f010, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(qsubaddx, 6200f50, fae0f010, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(sadd16, 6100f10, fa90f000, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(sadd8, 6100f90, fa80f000, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(saddsubx, 6100f30, faa0f000, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(shadd16, 6300f10, fa90f020, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(shadd8, 6300f90, fa80f020, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(shaddsubx, 6300f30, faa0f020, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(shsub16, 6300f70, fad0f020, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(shsub8, 6300ff0, fac0f020, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(shsubaddx, 6300f50, fae0f020, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(ssub16, 6100f70, fad0f000, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(ssub8, 6100ff0, fac0f000, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(ssubaddx, 6100f50, fae0f000, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(uadd16, 6500f10, fa90f040, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(uadd8, 6500f90, fa80f040, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(uaddsubx, 6500f30, faa0f040, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(uhadd16, 6700f10, fa90f060, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(uhadd8, 6700f90, fa80f060, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(uhaddsubx, 6700f30, faa0f060, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(uhsub16, 6700f70, fad0f060, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(uhsub8, 6700ff0, fac0f060, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(uhsubaddx, 6700f50, fae0f060, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(uqadd16, 6600f10, fa90f050, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(uqadd8, 6600f90, fa80f050, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(uqaddsubx, 6600f30, faa0f050, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(uqsub16, 6600f70, fad0f050, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(uqsub8, 6600ff0, fac0f050, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(uqsubaddx, 6600f50, fae0f050, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(usub16, 6500f70, fad0f040, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(usub8, 6500ff0, fac0f040, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(usubaddx, 6500f50, fae0f040, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TUF(rfeia, 8900a00, e990c000, 1, (RRw), rfe, rfe),
+ UF(rfeib, 9900a00, 1, (RRw), rfe),
+ UF(rfeda, 8100a00, 1, (RRw), rfe),
+ TUF(rfedb, 9100a00, e810c000, 1, (RRw), rfe, rfe),
+ TUF(rfefd, 8900a00, e990c000, 1, (RRw), rfe, rfe),
+ UF(rfefa, 9900a00, 1, (RRw), rfe),
+ UF(rfeea, 8100a00, 1, (RRw), rfe),
+ TUF(rfeed, 9100a00, e810c000, 1, (RRw), rfe, rfe),
+ TCE(sxtah, 6b00070, fa00f080, 4, (RRnpc, RRnpc, RRnpc, oROR), sxtah, t_sxtah),
+ TCE(sxtab16, 6800070, fa20f080, 4, (RRnpc, RRnpc, RRnpc, oROR), sxtah, t_sxtah),
+ TCE(sxtab, 6a00070, fa40f080, 4, (RRnpc, RRnpc, RRnpc, oROR), sxtah, t_sxtah),
+ TCE(sxtb16, 68f0070, fa2ff080, 3, (RRnpc, RRnpc, oROR), sxth, t_sxth),
+ TCE(uxtah, 6f00070, fa10f080, 4, (RRnpc, RRnpc, RRnpc, oROR), sxtah, t_sxtah),
+ TCE(uxtab16, 6c00070, fa30f080, 4, (RRnpc, RRnpc, RRnpc, oROR), sxtah, t_sxtah),
+ TCE(uxtab, 6e00070, fa50f080, 4, (RRnpc, RRnpc, RRnpc, oROR), sxtah, t_sxtah),
+ TCE(uxtb16, 6cf0070, fa3ff080, 3, (RRnpc, RRnpc, oROR), sxth, t_sxth),
+ TCE(sel, 68000b0, faa0f080, 3, (RRnpc, RRnpc, RRnpc), rd_rn_rm, t_simd),
+ TCE(smlad, 7000010, fb200000, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smla, t_mla),
+ TCE(smladx, 7000030, fb200010, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smla, t_mla),
+ TCE(smlald, 7400010, fbc000c0, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smlal,t_mlal),
+ TCE(smlaldx, 7400030, fbc000d0, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smlal,t_mlal),
+ TCE(smlsd, 7000050, fb400000, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smla, t_mla),
+ TCE(smlsdx, 7000070, fb400010, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smla, t_mla),
+ TCE(smlsld, 7400050, fbd000c0, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smlal,t_mlal),
+ TCE(smlsldx, 7400070, fbd000d0, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smlal,t_mlal),
+ TCE(smmla, 7500010, fb500000, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smla, t_mla),
+ TCE(smmlar, 7500030, fb500010, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smla, t_mla),
+ TCE(smmls, 75000d0, fb600000, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smla, t_mla),
+ TCE(smmlsr, 75000f0, fb600010, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smla, t_mla),
+ TCE(smmul, 750f010, fb50f000, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
+ TCE(smmulr, 750f030, fb50f010, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
+ TCE(smuad, 700f010, fb20f000, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
+ TCE(smuadx, 700f030, fb20f010, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
+ TCE(smusd, 700f050, fb40f000, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
+ TCE(smusdx, 700f070, fb40f010, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
+ TUF(srsia, 8cd0500, e980c000, 1, (I31w), srs, srs),
+ UF(srsib, 9cd0500, 1, (I31w), srs),
+ UF(srsda, 84d0500, 1, (I31w), srs),
+ TUF(srsdb, 94d0500, e800c000, 1, (I31w), srs, srs),
+ TCE(ssat, 6a00010, f3000000, 4, (RRnpc, I32, RRnpc, oSHllar),ssat, t_ssat),
+ TCE(ssat16, 6a00f30, f3200000, 3, (RRnpc, I16, RRnpc), ssat16, t_ssat16),
+ TCE(strex, 1800f90, e8400000, 3, (RRnpc, RRnpc, ADDR), strex, t_strex),
+ TCE(umaal, 0400090, fbe00060, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smlal, t_mlal),
+ TCE(usad8, 780f010, fb70f000, 3, (RRnpc, RRnpc, RRnpc), smul, t_simd),
+ TCE(usada8, 7800010, fb700000, 4, (RRnpc, RRnpc, RRnpc, RRnpc),smla, t_mla),
+ TCE(usat, 6e00010, f3800000, 4, (RRnpc, I31, RRnpc, oSHllar),usat, t_usat),
+ TCE(usat16, 6e00f30, f3a00000, 3, (RRnpc, I15, RRnpc), usat16, t_usat16),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT ARM_EXT_V6K
+#undef THUMB_VARIANT
+#define THUMB_VARIANT ARM_EXT_V6K
+ tCE(yield, 320f001, yield, 0, (), noargs, t_hint),
+ tCE(wfe, 320f002, wfe, 0, (), noargs, t_hint),
+ tCE(wfi, 320f003, wfi, 0, (), noargs, t_hint),
+ tCE(sev, 320f004, sev, 0, (), noargs, t_hint),
+
+#undef THUMB_VARIANT
+#define THUMB_VARIANT ARM_EXT_V6T2
+ TCE(ldrexb, 1d00f9f, e8d00f4f, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
+ TCE(ldrexh, 1f00f9f, e8d00f5f, 2, (RRnpc, RRnpcb), rd_rn, rd_rn),
+ TCE(ldrexd, 1b00f9f, e8d0007f, 3, (RRnpc, oRRnpc, RRnpcb), ldrexd, t_ldrexd),
+ TCE(strexb, 1c00f90, e8c00f40, 3, (RRnpc, RRnpc, ADDR), strex, rm_rd_rn),
+ TCE(strexh, 1e00f90, e8c00f50, 3, (RRnpc, RRnpc, ADDR), strex, rm_rd_rn),
+ TCE(strexd, 1a00f90, e8c00070, 4, (RRnpc, RRnpc, oRRnpc, RRnpcb), strexd, t_strexd),
+ TUF(clrex, 57ff01f, f3bf8f2f, 0, (), noargs, noargs),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT ARM_EXT_V6Z
+ TCE(smi, 1600070, f7f08000, 1, (EXPi), smi, t_smi),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT ARM_EXT_V6T2
+ TCE(bfc, 7c0001f, f36f0000, 3, (RRnpc, I31, I32), bfc, t_bfc),
+ TCE(bfi, 7c00010, f3600000, 4, (RRnpc, RRnpc_I0, I31, I32), bfi, t_bfi),
+ TCE(sbfx, 7a00050, f3400000, 4, (RR, RR, I31, I32), bfx, t_bfx),
+ TCE(ubfx, 7e00050, f3c00000, 4, (RR, RR, I31, I32), bfx, t_bfx),
+
+ TCE(mls, 0600090, fb000010, 4, (RRnpc, RRnpc, RRnpc, RRnpc), mlas, t_mla),
+ TCE(movw, 3000000, f2400000, 2, (RRnpc, Iffff), mov16, t_mov16),
+ TCE(movt, 3400000, f2c00000, 2, (RRnpc, Iffff), mov16, t_mov16),
+ TCE(rbit, 3ff0f30, fa90f0a0, 2, (RR, RR), rd_rm, t_rbit),
+
+ TC3(ldrht, 03000b0, f8300e00, 2, (RR, ADDR), ldsttv4, t_ldstt),
+ TC3(ldrsht, 03000f0, f9300e00, 2, (RR, ADDR), ldsttv4, t_ldstt),
+ TC3(ldrsbt, 03000d0, f9100e00, 2, (RR, ADDR), ldsttv4, t_ldstt),
+ TC3(strht, 02000b0, f8200e00, 2, (RR, ADDR), ldsttv4, t_ldstt),
+
+ UT(cbnz, b900, 2, (RR, EXP), t_czb),
+ UT(cbz, b100, 2, (RR, EXP), t_czb),
+ /* ARM does not really have an IT instruction. */
+ TUE(it, 0, bf08, 1, (COND), it, t_it),
+ TUE(itt, 0, bf0c, 1, (COND), it, t_it),
+ TUE(ite, 0, bf04, 1, (COND), it, t_it),
+ TUE(ittt, 0, bf0e, 1, (COND), it, t_it),
+ TUE(itet, 0, bf06, 1, (COND), it, t_it),
+ TUE(itte, 0, bf0a, 1, (COND), it, t_it),
+ TUE(itee, 0, bf02, 1, (COND), it, t_it),
+ TUE(itttt, 0, bf0f, 1, (COND), it, t_it),
+ TUE(itett, 0, bf07, 1, (COND), it, t_it),
+ TUE(ittet, 0, bf0b, 1, (COND), it, t_it),
+ TUE(iteet, 0, bf03, 1, (COND), it, t_it),
+ TUE(ittte, 0, bf0d, 1, (COND), it, t_it),
+ TUE(itete, 0, bf05, 1, (COND), it, t_it),
+ TUE(ittee, 0, bf09, 1, (COND), it, t_it),
+ TUE(iteee, 0, bf01, 1, (COND), it, t_it),
+
+ /* Thumb2 only instructions. */
+#undef ARM_VARIANT
+#define ARM_VARIANT 0
+
+ TCE(addw, 0, f2000000, 3, (RR, RR, EXPi), 0, t_add_sub_w),
+ TCE(subw, 0, f2a00000, 3, (RR, RR, EXPi), 0, t_add_sub_w),
+ TCE(tbb, 0, e8d0f000, 1, (TB), 0, t_tb),
+ TCE(tbh, 0, e8d0f010, 1, (TB), 0, t_tb),
+
+#undef ARM_VARIANT
+#define ARM_VARIANT FPU_FPA_EXT_V1 /* Core FPA instruction set (V1). */
+ CE(wfs, e200110, 1, (RR), rd),
+ CE(rfs, e300110, 1, (RR), rd),
+ CE(wfc, e400110, 1, (RR), rd),
+ CE(rfc, e500110, 1, (RR), rd),
+
+ C3(ldfs, c100100, 2, (RF, ADDR), rd_cpaddr),
+ C3(ldfd, c108100, 2, (RF, ADDR), rd_cpaddr),
+ C3(ldfe, c500100, 2, (RF, ADDR), rd_cpaddr),
+ C3(ldfp, c508100, 2, (RF, ADDR), rd_cpaddr),
+
+ C3(stfs, c000100, 2, (RF, ADDR), rd_cpaddr),
+ C3(stfd, c008100, 2, (RF, ADDR), rd_cpaddr),
+ C3(stfe, c400100, 2, (RF, ADDR), rd_cpaddr),
+ C3(stfp, c408100, 2, (RF, ADDR), rd_cpaddr),
+
+ C3(mvfs, e008100, 2, (RF, RF_IF), rd_rm),
+ C3(mvfsp, e008120, 2, (RF, RF_IF), rd_rm),
+ C3(mvfsm, e008140, 2, (RF, RF_IF), rd_rm),
+ C3(mvfsz, e008160, 2, (RF, RF_IF), rd_rm),
+ C3(mvfd, e008180, 2, (RF, RF_IF), rd_rm),
+ C3(mvfdp, e0081a0, 2, (RF, RF_IF), rd_rm),
+ C3(mvfdm, e0081c0, 2, (RF, RF_IF), rd_rm),
+ C3(mvfdz, e0081e0, 2, (RF, RF_IF), rd_rm),
+ C3(mvfe, e088100, 2, (RF, RF_IF), rd_rm),
+ C3(mvfep, e088120, 2, (RF, RF_IF), rd_rm),
+ C3(mvfem, e088140, 2, (RF, RF_IF), rd_rm),
+ C3(mvfez, e088160, 2, (RF, RF_IF), rd_rm),
+
+ C3(mnfs, e108100, 2, (RF, RF_IF), rd_rm),
+ C3(mnfsp, e108120, 2, (RF, RF_IF), rd_rm),
+ C3(mnfsm, e108140, 2, (RF, RF_IF), rd_rm),
+ C3(mnfsz, e108160, 2, (RF, RF_IF), rd_rm),
+ C3(mnfd, e108180, 2, (RF, RF_IF), rd_rm),
+ C3(mnfdp, e1081a0, 2, (RF, RF_IF), rd_rm),
+ C3(mnfdm, e1081c0, 2, (RF, RF_IF), rd_rm),
+ C3(mnfdz, e1081e0, 2, (RF, RF_IF), rd_rm),
+ C3(mnfe, e188100, 2, (RF, RF_IF), rd_rm),
+ C3(mnfep, e188120, 2, (RF, RF_IF), rd_rm),
+ C3(mnfem, e188140, 2, (RF, RF_IF), rd_rm),
+ C3(mnfez, e188160, 2, (RF, RF_IF), rd_rm),
+
+ C3(abss, e208100, 2, (RF, RF_IF), rd_rm),
+ C3(abssp, e208120, 2, (RF, RF_IF), rd_rm),
+ C3(abssm, e208140, 2, (RF, RF_IF), rd_rm),
+ C3(abssz, e208160, 2, (RF, RF_IF), rd_rm),
+ C3(absd, e208180, 2, (RF, RF_IF), rd_rm),
+ C3(absdp, e2081a0, 2, (RF, RF_IF), rd_rm),
+ C3(absdm, e2081c0, 2, (RF, RF_IF), rd_rm),
+ C3(absdz, e2081e0, 2, (RF, RF_IF), rd_rm),
+ C3(abse, e288100, 2, (RF, RF_IF), rd_rm),
+ C3(absep, e288120, 2, (RF, RF_IF), rd_rm),
+ C3(absem, e288140, 2, (RF, RF_IF), rd_rm),
+ C3(absez, e288160, 2, (RF, RF_IF), rd_rm),
+
+ C3(rnds, e308100, 2, (RF, RF_IF), rd_rm),
+ C3(rndsp, e308120, 2, (RF, RF_IF), rd_rm),
+ C3(rndsm, e308140, 2, (RF, RF_IF), rd_rm),
+ C3(rndsz, e308160, 2, (RF, RF_IF), rd_rm),
+ C3(rndd, e308180, 2, (RF, RF_IF), rd_rm),
+ C3(rnddp, e3081a0, 2, (RF, RF_IF), rd_rm),
+ C3(rnddm, e3081c0, 2, (RF, RF_IF), rd_rm),
+ C3(rnddz, e3081e0, 2, (RF, RF_IF), rd_rm),
+ C3(rnde, e388100, 2, (RF, RF_IF), rd_rm),
+ C3(rndep, e388120, 2, (RF, RF_IF), rd_rm),
+ C3(rndem, e388140, 2, (RF, RF_IF), rd_rm),
+ C3(rndez, e388160, 2, (RF, RF_IF), rd_rm),
+
+ C3(sqts, e408100, 2, (RF, RF_IF), rd_rm),
+ C3(sqtsp, e408120, 2, (RF, RF_IF), rd_rm),
+ C3(sqtsm, e408140, 2, (RF, RF_IF), rd_rm),
+ C3(sqtsz, e408160, 2, (RF, RF_IF), rd_rm),
+ C3(sqtd, e408180, 2, (RF, RF_IF), rd_rm),
+ C3(sqtdp, e4081a0, 2, (RF, RF_IF), rd_rm),
+ C3(sqtdm, e4081c0, 2, (RF, RF_IF), rd_rm),
+ C3(sqtdz, e4081e0, 2, (RF, RF_IF), rd_rm),
+ C3(sqte, e488100, 2, (RF, RF_IF), rd_rm),
+ C3(sqtep, e488120, 2, (RF, RF_IF), rd_rm),
+ C3(sqtem, e488140, 2, (RF, RF_IF), rd_rm),
+ C3(sqtez, e488160, 2, (RF, RF_IF), rd_rm),
+
+ C3(logs, e508100, 2, (RF, RF_IF), rd_rm),
+ C3(logsp, e508120, 2, (RF, RF_IF), rd_rm),
+ C3(logsm, e508140, 2, (RF, RF_IF), rd_rm),
+ C3(logsz, e508160, 2, (RF, RF_IF), rd_rm),
+ C3(logd, e508180, 2, (RF, RF_IF), rd_rm),
+ C3(logdp, e5081a0, 2, (RF, RF_IF), rd_rm),
+ C3(logdm, e5081c0, 2, (RF, RF_IF), rd_rm),
+ C3(logdz, e5081e0, 2, (RF, RF_IF), rd_rm),
+ C3(loge, e588100, 2, (RF, RF_IF), rd_rm),
+ C3(logep, e588120, 2, (RF, RF_IF), rd_rm),
+ C3(logem, e588140, 2, (RF, RF_IF), rd_rm),
+ C3(logez, e588160, 2, (RF, RF_IF), rd_rm),
+
+ C3(lgns, e608100, 2, (RF, RF_IF), rd_rm),
+ C3(lgnsp, e608120, 2, (RF, RF_IF), rd_rm),
+ C3(lgnsm, e608140, 2, (RF, RF_IF), rd_rm),
+ C3(lgnsz, e608160, 2, (RF, RF_IF), rd_rm),
+ C3(lgnd, e608180, 2, (RF, RF_IF), rd_rm),
+ C3(lgndp, e6081a0, 2, (RF, RF_IF), rd_rm),
+ C3(lgndm, e6081c0, 2, (RF, RF_IF), rd_rm),
+ C3(lgndz, e6081e0, 2, (RF, RF_IF), rd_rm),
+ C3(lgne, e688100, 2, (RF, RF_IF), rd_rm),
+ C3(lgnep, e688120, 2, (RF, RF_IF), rd_rm),
+ C3(lgnem, e688140, 2, (RF, RF_IF), rd_rm),
+ C3(lgnez, e688160, 2, (RF, RF_IF), rd_rm),
+
+ C3(exps, e708100, 2, (RF, RF_IF), rd_rm),
+ C3(expsp, e708120, 2, (RF, RF_IF), rd_rm),
+ C3(expsm, e708140, 2, (RF, RF_IF), rd_rm),
+ C3(expsz, e708160, 2, (RF, RF_IF), rd_rm),
+ C3(expd, e708180, 2, (RF, RF_IF), rd_rm),
+ C3(expdp, e7081a0, 2, (RF, RF_IF), rd_rm),
+ C3(expdm, e7081c0, 2, (RF, RF_IF), rd_rm),
+ C3(expdz, e7081e0, 2, (RF, RF_IF), rd_rm),
+ C3(expe, e788100, 2, (RF, RF_IF), rd_rm),
+ C3(expep, e788120, 2, (RF, RF_IF), rd_rm),
+ C3(expem, e788140, 2, (RF, RF_IF), rd_rm),
+ C3(expdz, e788160, 2, (RF, RF_IF), rd_rm),
+
+ C3(sins, e808100, 2, (RF, RF_IF), rd_rm),
+ C3(sinsp, e808120, 2, (RF, RF_IF), rd_rm),
+ C3(sinsm, e808140, 2, (RF, RF_IF), rd_rm),
+ C3(sinsz, e808160, 2, (RF, RF_IF), rd_rm),
+ C3(sind, e808180, 2, (RF, RF_IF), rd_rm),
+ C3(sindp, e8081a0, 2, (RF, RF_IF), rd_rm),
+ C3(sindm, e8081c0, 2, (RF, RF_IF), rd_rm),
+ C3(sindz, e8081e0, 2, (RF, RF_IF), rd_rm),
+ C3(sine, e888100, 2, (RF, RF_IF), rd_rm),
+ C3(sinep, e888120, 2, (RF, RF_IF), rd_rm),
+ C3(sinem, e888140, 2, (RF, RF_IF), rd_rm),
+ C3(sinez, e888160, 2, (RF, RF_IF), rd_rm),
+
+ C3(coss, e908100, 2, (RF, RF_IF), rd_rm),
+ C3(cossp, e908120, 2, (RF, RF_IF), rd_rm),
+ C3(cossm, e908140, 2, (RF, RF_IF), rd_rm),
+ C3(cossz, e908160, 2, (RF, RF_IF), rd_rm),
+ C3(cosd, e908180, 2, (RF, RF_IF), rd_rm),
+ C3(cosdp, e9081a0, 2, (RF, RF_IF), rd_rm),
+ C3(cosdm, e9081c0, 2, (RF, RF_IF), rd_rm),
+ C3(cosdz, e9081e0, 2, (RF, RF_IF), rd_rm),
+ C3(cose, e988100, 2, (RF, RF_IF), rd_rm),
+ C3(cosep, e988120, 2, (RF, RF_IF), rd_rm),
+ C3(cosem, e988140, 2, (RF, RF_IF), rd_rm),
+ C3(cosez, e988160, 2, (RF, RF_IF), rd_rm),
+
+ C3(tans, ea08100, 2, (RF, RF_IF), rd_rm),
+ C3(tansp, ea08120, 2, (RF, RF_IF), rd_rm),
+ C3(tansm, ea08140, 2, (RF, RF_IF), rd_rm),
+ C3(tansz, ea08160, 2, (RF, RF_IF), rd_rm),
+ C3(tand, ea08180, 2, (RF, RF_IF), rd_rm),
+ C3(tandp, ea081a0, 2, (RF, RF_IF), rd_rm),
+ C3(tandm, ea081c0, 2, (RF, RF_IF), rd_rm),
+ C3(tandz, ea081e0, 2, (RF, RF_IF), rd_rm),
+ C3(tane, ea88100, 2, (RF, RF_IF), rd_rm),
+ C3(tanep, ea88120, 2, (RF, RF_IF), rd_rm),
+ C3(tanem, ea88140, 2, (RF, RF_IF), rd_rm),
+ C3(tanez, ea88160, 2, (RF, RF_IF), rd_rm),
+
+ C3(asns, eb08100, 2, (RF, RF_IF), rd_rm),
+ C3(asnsp, eb08120, 2, (RF, RF_IF), rd_rm),
+ C3(asnsm, eb08140, 2, (RF, RF_IF), rd_rm),
+ C3(asnsz, eb08160, 2, (RF, RF_IF), rd_rm),
+ C3(asnd, eb08180, 2, (RF, RF_IF), rd_rm),
+ C3(asndp, eb081a0, 2, (RF, RF_IF), rd_rm),
+ C3(asndm, eb081c0, 2, (RF, RF_IF), rd_rm),
+ C3(asndz, eb081e0, 2, (RF, RF_IF), rd_rm),
+ C3(asne, eb88100, 2, (RF, RF_IF), rd_rm),
+ C3(asnep, eb88120, 2, (RF, RF_IF), rd_rm),
+ C3(asnem, eb88140, 2, (RF, RF_IF), rd_rm),
+ C3(asnez, eb88160, 2, (RF, RF_IF), rd_rm),
+
+ C3(acss, ec08100, 2, (RF, RF_IF), rd_rm),
+ C3(acssp, ec08120, 2, (RF, RF_IF), rd_rm),
+ C3(acssm, ec08140, 2, (RF, RF_IF), rd_rm),
+ C3(acssz, ec08160, 2, (RF, RF_IF), rd_rm),
+ C3(acsd, ec08180, 2, (RF, RF_IF), rd_rm),
+ C3(acsdp, ec081a0, 2, (RF, RF_IF), rd_rm),
+ C3(acsdm, ec081c0, 2, (RF, RF_IF), rd_rm),
+ C3(acsdz, ec081e0, 2, (RF, RF_IF), rd_rm),
+ C3(acse, ec88100, 2, (RF, RF_IF), rd_rm),
+ C3(acsep, ec88120, 2, (RF, RF_IF), rd_rm),
+ C3(acsem, ec88140, 2, (RF, RF_IF), rd_rm),
+ C3(acsez, ec88160, 2, (RF, RF_IF), rd_rm),
+
+ C3(atns, ed08100, 2, (RF, RF_IF), rd_rm),
+ C3(atnsp, ed08120, 2, (RF, RF_IF), rd_rm),
+ C3(atnsm, ed08140, 2, (RF, RF_IF), rd_rm),
+ C3(atnsz, ed08160, 2, (RF, RF_IF), rd_rm),
+ C3(atnd, ed08180, 2, (RF, RF_IF), rd_rm),
+ C3(atndp, ed081a0, 2, (RF, RF_IF), rd_rm),
+ C3(atndm, ed081c0, 2, (RF, RF_IF), rd_rm),
+ C3(atndz, ed081e0, 2, (RF, RF_IF), rd_rm),
+ C3(atne, ed88100, 2, (RF, RF_IF), rd_rm),
+ C3(atnep, ed88120, 2, (RF, RF_IF), rd_rm),
+ C3(atnem, ed88140, 2, (RF, RF_IF), rd_rm),
+ C3(atnez, ed88160, 2, (RF, RF_IF), rd_rm),
+
+ C3(urds, ee08100, 2, (RF, RF_IF), rd_rm),
+ C3(urdsp, ee08120, 2, (RF, RF_IF), rd_rm),
+ C3(urdsm, ee08140, 2, (RF, RF_IF), rd_rm),
+ C3(urdsz, ee08160, 2, (RF, RF_IF), rd_rm),
+ C3(urdd, ee08180, 2, (RF, RF_IF), rd_rm),
+ C3(urddp, ee081a0, 2, (RF, RF_IF), rd_rm),
+ C3(urddm, ee081c0, 2, (RF, RF_IF), rd_rm),
+ C3(urddz, ee081e0, 2, (RF, RF_IF), rd_rm),
+ C3(urde, ee88100, 2, (RF, RF_IF), rd_rm),
+ C3(urdep, ee88120, 2, (RF, RF_IF), rd_rm),
+ C3(urdem, ee88140, 2, (RF, RF_IF), rd_rm),
+ C3(urdez, ee88160, 2, (RF, RF_IF), rd_rm),
+
+ C3(nrms, ef08100, 2, (RF, RF_IF), rd_rm),
+ C3(nrmsp, ef08120, 2, (RF, RF_IF), rd_rm),
+ C3(nrmsm, ef08140, 2, (RF, RF_IF), rd_rm),
+ C3(nrmsz, ef08160, 2, (RF, RF_IF), rd_rm),
+ C3(nrmd, ef08180, 2, (RF, RF_IF), rd_rm),
+ C3(nrmdp, ef081a0, 2, (RF, RF_IF), rd_rm),
+ C3(nrmdm, ef081c0, 2, (RF, RF_IF), rd_rm),
+ C3(nrmdz, ef081e0, 2, (RF, RF_IF), rd_rm),
+ C3(nrme, ef88100, 2, (RF, RF_IF), rd_rm),
+ C3(nrmep, ef88120, 2, (RF, RF_IF), rd_rm),
+ C3(nrmem, ef88140, 2, (RF, RF_IF), rd_rm),
+ C3(nrmez, ef88160, 2, (RF, RF_IF), rd_rm),
+
+ C3(adfs, e000100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(adfsp, e000120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(adfsm, e000140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(adfsz, e000160, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(adfd, e000180, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(adfdp, e0001a0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(adfdm, e0001c0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(adfdz, e0001e0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(adfe, e080100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(adfep, e080120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(adfem, e080140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(adfez, e080160, 3, (RF, RF, RF_IF), rd_rn_rm),
+
+ C3(sufs, e200100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(sufsp, e200120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(sufsm, e200140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(sufsz, e200160, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(sufd, e200180, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(sufdp, e2001a0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(sufdm, e2001c0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(sufdz, e2001e0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(sufe, e280100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(sufep, e280120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(sufem, e280140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(sufez, e280160, 3, (RF, RF, RF_IF), rd_rn_rm),
+
+ C3(rsfs, e300100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rsfsp, e300120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rsfsm, e300140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rsfsz, e300160, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rsfd, e300180, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rsfdp, e3001a0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rsfdm, e3001c0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rsfdz, e3001e0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rsfe, e380100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rsfep, e380120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rsfem, e380140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rsfez, e380160, 3, (RF, RF, RF_IF), rd_rn_rm),
+
+ C3(mufs, e100100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(mufsp, e100120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(mufsm, e100140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(mufsz, e100160, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(mufd, e100180, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(mufdp, e1001a0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(mufdm, e1001c0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(mufdz, e1001e0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(mufe, e180100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(mufep, e180120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(mufem, e180140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(mufez, e180160, 3, (RF, RF, RF_IF), rd_rn_rm),
+
+ C3(dvfs, e400100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(dvfsp, e400120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(dvfsm, e400140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(dvfsz, e400160, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(dvfd, e400180, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(dvfdp, e4001a0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(dvfdm, e4001c0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(dvfdz, e4001e0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(dvfe, e480100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(dvfep, e480120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(dvfem, e480140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(dvfez, e480160, 3, (RF, RF, RF_IF), rd_rn_rm),
+
+ C3(rdfs, e500100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rdfsp, e500120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rdfsm, e500140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rdfsz, e500160, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rdfd, e500180, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rdfdp, e5001a0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rdfdm, e5001c0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rdfdz, e5001e0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rdfe, e580100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rdfep, e580120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rdfem, e580140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rdfez, e580160, 3, (RF, RF, RF_IF), rd_rn_rm),
+
+ C3(pows, e600100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(powsp, e600120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(powsm, e600140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(powsz, e600160, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(powd, e600180, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(powdp, e6001a0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(powdm, e6001c0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(powdz, e6001e0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(powe, e680100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(powep, e680120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(powem, e680140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(powez, e680160, 3, (RF, RF, RF_IF), rd_rn_rm),
+
+ C3(rpws, e700100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rpwsp, e700120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rpwsm, e700140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rpwsz, e700160, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rpwd, e700180, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rpwdp, e7001a0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rpwdm, e7001c0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rpwdz, e7001e0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rpwe, e780100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rpwep, e780120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rpwem, e780140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rpwez, e780160, 3, (RF, RF, RF_IF), rd_rn_rm),
+
+ C3(rmfs, e800100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rmfsp, e800120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rmfsm, e800140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rmfsz, e800160, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rmfd, e800180, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rmfdp, e8001a0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rmfdm, e8001c0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rmfdz, e8001e0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rmfe, e880100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rmfep, e880120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rmfem, e880140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(rmfez, e880160, 3, (RF, RF, RF_IF), rd_rn_rm),
+
+ C3(fmls, e900100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fmlsp, e900120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fmlsm, e900140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fmlsz, e900160, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fmld, e900180, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fmldp, e9001a0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fmldm, e9001c0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fmldz, e9001e0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fmle, e980100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fmlep, e980120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fmlem, e980140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fmlez, e980160, 3, (RF, RF, RF_IF), rd_rn_rm),
+
+ C3(fdvs, ea00100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fdvsp, ea00120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fdvsm, ea00140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fdvsz, ea00160, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fdvd, ea00180, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fdvdp, ea001a0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fdvdm, ea001c0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fdvdz, ea001e0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fdve, ea80100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fdvep, ea80120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fdvem, ea80140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(fdvez, ea80160, 3, (RF, RF, RF_IF), rd_rn_rm),
+
+ C3(frds, eb00100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(frdsp, eb00120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(frdsm, eb00140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(frdsz, eb00160, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(frdd, eb00180, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(frddp, eb001a0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(frddm, eb001c0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(frddz, eb001e0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(frde, eb80100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(frdep, eb80120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(frdem, eb80140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(frdez, eb80160, 3, (RF, RF, RF_IF), rd_rn_rm),
+
+ C3(pols, ec00100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(polsp, ec00120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(polsm, ec00140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(polsz, ec00160, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(pold, ec00180, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(poldp, ec001a0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(poldm, ec001c0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(poldz, ec001e0, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(pole, ec80100, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(polep, ec80120, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(polem, ec80140, 3, (RF, RF, RF_IF), rd_rn_rm),
+ C3(polez, ec80160, 3, (RF, RF, RF_IF), rd_rn_rm),
+
+ CE(cmf, e90f110, 2, (RF, RF_IF), fpa_cmp),
+ C3E(cmfe, ed0f110, 2, (RF, RF_IF), fpa_cmp),
+ CE(cnf, eb0f110, 2, (RF, RF_IF), fpa_cmp),
+ C3E(cnfe, ef0f110, 2, (RF, RF_IF), fpa_cmp),
+
+ C3(flts, e000110, 2, (RF, RR), rn_rd),
+ C3(fltsp, e000130, 2, (RF, RR), rn_rd),
+ C3(fltsm, e000150, 2, (RF, RR), rn_rd),
+ C3(fltsz, e000170, 2, (RF, RR), rn_rd),
+ C3(fltd, e000190, 2, (RF, RR), rn_rd),
+ C3(fltdp, e0001b0, 2, (RF, RR), rn_rd),
+ C3(fltdm, e0001d0, 2, (RF, RR), rn_rd),
+ C3(fltdz, e0001f0, 2, (RF, RR), rn_rd),
+ C3(flte, e080110, 2, (RF, RR), rn_rd),
+ C3(fltep, e080130, 2, (RF, RR), rn_rd),
+ C3(fltem, e080150, 2, (RF, RR), rn_rd),
+ C3(fltez, e080170, 2, (RF, RR), rn_rd),