-/* Intel Syntax */
-/* Values 0-4 map onto scale factor */
-#define BYTE_PTR 0
-#define WORD_PTR 1
-#define DWORD_PTR 2
-#define QWORD_PTR 3
-#define XWORD_PTR 4
-#define SHORT 5
-#define OFFSET_FLAT 6
-#define FLAT 7
-#define NONE_FOUND 8
-/*
- When an operand is read in it is classified by its type. This type includes
- all the possible ways an operand can be used. Thus, '%eax' is both 'register
- # 0' and 'The Accumulator'. In our language this is expressed by OR'ing
- 'Reg32' (any 32 bit register) and 'Acc' (the accumulator).
- Operands are classified so that we can match given operand types with
- the opcode table in opcode/i386.h.
- */
-/* register */
-#define Reg8 0x1 /* 8 bit reg */
-#define Reg16 0x2 /* 16 bit reg */
-#define Reg32 0x4 /* 32 bit reg */
-/* immediate */
-#define Imm8 0x8 /* 8 bit immediate */
-#define Imm8S 0x10 /* 8 bit immediate sign extended */
-#define Imm16 0x20 /* 16 bit immediate */
-#define Imm32 0x40 /* 32 bit immediate */
-#define Imm1 0x80 /* 1 bit immediate */
-/* memory */
-#define BaseIndex 0x100
-/* Disp8,16,32 are used in different ways, depending on the
- instruction. For jumps, they specify the size of the PC relative
- displacement, for baseindex type instructions, they specify the
- size of the offset relative to the base register, and for memory
- offset instructions such as `mov 1234,%al' they specify the size of
- the offset relative to the segment base. */
-#define Disp8 0x200 /* 8 bit displacement */
-#define Disp16 0x400 /* 16 bit displacement */
-#define Disp32 0x800 /* 32 bit displacement */
-/* specials */
-#define InOutPortReg 0x1000 /* register to hold in/out port addr = dx */
-#define ShiftCount 0x2000 /* register to hold shift cound = cl */
-#define Control 0x4000 /* Control register */
-#define Debug 0x8000 /* Debug register */
-#define Test 0x10000 /* Test register */
-#define FloatReg 0x20000 /* Float register */
-#define FloatAcc 0x40000 /* Float stack top %st(0) */
-#define SReg2 0x80000 /* 2 bit segment register */
-#define SReg3 0x100000 /* 3 bit segment register */
-#define Acc 0x200000 /* Accumulator %al or %ax or %eax */
-#define JumpAbsolute 0x400000
-#define RegMMX 0x800000 /* MMX register */
-#define RegXMM 0x1000000 /* XMM registers in PIII */
-#define EsSeg 0x2000000 /* String insn operand with fixed es segment */
-/* InvMem is for instructions with a modrm byte that only allow a
- general register encoding in the i.tm.mode and i.tm.regmem fields,
- eg. control reg moves. They really ought to support a memory form,
- but don't, so we add an InvMem flag to the register operand to
- indicate that it should be encoded in the i.tm.regmem field. */
-#define InvMem 0x4000000
-
-#define Reg (Reg8|Reg16|Reg32) /* gen'l register */
-#define WordReg (Reg16|Reg32)
-#define ImplicitRegister (InOutPortReg|ShiftCount|Acc|FloatAcc)
-#define Imm (Imm8|Imm8S|Imm16|Imm32) /* gen'l immediate */
-#define Disp (Disp8|Disp16|Disp32) /* General displacement */
-#define AnyMem (Disp|BaseIndex|InvMem) /* General memory */
-/* The following aliases are defined because the opcode table
- carefully specifies the allowed memory types for each instruction.
- At the moment we can only tell a memory reference size by the
- instruction suffix, so there's not much point in defining Mem8,
- Mem16, Mem32 and Mem64 opcode modifiers - We might as well just use
- the suffix directly to check memory operands. */
-#define LLongMem AnyMem /* 64 bits (or more) */
-#define LongMem AnyMem /* 32 bit memory ref */
-#define ShortMem AnyMem /* 16 bit memory ref */
-#define WordMem AnyMem /* 16 or 32 bit memory ref */
-#define ByteMem AnyMem /* 8 bit memory ref */
-
-#define SMALLEST_DISP_TYPE(num) \
- (fits_in_signed_byte(num) ? (Disp8|Disp32) : Disp32)
-