- /* Test whether this could be the third insn in a problematic sequence. */
- for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++)
- {
- if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
- idesc->operands[i] == IA64_OPND_R3
- /* For mov indirect. */
- || idesc->operands[i] == IA64_OPND_RR_R3
- || idesc->operands[i] == IA64_OPND_DBR_R3
- || idesc->operands[i] == IA64_OPND_IBR_R3
- || idesc->operands[i] == IA64_OPND_PKR_R3
- || idesc->operands[i] == IA64_OPND_PMC_R3
- || idesc->operands[i] == IA64_OPND_PMD_R3
- || idesc->operands[i] == IA64_OPND_MSR_R3
- || idesc->operands[i] == IA64_OPND_CPUID_R3
- /* For itr. */
- || idesc->operands[i] == IA64_OPND_ITR_R3
- || idesc->operands[i] == IA64_OPND_DTR_R3
- /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
- || idesc->operands[i] == IA64_OPND_MR3)
- {
- int regno = slot->opnd[i].X_add_number - REG_GR;
- /* Ignore invalid operands; they generate errors elsewhere. */
- if (regno >= 128)
- return 0;
- if (idesc->operands[i] == IA64_OPND_R3)
- {
- if (strcmp (idesc->name, "fc") != 0
- && strcmp (idesc->name, "tak") != 0
- && strcmp (idesc->name, "thash") != 0
- && strcmp (idesc->name, "tpa") != 0
- && strcmp (idesc->name, "ttag") != 0
- && strncmp (idesc->name, "ptr", 3) != 0
- && strncmp (idesc->name, "ptc", 3) != 0
- && strncmp (idesc->name, "probe", 5) != 0)
- return 0;
- }
- if (prev_group->g_reg_set_conditionally[regno])
- return 1;
+ reg_class = 0;
+ switch (idesc->operands[i])
+ {
+ case IA64_OPND_R1:
+ case IA64_OPND_R2:
+ case IA64_OPND_R3:
+ if (i < num_outputs)
+ {
+ if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
+ reg_class = 'r';
+ else if (reg1 < 0)
+ reg1 = CURR_SLOT.opnd[i].X_add_number;
+ else if (reg2 < 0)
+ reg2 = CURR_SLOT.opnd[i].X_add_number;
+ }
+ break;
+ case IA64_OPND_P1:
+ case IA64_OPND_P2:
+ if (i < num_outputs)
+ {
+ if (reg1 < 0)
+ reg1 = CURR_SLOT.opnd[i].X_add_number;
+ else if (reg2 < 0)
+ reg2 = CURR_SLOT.opnd[i].X_add_number;
+ }
+ break;
+ case IA64_OPND_F1:
+ case IA64_OPND_F2:
+ case IA64_OPND_F3:
+ case IA64_OPND_F4:
+ if (i < num_outputs)
+ {
+ if (CURR_SLOT.opnd[i].X_add_number >= REG_FR
+ && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1)
+ {
+ reg_class = 'f';
+ regno = CURR_SLOT.opnd[i].X_add_number - REG_FR;
+ }
+ else if (reg1 < 0)
+ reg1 = CURR_SLOT.opnd[i].X_add_number;
+ else if (reg2 < 0)
+ reg2 = CURR_SLOT.opnd[i].X_add_number;
+ }
+ break;
+ case IA64_OPND_MR3:
+ if (idesc->flags & IA64_OPCODE_POSTINC)
+ {
+ if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
+ reg_class = 'm';
+ else if (reg1 < 0)
+ reg1 = CURR_SLOT.opnd[i].X_add_number;
+ else if (reg2 < 0)
+ reg2 = CURR_SLOT.opnd[i].X_add_number;
+ }
+ break;
+ default:
+ break;
+ }
+ switch (reg_class)
+ {
+ case 0:
+ break;
+ default:
+ as_warn ("Invalid use of `%c%d' as output operand", reg_class, regno);
+ break;
+ case 'm':
+ as_warn ("Invalid use of `r%d' as base update address operand", regno);
+ break;