* config/tc-m68k.c (md_apply_fix3): Change val back to a signed type.

[deliverable/binutils-gdb.git] / gas / config / tc-m68k.c

diff --git a/gas/config/tc-m68k.c b/gas/config/tc-m68k.c
index 0badf708adc085ae0e1eac0a7d9d17d74322eb00..20c9c107b58ec6d6ede3d093a21f4832e98d43c6 100644 (file)
--- a/gas/config/tc-m68k.c
+++ b/gas/config/tc-m68k.c
@@ -1,5 +1,6 @@
 /* tc-m68k.c -- Assemble for the m68k family
 /* tc-m68k.c -- Assemble for the m68k family

-   Copyright (C) 1987, 91, 92, 93, 94, 95, 96, 97, 98, 99, 2000
+   Copyright 1987, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+   2000, 2001

    Free Software Foundation, Inc.
 
    This file is part of GAS, the GNU Assembler.
    Free Software Foundation, Inc.
 
    This file is part of GAS, the GNU Assembler.


@@ -19,10 +20,11 @@
    Software Foundation, 59 Temple Place - Suite 330, Boston, MA
    02111-1307, USA.  */
 
    Software Foundation, 59 Temple Place - Suite 330, Boston, MA
    02111-1307, USA.  */
 

-#include <ctype.h>

 #include "as.h"
 #include "as.h"

+#include "safe-ctype.h"

 #include "obstack.h"
 #include "subsegs.h"
 #include "obstack.h"
 #include "subsegs.h"

+#include "dwarf2dbg.h"

 
 #include "opcode/m68k.h"
 #include "m68k-parse.h"
 
 #include "opcode/m68k.h"
 #include "m68k-parse.h"


@@ -46,8 +48,8 @@ const char *m68k_comment_chars = "|";
    .line and .file directives will appear in the pre-processed output */
 /* Note that input_file.c hand checks for '#' at the beginning of the
    first line of the input file.  This is because the compiler outputs
    .line and .file directives will appear in the pre-processed output */
 /* Note that input_file.c hand checks for '#' at the beginning of the
    first line of the input file.  This is because the compiler outputs

-   #NO_APP at the beginning of its output. */
-/* Also note that comments like this one will always work. */
+   #NO_APP at the beginning of its output.  */
+/* Also note that comments like this one will always work.  */

 const char line_comment_chars[] = "#*";
 
 const char line_separator_chars[] = ";";
 const char line_comment_chars[] = "#*";
 
 const char line_separator_chars[] = ";";


@@ -68,12 +70,13 @@ const int md_reloc_size = 8;        /* Size of relocation record */
 
 /* Are we trying to generate PIC code?  If so, absolute references
    ought to be made into linkage table references or pc-relative
 
 /* Are we trying to generate PIC code?  If so, absolute references
    ought to be made into linkage table references or pc-relative

-   references.  Not implemented.  For ELF there are other means 
+   references.  Not implemented.  For ELF there are other means

    to denote pic relocations.  */
 int flag_want_pic;
 
 static int flag_short_refs;    /* -l option */
 static int flag_long_jumps;    /* -S option */
    to denote pic relocations.  */
 int flag_want_pic;
 
 static int flag_short_refs;    /* -l option */
 static int flag_long_jumps;    /* -S option */

+static int flag_keep_pcrel;    /* --pcrel option.  */

 
 #ifdef REGISTER_PREFIX_OPTIONAL
 int flag_reg_prefix_optional = REGISTER_PREFIX_OPTIONAL;
 
 #ifdef REGISTER_PREFIX_OPTIONAL
 int flag_reg_prefix_optional = REGISTER_PREFIX_OPTIONAL;


@@ -132,35 +135,6 @@ static struct label_line *current_label;
 /* See flames below */
 static struct obstack robyn;
 
 /* See flames below */
 static struct obstack robyn;
 

-#define TAB(x,y)       (((x)<<2)+(y))
-#define TABTYPE(xy)     ((xy) >> 2)
-#define BYTE           0
-#define SHORT          1
-#define LONG           2
-#define SZ_UNDEF       3
-#undef BRANCH
-/* Case `g' except when BCC68000 is applicable.  */
-#define ABRANCH                1
-/* Coprocessor branches.  */
-#define FBRANCH                2
-/* Mode 7.2 -- program counter indirect with (16-bit) displacement,
-   supported on all cpus.  Widens to 32-bit absolute.  */
-#define PCREL          3
-/* For inserting an extra jmp instruction with long offset on 68000,
-   for expanding conditional branches.  (Not bsr or bra.)  Since the
-   68000 doesn't support 32-bit displacements for conditional
-   branches, we fake it by reversing the condition and branching
-   around a jmp with an absolute long operand.  */
-#define BCC68000        4
-/* For the DBcc "instructions".  If the displacement requires 32 bits,
-   the branch-around-a-jump game is played here too.  */
-#define DBCC            5
-/* Not currently used?  */
-#define PCLEA          6
-/* Mode AINDX (apc-relative) using PC, with variable target, might fit
-   in 16 or 8 bits.  */
-#define PCINDEX                7
-

 struct m68k_incant
   {
     const char *m_operands;
 struct m68k_incant
   {
     const char *m_operands;


@@ -194,7 +168,7 @@ static const enum m68k_register m68060_control_regs[] = {
   0
 };
 static const enum m68k_register mcf_control_regs[] = {
   0
 };
 static const enum m68k_register mcf_control_regs[] = {

-  CACR, TC, ITT0, ITT1, DTT0, DTT1, VBR, ROMBAR, 
+  CACR, TC, ITT0, ITT1, DTT0, DTT1, VBR, ROMBAR,

   RAMBAR0, RAMBAR1, MBAR,
   0
 };
   RAMBAR0, RAMBAR1, MBAR,
   0
 };


@@ -257,7 +231,7 @@ struct m68k_it
 #define arch_coldfire_p(x)     (((x) & mcf) != 0)
 
 /* Macros for determining if cpu supports a specific addressing mode */
 #define arch_coldfire_p(x)     (((x) & mcf) != 0)
 
 /* Macros for determining if cpu supports a specific addressing mode */

-#define HAVE_LONG_BRANCH(x)    ((x) & (m68020|m68030|m68040|m68060|cpu32))
+#define HAVE_LONG_BRANCH(x)     ((x) & (m68020|m68030|m68040|m68060|cpu32|mcf5407))

 
 static struct m68k_it the_ins; /* the instruction being assembled */
 
 
 static struct m68k_it the_ins; /* the instruction being assembled */
 


@@ -283,9 +257,9 @@ insop (w, opcode)
      const struct m68k_incant *opcode;
 {
   int z;
      const struct m68k_incant *opcode;
 {
   int z;

-  for(z=the_ins.numo;z>opcode->m_codenum;--z)
+  for (z = the_ins.numo; z > opcode->m_codenum; --z)

     the_ins.opcode[z]=the_ins.opcode[z-1];
     the_ins.opcode[z]=the_ins.opcode[z-1];

-  for(z=0;z<the_ins.nrel;z++)
+  for (z = 0;z < the_ins.nrel; z++)

     the_ins.reloc[z].n+=2;
   for (z = 0; z < the_ins.nfrag; z++)
     the_ins.fragb[z].fragoff++;
     the_ins.reloc[z].n+=2;
   for (z = 0; z < the_ins.nfrag; z++)
     the_ins.fragb[z].fragoff++;


@@ -374,69 +348,120 @@ static void s_mri_repeat PARAMS ((int));
 static void s_mri_until PARAMS ((int));
 static void s_mri_while PARAMS ((int));
 static void s_mri_endw PARAMS ((int));
 static void s_mri_until PARAMS ((int));
 static void s_mri_while PARAMS ((int));
 static void s_mri_endw PARAMS ((int));

-static void md_apply_fix_2 PARAMS ((fixS *, offsetT));

 static void md_convert_frag_1 PARAMS ((fragS *));
 
 static int current_architecture;
 
 static void md_convert_frag_1 PARAMS ((fragS *));
 
 static int current_architecture;
 

-struct m68k_cpu {
-  unsigned long arch;
-  const char *name;
-  int alias;
-};
+struct m68k_cpu
+  {
+    unsigned long arch;
+    const char *name;
+    int alias;
+  };

 
 

-static const struct m68k_cpu archs[] = {
-  { m68000, "68000", 0 },
-  { m68010, "68010", 0 },
-  { m68020, "68020", 0 },
-  { m68030, "68030", 0 },
-  { m68040, "68040", 0 },
-  { m68060, "68060", 0 },
-  { cpu32,  "cpu32", 0 },
-  { m68881, "68881", 0 },
-  { m68851, "68851", 0 },
-  { mcf5200, "5200", 0 },
-  { mcf5206e, "5206e", 0 },
-  { mcf5307, "5307", 0},
-  /* Aliases (effectively, so far as gas is concerned) for the above
-     cpus.  */
-  { m68020, "68k", 1 },
-  { m68000, "68008", 1 },
-  { m68000, "68302", 1 },
-  { m68000, "68306", 1 },
-  { m68000, "68307", 1 },
-  { m68000, "68322", 1 },
-  { m68000, "68356", 1 },
-  { m68000, "68ec000", 1 },
-  { m68000, "68hc000", 1 },
-  { m68000, "68hc001", 1 },
-  { m68020, "68ec020", 1 },
-  { m68030, "68ec030", 1 },
-  { m68040, "68ec040", 1 },
-  { m68060, "68ec060", 1 },
-  { cpu32,  "68330", 1 },
-  { cpu32,  "68331", 1 },
-  { cpu32,  "68332", 1 },
-  { cpu32,  "68333", 1 },
-  { cpu32,  "68334", 1 },
-  { cpu32,  "68336", 1 },
-  { cpu32,  "68340", 1 },
-  { cpu32,  "68341", 1 },
-  { cpu32,  "68349", 1 },
-  { cpu32,  "68360", 1 },
-  { m68881, "68882", 1 },
-  { mcf5200, "5202", 1 },
-  { mcf5200, "5204", 1 },
-  { mcf5200, "5206", 1 },
-};
+static const struct m68k_cpu archs[] =
+  {
+    { m68000, "68000", 0 },
+    { m68010, "68010", 0 },
+    { m68020, "68020", 0 },
+    { m68030, "68030", 0 },
+    { m68040, "68040", 0 },
+    { m68060, "68060", 0 },
+    { cpu32,  "cpu32", 0 },
+    { m68881, "68881", 0 },
+    { m68851, "68851", 0 },
+    { mcf5200, "5200", 0 },
+    { mcf5206e, "5206e", 0 },
+    { mcf5307, "5307", 0},
+    { mcf5407, "5407", 0},
+    /* Aliases (effectively, so far as gas is concerned) for the above
+       cpus.  */
+    { m68020, "68k", 1 },
+    { m68000, "68008", 1 },
+    { m68000, "68302", 1 },
+    { m68000, "68306", 1 },
+    { m68000, "68307", 1 },
+    { m68000, "68322", 1 },
+    { m68000, "68356", 1 },
+    { m68000, "68ec000", 1 },
+    { m68000, "68hc000", 1 },
+    { m68000, "68hc001", 1 },
+    { m68020, "68ec020", 1 },
+    { m68030, "68ec030", 1 },
+    { m68040, "68ec040", 1 },
+    { m68060, "68ec060", 1 },
+    { cpu32,  "68330", 1 },
+    { cpu32,  "68331", 1 },
+    { cpu32,  "68332", 1 },
+    { cpu32,  "68333", 1 },
+    { cpu32,  "68334", 1 },
+    { cpu32,  "68336", 1 },
+    { cpu32,  "68340", 1 },
+    { cpu32,  "68341", 1 },
+    { cpu32,  "68349", 1 },
+    { cpu32,  "68360", 1 },
+    { m68881, "68882", 1 },
+    { mcf5200, "5202", 1 },
+    { mcf5200, "5204", 1 },
+    { mcf5200, "5206", 1 },
+  };

 
 static const int n_archs = sizeof (archs) / sizeof (archs[0]);
 
 
 static const int n_archs = sizeof (archs) / sizeof (archs[0]);
 

-/* BCC68000 is for patching in an extra jmp instruction for long offsets
-   on the 68000.  The 68000 doesn't support long branches with branchs */
+/* This is the assembler relaxation table for m68k. m68k is a rich CISC
+   architecture and we have a lot of relaxation modes.  */
+
+/* Macros used in the relaxation code.  */
+#define TAB(x,y)       (((x) << 2) + (y))
+#define TABTYPE(x)      ((x) >> 2)
+
+/* Relaxation states.  */
+#define BYTE           0
+#define SHORT          1
+#define LONG           2
+#define SZ_UNDEF       3

 
 

-/* This table desribes how you change sizes for the various types of variable
-   size expressions.  This version only supports two kinds. */
+/* Here are all the relaxation modes we support.  First we can relax ordinary
+   branches.  On 68020 and higher and on CPU32 all branch instructions take
+   three forms, so on these CPUs all branches always remain as such.  When we
+   have to expand to the LONG form on a 68000, though, we substitute an
+   absolute jump instead.  This is a direct replacement for unconditional
+   branches and a branch over a jump for conditional branches.  However, if the
+   user requires PIC and disables this with --pcrel, we can only relax between
+   BYTE and SHORT forms, punting if that isn't enough.  This gives us four
+   different relaxation modes for branches:  */
+
+#define BRANCHBWL      0       /* branch byte, word, or long */
+#define BRABSJUNC      1       /* absolute jump for LONG, unconditional */
+#define BRABSJCOND     2       /* absolute jump for LONG, conditional */
+#define BRANCHBW       3       /* branch byte or word */
+
+/* We also relax coprocessor branches and DBcc's.  All CPUs that support
+   coprocessor branches support them in word and long forms, so we have only
+   one relaxation mode for them.  DBcc's are word only on all CPUs.  We can
+   relax them to the LONG form with a branch-around sequence.  This sequence
+   can use a long branch (if available) or an absolute jump (if acceptable).
+   This gives us two relaxation modes.  If long branches are not available and
+   absolute jumps are not acceptable, we don't relax DBcc's.  */
+
+#define FBRANCH                4       /* coprocessor branch */
+#define DBCCLBR                5       /* DBcc relaxable with a long branch */
+#define DBCCABSJ       6       /* DBcc relaxable with an absolute jump */
+
+/* That's all for instruction relaxation.  However, we also relax PC-relative
+   operands.  Specifically, we have three operand relaxation modes.  On the
+   68000 PC-relative operands can only be 16-bit, but on 68020 and higher and
+   on CPU32 they may be 16-bit or 32-bit.  For the latter we relax between the
+   two.  Also PC+displacement+index operands in their simple form (with a non-
+   suppressed index without memory indirection) are supported on all CPUs, but
+   on the 68000 the displacement can be 8-bit only, whereas on 68020 and higher
+   and on CPU32 we relax it to SHORT and LONG forms as well using the extended
+   form of the PC+displacement+index operand.  Finally, some absolute operands
+   can be relaxed down to 16-bit PC-relative.  */
+
+#define PCREL1632      7       /* 16-bit or 32-bit PC-relative */
+#define PCINDEX                8       /* PC+displacement+index */
+#define ABSTOPCREL     9       /* absolute relax down to 16-bit PC-relative */

 
 /* Note that calls to frag_var need to specify the maximum expansion
    needed; this is currently 10 bytes for DBCC.  */
 
 /* Note that calls to frag_var need to specify the maximum expansion
    needed; this is currently 10 bytes for DBCC.  */


@@ -449,46 +474,55 @@ static const int n_archs = sizeof (archs) / sizeof (archs[0]);
    */
 relax_typeS md_relax_table[] =
 {
    */
 relax_typeS md_relax_table[] =
 {

-  {1, 1, 0, 0},                        /* First entries aren't used */
-  {1, 1, 0, 0},                        /* For no good reason except */
-  {1, 1, 0, 0},                        /* that the VAX doesn't either */
-  {1, 1, 0, 0},
-
-  {(127), (-128), 0, TAB (ABRANCH, SHORT)},
-  {(32767), (-32768), 2, TAB (ABRANCH, LONG)},
-  {0, 0, 4, 0},
-  {1, 1, 0, 0},
-
-  {1, 1, 0, 0},                        /* FBRANCH doesn't come BYTE */
-  {(32767), (-32768), 2, TAB (FBRANCH, LONG)},
-  {0, 0, 4, 0},
-  {1, 1, 0, 0},
-
-  {1, 1, 0, 0},                        /* PCREL doesn't come BYTE */
-  {(32767), (-32768), 2, TAB (PCREL, LONG)},
-  {0, 0, 4, 0},
-  {1, 1, 0, 0},
-
-  {(127), (-128), 0, TAB (BCC68000, SHORT)},
-  {(32767), (-32768), 2, TAB (BCC68000, LONG)},
-  {0, 0, 6, 0},                        /* jmp long space */
-  {1, 1, 0, 0},
-
-  {1, 1, 0, 0},                        /* DBCC doesn't come BYTE */
-  {(32767), (-32768), 2, TAB (DBCC, LONG)},
-  {0, 0, 10, 0},               /* bra/jmp long space */
-  {1, 1, 0, 0},
-
-  {1, 1, 0, 0},                        /* PCLEA doesn't come BYTE */
-  {32767, -32768, 2, TAB (PCLEA, LONG)},
-  {0, 0, 6, 0},
-  {1, 1, 0, 0},
-
-  /* For, e.g., jmp pcrel indexed.  */
-  {125, -130, 0, TAB (PCINDEX, SHORT)},
-  {32765, -32770, 2, TAB (PCINDEX, LONG)},
-  {0, 0, 4, 0},
-  {1, 1, 0, 0},
+  {   127,   -128,  0, TAB (BRANCHBWL, SHORT) },
+  { 32767, -32768,  2, TAB (BRANCHBWL, LONG) },
+  {     0,     0,  4, 0 },
+  {     1,     1,  0, 0 },
+
+  {   127,   -128,  0, TAB (BRABSJUNC, SHORT) },
+  { 32767, -32768,  2, TAB (BRABSJUNC, LONG) },
+  {    0,      0,  4, 0 },
+  {    1,      1,  0, 0 },
+
+  {   127,   -128,  0, TAB (BRABSJCOND, SHORT) },
+  { 32767, -32768,  2, TAB (BRABSJCOND, LONG) },
+  {    0,      0,  6, 0 },
+  {    1,      1,  0, 0 },
+
+  {   127,   -128,  0, TAB (BRANCHBW, SHORT) },
+  {    0,      0,  2, 0 },
+  {    1,      1,  0, 0 },
+  {    1,      1,  0, 0 },
+
+  {    1,      1,  0, 0 },             /* FBRANCH doesn't come BYTE */
+  { 32767, -32768,  2, TAB (FBRANCH, LONG) },
+  {    0,      0,  4, 0 },
+  {    1,      1,  0, 0 },
+
+  {    1,      1,  0, 0 },             /* DBCC doesn't come BYTE */
+  { 32767, -32768,  2, TAB (DBCCLBR, LONG) },
+  {    0,      0, 10, 0 },
+  {    1,      1,  0, 0 },
+
+  {    1,      1,  0, 0 },             /* DBCC doesn't come BYTE */
+  { 32767, -32768,  2, TAB (DBCCABSJ, LONG) },
+  {    0,      0, 10, 0 },
+  {    1,      1,  0, 0 },
+
+  {    1,      1,  0, 0 },             /* PCREL1632 doesn't come BYTE */
+  { 32767, -32768,  2, TAB (PCREL1632, LONG) },
+  {    0,      0,  6, 0 },
+  {    1,      1,  0, 0 },
+
+  {   125,   -130,  0, TAB (PCINDEX, SHORT) },
+  { 32765, -32770,  2, TAB (PCINDEX, LONG) },
+  {    0,      0,  4, 0 },
+  {    1,      1,  0, 0 },
+
+  {    1,      1,  0, 0 },             /* ABSTOPCREL doesn't come BYTE */
+  { 32767, -32768,  2, TAB (ABSTOPCREL, LONG) },
+  {    0,      0,  4, 0 },
+  {    1,      1,  0, 0 },

 };
 
 /* These are the machine dependent pseudo-ops.  These are included so
 };
 
 /* These are the machine dependent pseudo-ops.  These are included so


@@ -519,6 +553,12 @@ const pseudo_typeS md_pseudo_table[] =
   {"extend", float_cons, 'x'},
   {"ldouble", float_cons, 'x'},
 
   {"extend", float_cons, 'x'},
   {"ldouble", float_cons, 'x'},
 

+#ifdef OBJ_ELF
+  /* Dwarf2 support for Gcc.  */
+  {"file", dwarf2_directive_file, 0},
+  {"loc", dwarf2_directive_loc, 0},
+#endif
+

   /* The following pseudo-ops are supported for MRI compatibility.  */
   {"chip", s_chip, 0},
   {"comline", s_space, 1},
   /* The following pseudo-ops are supported for MRI compatibility.  */
   {"chip", s_chip, 0},
   {"comline", s_space, 1},


@@ -562,7 +602,6 @@ const pseudo_typeS md_pseudo_table[] =
   {0, 0, 0}
 };
 
   {0, 0, 0}
 };
 

-

 /* The mote pseudo ops are put into the opcode table, since they
    don't start with a . they look like opcodes to gas.
    */
 /* The mote pseudo ops are put into the opcode table, since they
    don't start with a . they look like opcodes to gas.
    */


@@ -608,8 +647,6 @@ CONST pseudo_typeS mote_pseudo_table[] =
 
 extern char *input_line_pointer;
 
 
 extern char *input_line_pointer;
 

-static char mklower_table[256];
-#define mklower(c) (mklower_table[(unsigned char)(c)])

 static char notend_table[256];
 static char alt_notend_table[256];
 #define notend(s)                                              \
 static char notend_table[256];
 static char alt_notend_table[256];
 #define notend(s)                                              \


@@ -676,6 +713,19 @@ tc_coff_fix2rtype (fixP)
 
 #ifdef OBJ_ELF
 
 
 #ifdef OBJ_ELF
 

+/* Return zero if the reference to SYMBOL from within the same segment may
+   be relaxed.  */
+
+/* On an ELF system, we can't relax an externally visible symbol,
+   because it may be overridden by a shared library.  However, if
+   TARGET_OS is "elf", then we presume that we are assembling for an
+   embedded system, in which case we don't have to worry about shared
+   libraries, and we can relax any external sym.  */
+
+#define relaxable_symbol(symbol) \
+  (!((S_IS_EXTERNAL (symbol) && strcmp (TARGET_OS, "elf") != 0)                \
+     || S_IS_WEAK (symbol)))
+

 /* Compute the relocation code for a fixup of SIZE bytes, using pc
    relative relocation if PCREL is non-zero.  PIC says whether a special
    pic relocation was requested.  */
 /* Compute the relocation code for a fixup of SIZE bytes, using pc
    relative relocation if PCREL is non-zero.  PIC says whether a special
    pic relocation was requested.  */


@@ -793,9 +843,8 @@ int
 tc_m68k_fix_adjustable (fixP)
      fixS *fixP;
 {
 tc_m68k_fix_adjustable (fixP)
      fixS *fixP;
 {

-  /* Prevent all adjustments to global symbols. */
-  if (S_IS_EXTERNAL (fixP->fx_addsy)
-      || S_IS_WEAK (fixP->fx_addsy))
+  /* Prevent all adjustments to global symbols.  */
+  if (! relaxable_symbol (fixP->fx_addsy))

     return 0;
 
   /* adjust_reloc_syms doesn't know about the GOT */
     return 0;
 
   /* adjust_reloc_syms doesn't know about the GOT */


@@ -828,6 +877,8 @@ tc_m68k_fix_adjustable (fixP)
 
 #define get_reloc_code(SIZE,PCREL,OTHER) NO_RELOC
 
 
 #define get_reloc_code(SIZE,PCREL,OTHER) NO_RELOC
 

+#define relaxable_symbol(symbol) 1
+

 #endif /* OBJ_ELF */
 
 #ifdef BFD_ASSEMBLER
 #endif /* OBJ_ELF */
 
 #ifdef BFD_ASSEMBLER


@@ -840,8 +891,19 @@ tc_gen_reloc (section, fixp)
   arelent *reloc;
   bfd_reloc_code_real_type code;
 
   arelent *reloc;
   bfd_reloc_code_real_type code;
 

+  /* If the tcbit is set, then this was a fixup of a negative value
+     that was never resolved.  We do not have a reloc to handle this,
+     so just return.  We assume that other code will have detected this
+     situation and produced a helpful error message, so we just tell the
+     user that the reloc cannot be produced.  */

   if (fixp->fx_tcbit)
   if (fixp->fx_tcbit)

-    abort ();
+    {
+      if (fixp->fx_addsy)
+       as_bad_where (fixp->fx_file, fixp->fx_line,
+                     _("Unable to produce reloc against symbol '%s'"),
+                     S_GET_NAME (fixp->fx_addsy));
+      return NULL;
+    }

 
   if (fixp->fx_r_type != BFD_RELOC_NONE)
     {
 
   if (fixp->fx_r_type != BFD_RELOC_NONE)
     {


@@ -920,8 +982,9 @@ tc_gen_reloc (section, fixp)
     reloc->addend = fixp->fx_addnumber;
   else
     reloc->addend = (section->vma
     reloc->addend = fixp->fx_addnumber;
   else
     reloc->addend = (section->vma

-                    + (fixp->fx_pcrel_adjust == 64
-                       ? -1 : fixp->fx_pcrel_adjust)
+                    /* Explicit sign extension in case char is
+                       unsigned.  */
+                    + ((fixp->fx_pcrel_adjust & 0xff) ^ 0x80) - 0x80

                     + fixp->fx_addnumber
                     + md_pcrel_from (fixp));
 #endif
                     + fixp->fx_addnumber
                     + md_pcrel_from (fixp));
 #endif


@@ -934,27 +997,6 @@ tc_gen_reloc (section, fixp)
 
 #endif /* BFD_ASSEMBLER */
 
 
 #endif /* BFD_ASSEMBLER */
 

-/* Return zero if the reference to SYMBOL from within the same segment may
-   be relaxed.  */
-#ifdef OBJ_ELF
-
-/* On an ELF system, we can't relax an externally visible symbol,
-   because it may be overridden by a shared library.  However, if
-   TARGET_OS is "elf", then we presume that we are assembling for an
-   embedded system, in which case we don't have to worry about shared
-   libraries, and we can relax anything.  */
-
-#define relaxable_symbol(symbol)               \
-  (strcmp (TARGET_OS, "elf") == 0              \
-   || (! S_IS_EXTERNAL (symbol)                        \
-       && ! S_IS_WEAK (symbol)))
-
-#else
-
-#define relaxable_symbol(symbol) 1
-
-#endif
- 

 /* Handle of the OPCODE hash table.  NULL means any use before
    m68k_ip_begin() will crash.  */
 static struct hash_control *op_hash;
 /* Handle of the OPCODE hash table.  NULL means any use before
    m68k_ip_begin() will crash.  */
 static struct hash_control *op_hash;


@@ -983,7 +1025,7 @@ m68k_ip (instring)
     instring++;                        /* skip leading whitespace */
 
   /* Scan up to end of operation-code, which MUST end in end-of-string
     instring++;                        /* skip leading whitespace */
 
   /* Scan up to end of operation-code, which MUST end in end-of-string

-     or exactly 1 space. */
+     or exactly 1 space.  */

   pdot = 0;
   for (p = instring; *p != '\0'; p++)
     {
   pdot = 0;
   for (p = instring; *p != '\0'; p++)
     {


@@ -1092,7 +1134,7 @@ m68k_ip (instring)
   for (losing = 0;;)
     {
       /* If we didn't get the right number of ops, or we have no
   for (losing = 0;;)
     {
       /* If we didn't get the right number of ops, or we have no

-        common model with this pattern then reject this pattern. */
+        common model with this pattern then reject this pattern.  */

 
       ok_arch |= opcode->m_arch;
       if (opsfound != opcode->m_opnum
 
       ok_arch |= opcode->m_arch;
       if (opsfound != opcode->m_opnum


@@ -1755,7 +1797,7 @@ m68k_ip (instring)
                          && opP->reg != BC))
                    {
                      losing++;
                          && opP->reg != BC))
                    {
                      losing++;

-                   }           /* not a cache specifier. */
+                   }           /* not a cache specifier.  */

                  break;
 
                case '_':
                  break;
 
                case '_':


@@ -1768,7 +1810,7 @@ m68k_ip (instring)
                    losing++;
                  /* FIXME: kludge instead of fixing parser:
                      upper/lower registers are *not* CONTROL
                    losing++;
                  /* FIXME: kludge instead of fixing parser:
                      upper/lower registers are *not* CONTROL

-                     registers, but ordinary ones. */
+                     registers, but ordinary ones.  */

                  if ((opP->reg >= DATA0L && opP->reg <= DATA7L)
                      || (opP->reg >= DATA0U && opP->reg <= DATA7U))
                    opP->mode = DREG;
                  if ((opP->reg >= DATA0L && opP->reg <= DATA7L)
                      || (opP->reg >= DATA0U && opP->reg <= DATA7U))
                    opP->mode = DREG;


@@ -1788,7 +1830,7 @@ m68k_ip (instring)
       if (!losing)
        {
          break;
       if (!losing)
        {
          break;

-       }                       /* got it. */
+       }                       /* got it.  */

 
       opcode = opcode->m_next;
 
 
       opcode = opcode->m_next;
 


@@ -2064,7 +2106,7 @@ m68k_ip (instring)
                            {
                              add_frag (adds (&opP->disp),
                                        offs (&opP->disp),
                            {
                              add_frag (adds (&opP->disp),
                                        offs (&opP->disp),

-                                       TAB (PCLEA, SZ_UNDEF));
+                                       TAB (PCREL1632, SZ_UNDEF));

                              break;
                            }
                        }
                              break;
                            }
                        }


@@ -2144,9 +2186,9 @@ m68k_ip (instring)
                          && m68k_index_width_default == SIZE_LONG))
                    nextword |= 0x800;
 
                          && m68k_index_width_default == SIZE_LONG))
                    nextword |= 0x800;
 

-                 if ((opP->index.scale != 1 
+                 if ((opP->index.scale != 1

                       && cpu_of_arch (current_architecture) < m68020)
                       && cpu_of_arch (current_architecture) < m68020)

-                     || (opP->index.scale == 8 
+                     || (opP->index.scale == 8

                          && arch_coldfire_p (current_architecture)))
                    {
                      opP->error =
                          && arch_coldfire_p (current_architecture)))
                    {
                      opP->error =


@@ -2372,15 +2414,13 @@ m68k_ip (instring)
                         cannot be relaxed.  */
                      && opP->disp.pic_reloc == pic_none
 #endif
                         cannot be relaxed.  */
                      && opP->disp.pic_reloc == pic_none
 #endif

-                     && S_GET_SEGMENT (adds (&opP->disp)) == now_seg
-                     && relaxable_symbol (adds (&opP->disp))

                      && !flag_long_jumps
                      && !strchr ("~%&$?", s[0]))
                    {
                      tmpreg = 0x3A;    /* 7.2 */
                      add_frag (adds (&opP->disp),
                                offs (&opP->disp),
                      && !flag_long_jumps
                      && !strchr ("~%&$?", s[0]))
                    {
                      tmpreg = 0x3A;    /* 7.2 */
                      add_frag (adds (&opP->disp),
                                offs (&opP->disp),

-                               TAB (PCREL, SZ_UNDEF));
+                               TAB (ABSTOPCREL, SZ_UNDEF));

                      break;
                    }
                  /* Fall through into long */
                      break;
                    }
                  /* Fall through into long */


@@ -2409,7 +2449,7 @@ m68k_ip (instring)
            case FPREG:
            default:
              as_bad (_("unknown/incorrect operand"));
            case FPREG:
            default:
              as_bad (_("unknown/incorrect operand"));

-             /* abort(); */
+             /* abort (); */

            }
          install_gen_operand (s[1], tmpreg);
          break;
            }
          install_gen_operand (s[1], tmpreg);
          break;


@@ -2500,11 +2540,7 @@ m68k_ip (instring)
          switch (s[1])
            {
            case 'B':
          switch (s[1])
            {
            case 'B':

-             /* The pc_fix argument winds up in fx_pcrel_adjust,
-                 which is a char, and may therefore be unsigned.  We
-                 want to pass -1, but we pass 64 instead, and convert
-                 back in md_pcrel_from.  */
-             add_fix ('B', &opP->disp, 1, 64);
+             add_fix ('B', &opP->disp, 1, -1);

              break;
            case 'W':
              add_fix ('w', &opP->disp, 1, 0);
              break;
            case 'W':
              add_fix ('w', &opP->disp, 1, 0);


@@ -2512,9 +2548,9 @@ m68k_ip (instring)
              break;
            case 'L':
            long_branch:
              break;
            case 'L':
            long_branch:

-             if (!HAVE_LONG_BRANCH(current_architecture))
+             if (! HAVE_LONG_BRANCH (current_architecture))

                as_warn (_("Can't use long branches on 68000/68010/5200"));
                as_warn (_("Can't use long branches on 68000/68010/5200"));

-             the_ins.opcode[the_ins.numo - 1] |= 0xff;
+             the_ins.opcode[0] |= 0xff;

              add_fix ('l', &opP->disp, 1, 0);
              addword (0);
              addword (0);
              add_fix ('l', &opP->disp, 1, 0);
              addword (0);
              addword (0);


@@ -2529,37 +2565,66 @@ m68k_ip (instring)
              if (opP->disp.pic_reloc != pic_none)
                goto long_branch;
 #endif
              if (opP->disp.pic_reloc != pic_none)
                goto long_branch;
 #endif

-

              /* This could either be a symbol, or an absolute
              /* This could either be a symbol, or an absolute

-                address.  No matter, the frag hacking will finger it
-                out.  Not quite: it can't switch from BRANCH to
-                BCC68000 for the case where opnd is absolute (it
-                needs to use the 68000 hack since no conditional abs
-                jumps).  */
-             if (( !HAVE_LONG_BRANCH(current_architecture)
-                  || (0 == adds (&opP->disp)))
-                 && (the_ins.opcode[0] >= 0x6200)
-                 && (the_ins.opcode[0] <= 0x6f00))
+                address.  If it's an absolute address, turn it into
+                an absolute jump right here and keep it out of the
+                relaxer.  */
+             if (adds (&opP->disp) == 0)
+               {
+                 if (the_ins.opcode[0] == 0x6000)      /* jbra */
+                   the_ins.opcode[0] = 0x4EF9;
+                 else if (the_ins.opcode[0] == 0x6100) /* jbsr */
+                   the_ins.opcode[0] = 0x4EB9;
+                 else                                  /* jCC */
+                   {
+                     the_ins.opcode[0] ^= 0x0100;
+                     the_ins.opcode[0] |= 0x0006;
+                     addword (0x4EF9);
+                   }
+                 add_fix ('l', &opP->disp, 0, 0);
+                 addword (0);
+                 addword (0);
+                 break;
+               }
+
+             /* Now we know it's going into the relaxer.  Now figure
+                out which mode.  We try in this order of preference:
+                long branch, absolute jump, byte/word branches only.  */
+             if (HAVE_LONG_BRANCH (current_architecture))

                add_frag (adds (&opP->disp), offs (&opP->disp),
                add_frag (adds (&opP->disp), offs (&opP->disp),

-                         TAB (BCC68000, SZ_UNDEF));
+                         TAB (BRANCHBWL, SZ_UNDEF));
+             else if (! flag_keep_pcrel)
+               {
+                 if ((the_ins.opcode[0] == 0x6000)
+                     || (the_ins.opcode[0] == 0x6100))
+                   add_frag (adds (&opP->disp), offs (&opP->disp),
+                             TAB (BRABSJUNC, SZ_UNDEF));
+                 else
+                   add_frag (adds (&opP->disp), offs (&opP->disp),
+                             TAB (BRABSJCOND, SZ_UNDEF));
+               }

              else
                add_frag (adds (&opP->disp), offs (&opP->disp),
              else
                add_frag (adds (&opP->disp), offs (&opP->disp),

-                         TAB (ABRANCH, SZ_UNDEF));
+                         TAB (BRANCHBW, SZ_UNDEF));

              break;
            case 'w':
              if (isvar (&opP->disp))
                {
              break;
            case 'w':
              if (isvar (&opP->disp))
                {

-#if 1
-                 /* check for DBcc instruction */
-                 if ((the_ins.opcode[0] & 0xf0f8) == 0x50c8)
+                 /* Check for DBcc instructions.  We can relax them,
+                    but only if we have long branches and/or absolute
+                    jumps.  */
+                 if (((the_ins.opcode[0] & 0xf0f8) == 0x50c8)
+                     && (HAVE_LONG_BRANCH (current_architecture)
+                         || (! flag_keep_pcrel)))

                    {
                    {

-                     /* size varies if patch */
-                     /* needed for long form */
-                     add_frag (adds (&opP->disp), offs (&opP->disp),
-                               TAB (DBCC, SZ_UNDEF));
+                     if (HAVE_LONG_BRANCH (current_architecture))
+                       add_frag (adds (&opP->disp), offs (&opP->disp),
+                                 TAB (DBCCLBR, SZ_UNDEF));
+                     else
+                       add_frag (adds (&opP->disp), offs (&opP->disp),
+                                 TAB (DBCCABSJ, SZ_UNDEF));

                      break;
                    }
                      break;
                    }

-#endif

                  add_fix ('w', &opP->disp, 1, 0);
                }
              addword (0);
                  add_fix ('w', &opP->disp, 1, 0);
                }
              addword (0);


@@ -2570,23 +2635,16 @@ m68k_ip (instring)
              addword (0);
              break;
            case 'c':           /* Var size Coprocesssor branches */
              addword (0);
              break;
            case 'c':           /* Var size Coprocesssor branches */

-             if (subs (&opP->disp))
-               {
-                 add_fix ('l', &opP->disp, 1, 0);
-                 add_frag ((symbolS *) 0, (offsetT) 0, TAB (FBRANCH, LONG));
-               }
-             else if (adds (&opP->disp))
-               add_frag (adds (&opP->disp), offs (&opP->disp),
-                         TAB (FBRANCH, SZ_UNDEF));
-             else
+             if (subs (&opP->disp) || (adds (&opP->disp) == 0))

                {
                {

-                 /* add_frag ((symbolS *) 0, offs (&opP->disp),
-                              TAB(FBRANCH,SHORT)); */

                  the_ins.opcode[the_ins.numo - 1] |= 0x40;
                  add_fix ('l', &opP->disp, 1, 0);
                  addword (0);
                  addword (0);
                }
                  the_ins.opcode[the_ins.numo - 1] |= 0x40;
                  add_fix ('l', &opP->disp, 1, 0);
                  addword (0);
                  addword (0);
                }

+             else
+               add_frag (adds (&opP->disp), offs (&opP->disp),
+                         TAB (FBRANCH, SZ_UNDEF));

              break;
            default:
              abort ();
              break;
            default:
              abort ();


@@ -2822,7 +2880,7 @@ m68k_ip (instring)
          install_operand (s[1], tmpreg);
          break;
 #ifndef NO_68851
          install_operand (s[1], tmpreg);
          break;
 #ifndef NO_68851

-         /* JF: These are out of order, I fear. */
+         /* JF: These are out of order, I fear.  */

        case 'f':
          switch (opP->reg)
            {
        case 'f':
          switch (opP->reg)
            {


@@ -2960,7 +3018,7 @@ m68k_ip (instring)
     }
 
   /* By the time whe get here (FINALLY) the_ins contains the complete
     }
 
   /* By the time whe get here (FINALLY) the_ins contains the complete

-     instruction, ready to be emitted. . . */
+     instruction, ready to be emitted. . .  */

 }
 
 static int
 }
 
 static int


@@ -3250,7 +3308,7 @@ insert_reg (regname, regnum)
                                   &zero_address_frag));
 
   for (i = 0; regname[i]; i++)
                                   &zero_address_frag));
 
   for (i = 0; regname[i]; i++)

-    buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i];
+    buf[i] = TOUPPER (regname[i]);

   buf[i] = '\0';
 
   symbol_table_insert (symbol_new (buf, reg_section, regnum,
   buf[i] = '\0';
 
   symbol_table_insert (symbol_new (buf, reg_section, regnum,


@@ -3426,7 +3484,7 @@ static const struct init_entry init_table[] =
   { "za6", ZADDR6 },
   { "za7", ZADDR7 },
 
   { "za6", ZADDR6 },
   { "za7", ZADDR7 },
 

-  /* Upper and lower data and address registers, used by macw and msacw. */
+  /* Upper and lower data and address registers, used by macw and msacw.  */

   { "d0l", DATA0L },
   { "d1l", DATA1L },
   { "d2l", DATA2L },
   { "d0l", DATA0L },
   { "d1l", DATA1L },
   { "d2l", DATA2L },


@@ -3553,6 +3611,11 @@ md_assemble (str)
       current_label = NULL;
     }
 
       current_label = NULL;
     }
 

+#ifdef OBJ_ELF
+  /* Tie dwarf2 debug info to the address at the start of the insn.  */
+  dwarf2_emit_insn (0);
+#endif
+

   if (the_ins.nfrag == 0)
     {
       /* No frag hacking involved; just put it out */
   if (the_ins.nfrag == 0)
     {
       /* No frag hacking involved; just put it out */


@@ -3606,6 +3669,21 @@ md_assemble (str)
     }
 
   /* There's some frag hacking */
     }
 
   /* There's some frag hacking */

+  {
+    /* Calculate the max frag size.  */
+    int wid;
+
+    wid = 2 * the_ins.fragb[0].fragoff;
+    for (n = 1; n < the_ins.nfrag; n++)
+      wid += 2 * (the_ins.numo - the_ins.fragb[n - 1].fragoff);
+    /* frag_var part.  */
+    wid += 10;
+    /* Make sure the whole insn fits in one chunk, in particular that
+       the var part is attached, as we access one byte before the
+       variable frag for byte branches.  */
+    frag_grow (wid);
+  }
+

   for (n = 0, fromP = &the_ins.opcode[0]; n < the_ins.nfrag; n++)
     {
       int wid;
   for (n = 0, fromP = &the_ins.opcode[0]; n < the_ins.nfrag; n++)
     {
       int wid;


@@ -3700,11 +3778,10 @@ md_begin ()
      my lord ghod hath spoken, so we do it this way.  Excuse the ugly var
      names.  */
 
      my lord ghod hath spoken, so we do it this way.  Excuse the ugly var
      names.  */
 

-  register const struct m68k_opcode *ins;
-  register struct m68k_incant *hack, *slak;
-  register const char *retval = 0;     /* empty string, or error msg text */
-  register int i;
-  register char c;
+  const struct m68k_opcode *ins;
+  struct m68k_incant *hack, *slak;
+  const char *retval = 0;      /* empty string, or error msg text */
+  int i;

 
   if (flag_mri)
     {
 
   if (flag_mri)
     {


@@ -3724,7 +3801,7 @@ md_begin ()
        {
          ins = &m68k_opcodes[i];
          /* We *could* ignore insns that don't match our arch here
        {
          ins = &m68k_opcodes[i];
          /* We *could* ignore insns that don't match our arch here

-            but just leaving them out of the hash. */
+            but just leaving them out of the hash.  */

          slak->m_operands = ins->args;
          slak->m_opnum = strlen (slak->m_operands) / 2;
          slak->m_arch = ins->arch;
          slak->m_operands = ins->args;
          slak->m_opnum = strlen (slak->m_operands) / 2;
          slak->m_arch = ins->arch;


@@ -3799,9 +3876,6 @@ md_begin ()
        }
     }
 
        }
     }
 

-  for (i = 0; i < (int) sizeof (mklower_table); i++)
-    mklower_table[i] = (isupper (c = (char) i)) ? tolower (c) : c;
-

   for (i = 0; i < (int) sizeof (notend_table); i++)
     {
       notend_table[i] = 0;
   for (i = 0; i < (int) sizeof (notend_table); i++)
     {
       notend_table[i] = 0;


@@ -3901,6 +3975,7 @@ select_control_regs ()
     case mcf5200:
     case mcf5206e:
     case mcf5307:
     case mcf5200:
     case mcf5206e:
     case mcf5307:

+    case mcf5407:

       control_regs = mcf_control_regs;
       break;
     default:
       control_regs = mcf_control_regs;
       break;
     default:


@@ -4146,11 +4221,13 @@ md_number_to_chars (buf, val, n)
   number_to_chars_bigendian (buf, val, n);
 }
 
   number_to_chars_bigendian (buf, val, n);
 }
 

-static void
-md_apply_fix_2 (fixP, val)
+void
+md_apply_fix3 (fixP, valP, seg)

      fixS *fixP;
      fixS *fixP;

-     offsetT val;
+     valueT *valP;
+     segT seg ATTRIBUTE_UNUSED;

 {
 {

+  offsetT val = *valP;

   addressT upper_limit;
   offsetT lower_limit;
 
   addressT upper_limit;
   offsetT lower_limit;
 


@@ -4160,10 +4237,10 @@ md_apply_fix_2 (fixP, val)
   buf += fixP->fx_where;
   /* end ibm compiler workaround */
 
   buf += fixP->fx_where;
   /* end ibm compiler workaround */
 

-  if (val & 0x80000000)
-    val |= ~(addressT)0x7fffffff;
-  else
-    val &= 0x7fffffff;
+  val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000;
+
+  if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
+    fixP->fx_done = 1;

 
 #ifdef OBJ_ELF
   if (fixP->fx_addsy)
 
 #ifdef OBJ_ELF
   if (fixP->fx_addsy)


@@ -4187,8 +4264,8 @@ md_apply_fix_2 (fixP, val)
 
   switch (fixP->fx_size)
     {
 
   switch (fixP->fx_size)
     {

-      /* The cast to offsetT below are necessary to make code correct for
-        machines where ints are smaller than offsetT */
+      /* The cast to offsetT below are necessary to make code
+        correct for machines where ints are smaller than offsetT.  */

     case 1:
       *buf++ = val;
       upper_limit = 0x7f;
     case 1:
       *buf++ = val;
       upper_limit = 0x7f;


@@ -4248,24 +4325,6 @@ md_apply_fix_2 (fixP, val)
     as_bad_where (fixP->fx_file, fixP->fx_line, _("invalid byte branch offset"));
 }
 
     as_bad_where (fixP->fx_file, fixP->fx_line, _("invalid byte branch offset"));
 }
 

-#ifdef BFD_ASSEMBLER
-int
-md_apply_fix (fixP, valp)
-     fixS *fixP;
-     valueT *valp;
-{
-  md_apply_fix_2 (fixP, (addressT) *valp);
-  return 1;
-}
-#else
-void md_apply_fix (fixP, val)
-     fixS *fixP;
-     long val;
-{
-  md_apply_fix_2 (fixP, (addressT) val);
-}
-#endif
-

 /* *fragP has been relaxed to its final size, and now needs to have
    the bytes inside it modified to conform to the new size  There is UGLY
    MAGIC here. ..
 /* *fragP has been relaxed to its final size, and now needs to have
    the bytes inside it modified to conform to the new size  There is UGLY
    MAGIC here. ..


@@ -4275,7 +4334,6 @@ md_convert_frag_1 (fragP)
      register fragS *fragP;
 {
   long disp;
      register fragS *fragP;
 {
   long disp;

-  long ext = 0;

   fixS *fixP;
 
   /* Address in object code of the displacement.  */
   fixS *fixP;
 
   /* Address in object code of the displacement.  */


@@ -4283,7 +4341,7 @@ md_convert_frag_1 (fragP)
 
   /* Address in gas core of the place to store the displacement.  */
   /* This convinces the native rs6000 compiler to generate the code we
 
   /* Address in gas core of the place to store the displacement.  */
   /* This convinces the native rs6000 compiler to generate the code we

-     want. */
+     want.  */

   register char *buffer_address = fragP->fr_literal;
   buffer_address += fragP->fr_fix;
   /* end ibm compiler workaround */
   register char *buffer_address = fragP->fr_literal;
   buffer_address += fragP->fr_fix;
   /* end ibm compiler workaround */


@@ -4292,194 +4350,187 @@ md_convert_frag_1 (fragP)
   disp = fragP->fr_symbol ? S_GET_VALUE (fragP->fr_symbol) : 0;
   disp = (disp + fragP->fr_offset) - object_address;
 
   disp = fragP->fr_symbol ? S_GET_VALUE (fragP->fr_symbol) : 0;
   disp = (disp + fragP->fr_offset) - object_address;
 

-#ifdef BFD_ASSEMBLER
-  disp += symbol_get_frag (fragP->fr_symbol)->fr_address;
-#endif
-

   switch (fragP->fr_subtype)
     {
   switch (fragP->fr_subtype)
     {

-    case TAB (BCC68000, BYTE):
-    case TAB (ABRANCH, BYTE):
+    case TAB (BRANCHBWL, BYTE):
+    case TAB (BRABSJUNC, BYTE):
+    case TAB (BRABSJCOND, BYTE):
+    case TAB (BRANCHBW, BYTE):

       know (issbyte (disp));
       if (disp == 0)
       know (issbyte (disp));
       if (disp == 0)

-       as_bad (_("short branch with zero offset: use :w"));
-      fragP->fr_opcode[1] = disp;
-      ext = 0;
-      break;
-    case TAB (DBCC, SHORT):
-      know (issword (disp));
-      ext = 2;
+       as_bad_where (fragP->fr_file, fragP->fr_line,
+                     _("short branch with zero offset: use :w"));
+      fixP = fix_new (fragP, fragP->fr_fix - 1, 1, fragP->fr_symbol,
+                     fragP->fr_offset, 1, RELAX_RELOC_PC8);
+      fixP->fx_pcrel_adjust = -1;

       break;
       break;

-    case TAB (BCC68000, SHORT):
-    case TAB (ABRANCH, SHORT):
-      know (issword (disp));
+    case TAB (BRANCHBWL, SHORT):
+    case TAB (BRABSJUNC, SHORT):
+    case TAB (BRABSJCOND, SHORT):
+    case TAB (BRANCHBW, SHORT):

       fragP->fr_opcode[1] = 0x00;
       fragP->fr_opcode[1] = 0x00;

-      ext = 2;
+      fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
+              1, RELAX_RELOC_PC16);
+      fragP->fr_fix += 2;

       break;
       break;

-    case TAB (ABRANCH, LONG):
-      if (!HAVE_LONG_BRANCH(current_architecture))
+    case TAB (BRANCHBWL, LONG):
+      fragP->fr_opcode[1] = (char) 0xFF;
+      fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol, fragP->fr_offset,
+              1, RELAX_RELOC_PC32);
+      fragP->fr_fix += 4;
+      break;
+    case TAB (BRABSJUNC, LONG):
+      if (fragP->fr_opcode[0] == 0x61)         /* jbsr */

        {
        {

-         if (fragP->fr_opcode[0] == 0x61)
-           /* BSR */
-           {
-             fragP->fr_opcode[0] = 0x4E;
-             fragP->fr_opcode[1] = (char) 0xB9; /* JBSR with ABSL LONG offset */
-
-             fix_new (fragP,
-                      fragP->fr_fix,
-                      4,
-                      fragP->fr_symbol,
-                      fragP->fr_offset,
-                      0,
-                      NO_RELOC);
-
-             fragP->fr_fix += 4;
-             ext = 0;
-           }
-         /* BRA */
-         else if (fragP->fr_opcode[0] == 0x60)
-           {
-             fragP->fr_opcode[0] = 0x4E;
-             fragP->fr_opcode[1] = (char) 0xF9; /* JMP  with ABSL LONG offset */
-             fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
-                      fragP->fr_offset, 0, NO_RELOC);
-             fragP->fr_fix += 4;
-             ext = 0;
-           }
-         else
-           {
-             /* This should never happen, because if it's a conditional
-                branch and we are on a 68000, BCC68000 should have been
-                picked instead of ABRANCH. */
-             abort ();
-           }
+         fragP->fr_opcode[0] = 0x4E;
+         fragP->fr_opcode[1] = (char) 0xB9; /* JSR with ABSL LONG operand */
+         fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol, fragP->fr_offset,
+                  0, RELAX_RELOC_ABS32);
+         fragP->fr_fix += 4;
+       }
+      else if (fragP->fr_opcode[0] == 0x60)    /* jbra */
+       {
+         fragP->fr_opcode[0] = 0x4E;
+         fragP->fr_opcode[1] = (char) 0xF9; /* JMP with ABSL LONG operand */
+         fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol, fragP->fr_offset,
+                  0, RELAX_RELOC_ABS32);
+         fragP->fr_fix += 4;

        }
       else
        {
        }
       else
        {

-         fragP->fr_opcode[1] = (char) 0xff;
-         ext = 4;
+         /* This cannot happen, because jbsr and jbra are the only two
+            unconditional branches.  */
+         abort ();

        }
       break;
        }
       break;

-    case TAB (BCC68000, LONG):
-      /* only Bcc 68000 instructions can come here */
-      /* change bcc into b!cc/jmp absl long */
+    case TAB (BRABSJCOND, LONG):
+      /* Only Bcc 68000 instructions can come here.  */
+      /* Change bcc into b!cc/jmp absl long.  */
+

       fragP->fr_opcode[0] ^= 0x01;     /* invert bcc */
       fragP->fr_opcode[1] = 0x6;/* branch offset = 6 */
 
       /* JF: these used to be fr_opcode[2,3], but they may be in a
           different frag, in which case refering to them is a no-no.
       fragP->fr_opcode[0] ^= 0x01;     /* invert bcc */
       fragP->fr_opcode[1] = 0x6;/* branch offset = 6 */
 
       /* JF: these used to be fr_opcode[2,3], but they may be in a
           different frag, in which case refering to them is a no-no.

-          Only fr_opcode[0,1] are guaranteed to work. */
+          Only fr_opcode[0,1] are guaranteed to work.  */

       *buffer_address++ = 0x4e;        /* put in jmp long (0x4ef9) */
       *buffer_address++ = (char) 0xf9;
       fragP->fr_fix += 2;      /* account for jmp instruction */
       fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
       *buffer_address++ = 0x4e;        /* put in jmp long (0x4ef9) */
       *buffer_address++ = (char) 0xf9;
       fragP->fr_fix += 2;      /* account for jmp instruction */
       fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,

-              fragP->fr_offset, 0, NO_RELOC);
+              fragP->fr_offset, 0, RELAX_RELOC_ABS32);
+      fragP->fr_fix += 4;
+      break;
+    case TAB (FBRANCH, SHORT):
+      know ((fragP->fr_opcode[1] & 0x40) == 0);
+      fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
+              1, RELAX_RELOC_PC16);
+      fragP->fr_fix += 2;
+      break;
+    case TAB (FBRANCH, LONG):
+      fragP->fr_opcode[1] |= 0x40;     /* Turn on LONG bit */
+      fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol, fragP->fr_offset,
+              1, RELAX_RELOC_PC32);

       fragP->fr_fix += 4;
       fragP->fr_fix += 4;

-      ext = 0;

       break;
       break;

-    case TAB (DBCC, LONG):
-      /* only DBcc 68000 instructions can come here */
-      /* change dbcc into dbcc/jmp absl long */
+    case TAB (DBCCLBR, SHORT):
+    case TAB (DBCCABSJ, SHORT):
+      fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
+              1, RELAX_RELOC_PC16);
+      fragP->fr_fix += 2;
+      break;
+    case TAB (DBCCLBR, LONG):
+      /* only DBcc instructions can come here */
+      /* Change dbcc into dbcc/bral.  */
+

       /* JF: these used to be fr_opcode[2-7], but that's wrong */
       *buffer_address++ = 0x00;        /* branch offset = 4 */
       *buffer_address++ = 0x04;
       *buffer_address++ = 0x60;        /* put in bra pc+6 */
       *buffer_address++ = 0x06;
       /* JF: these used to be fr_opcode[2-7], but that's wrong */
       *buffer_address++ = 0x00;        /* branch offset = 4 */
       *buffer_address++ = 0x04;
       *buffer_address++ = 0x60;        /* put in bra pc+6 */
       *buffer_address++ = 0x06;

-      *buffer_address++ = 0x4e;        /* put in jmp long (0x4ef9) */
-      *buffer_address++ = (char) 0xf9;
+      *buffer_address++ = 0x60;     /* Put in bral (0x60ff).  */
+      *buffer_address++ = (char) 0xff;

 
       fragP->fr_fix += 6;      /* account for bra/jmp instructions */
 
       fragP->fr_fix += 6;      /* account for bra/jmp instructions */

-      fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
-              fragP->fr_offset, 0, NO_RELOC);
+      fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol, fragP->fr_offset, 1,
+              RELAX_RELOC_PC32);

       fragP->fr_fix += 4;
       fragP->fr_fix += 4;

-      ext = 0;
-      break;
-    case TAB (FBRANCH, SHORT):
-      know ((fragP->fr_opcode[1] & 0x40) == 0);
-      ext = 2;

       break;
       break;

-    case TAB (FBRANCH, LONG):
-      fragP->fr_opcode[1] |= 0x40;     /* Turn on LONG bit */
-      ext = 4;
-      break;
-    case TAB (PCREL, SHORT):
-      ext = 2;
-      break;
-    case TAB (PCREL, LONG):
-      /* The thing to do here is force it to ABSOLUTE LONG, since
-       PCREL is really trying to shorten an ABSOLUTE address anyway */
-      /* JF FOO This code has not been tested */
-      fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol, fragP->fr_offset,
-              0, NO_RELOC);
-      if ((fragP->fr_opcode[1] & 0x3F) != 0x3A)
-       as_bad (_("Internal error (long PC-relative operand) for insn 0x%04x at 0x%lx"),
-               (unsigned) fragP->fr_opcode[0],
-               (unsigned long) fragP->fr_address);
-      fragP->fr_opcode[1] &= ~0x3F;
-      fragP->fr_opcode[1] |= 0x39;     /* Mode 7.1 */
+    case TAB (DBCCABSJ, LONG):
+      /* only DBcc instructions can come here */
+      /* Change dbcc into dbcc/jmp.  */
+
+      /* JF: these used to be fr_opcode[2-7], but that's wrong */
+      *buffer_address++ = 0x00;        /* branch offset = 4 */
+      *buffer_address++ = 0x04;
+      *buffer_address++ = 0x60;        /* put in bra pc+6 */
+      *buffer_address++ = 0x06;
+      *buffer_address++ = 0x4e;     /* Put in jmp long (0x4ef9).  */
+      *buffer_address++ = (char) 0xf9;
+
+      fragP->fr_fix += 6;      /* account for bra/jmp instructions */
+      fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol, fragP->fr_offset, 0,
+              RELAX_RELOC_ABS32);

       fragP->fr_fix += 4;
       fragP->fr_fix += 4;

-      ext = 0;

       break;
       break;

-    case TAB (PCLEA, SHORT):
-      fix_new (fragP, (int) (fragP->fr_fix), 2, fragP->fr_symbol,
-              fragP->fr_offset, 1, NO_RELOC);
+    case TAB (PCREL1632, SHORT):

       fragP->fr_opcode[1] &= ~0x3F;
       fragP->fr_opcode[1] |= 0x3A; /* 072 - mode 7.2 */
       fragP->fr_opcode[1] &= ~0x3F;
       fragP->fr_opcode[1] |= 0x3A; /* 072 - mode 7.2 */

-      ext = 2;
+      fix_new (fragP, (int) (fragP->fr_fix), 2, fragP->fr_symbol,
+              fragP->fr_offset, 1, RELAX_RELOC_PC16);
+      fragP->fr_fix += 2;

       break;
       break;

-    case TAB (PCLEA, LONG):
-      fixP = fix_new (fragP, (int) (fragP->fr_fix) + 2, 4, fragP->fr_symbol,
-                     fragP->fr_offset, 1, NO_RELOC);
-      fixP->fx_pcrel_adjust = 2;
+    case TAB (PCREL1632, LONG):

       /* Already set to mode 7.3; this indicates: PC indirect with
         suppressed index, 32-bit displacement.  */
       *buffer_address++ = 0x01;
       *buffer_address++ = 0x70;
       fragP->fr_fix += 2;
       /* Already set to mode 7.3; this indicates: PC indirect with
         suppressed index, 32-bit displacement.  */
       *buffer_address++ = 0x01;
       *buffer_address++ = 0x70;
       fragP->fr_fix += 2;

-      ext = 4;
+      fixP = fix_new (fragP, (int) (fragP->fr_fix), 4, fragP->fr_symbol,
+                     fragP->fr_offset, 1, RELAX_RELOC_PC32);
+      fixP->fx_pcrel_adjust = 2;
+      fragP->fr_fix += 4;

       break;
       break;

-

     case TAB (PCINDEX, BYTE):
     case TAB (PCINDEX, BYTE):

-      disp += 2;
-      if (!issbyte (disp))
-       {
-         as_bad (_("displacement doesn't fit in one byte"));
-         disp = 0;
-       }

       assert (fragP->fr_fix >= 2);
       buffer_address[-2] &= ~1;
       assert (fragP->fr_fix >= 2);
       buffer_address[-2] &= ~1;

-      buffer_address[-1] = disp;
-      ext = 0;
+      fixP = fix_new (fragP, fragP->fr_fix - 1, 1, fragP->fr_symbol,
+                     fragP->fr_offset, 1, RELAX_RELOC_PC8);
+      fixP->fx_pcrel_adjust = 1;

       break;
     case TAB (PCINDEX, SHORT):
       break;
     case TAB (PCINDEX, SHORT):

-      disp += 2;
-      assert (issword (disp));

       assert (fragP->fr_fix >= 2);
       buffer_address[-2] |= 0x1;
       buffer_address[-1] = 0x20;
       fixP = fix_new (fragP, (int) (fragP->fr_fix), 2, fragP->fr_symbol,
       assert (fragP->fr_fix >= 2);
       buffer_address[-2] |= 0x1;
       buffer_address[-1] = 0x20;
       fixP = fix_new (fragP, (int) (fragP->fr_fix), 2, fragP->fr_symbol,

-                     fragP->fr_offset, (fragP->fr_opcode[1] & 077) == 073,
-                     NO_RELOC);
+                     fragP->fr_offset, 1, RELAX_RELOC_PC16);

       fixP->fx_pcrel_adjust = 2;
       fixP->fx_pcrel_adjust = 2;

-      ext = 2;
+      fragP->fr_fix += 2;

       break;
     case TAB (PCINDEX, LONG):
       break;
     case TAB (PCINDEX, LONG):

-      disp += 2;
-      fixP = fix_new (fragP, (int) (fragP->fr_fix), 4, fragP->fr_symbol,
-                     fragP->fr_offset, (fragP->fr_opcode[1] & 077) == 073,
-                     NO_RELOC);
-      fixP->fx_pcrel_adjust = 2;

       assert (fragP->fr_fix >= 2);
       buffer_address[-2] |= 0x1;
       buffer_address[-1] = 0x30;
       assert (fragP->fr_fix >= 2);
       buffer_address[-2] |= 0x1;
       buffer_address[-1] = 0x30;

-      ext = 4;
+      fixP = fix_new (fragP, (int) (fragP->fr_fix), 4, fragP->fr_symbol,
+                     fragP->fr_offset, 1, RELAX_RELOC_PC32);
+      fixP->fx_pcrel_adjust = 2;
+      fragP->fr_fix += 4;
+      break;
+    case TAB (ABSTOPCREL, SHORT):
+      fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset,
+              1, RELAX_RELOC_PC16);
+      fragP->fr_fix += 2;
+      break;
+    case TAB (ABSTOPCREL, LONG):
+      /* The thing to do here is force it to ABSOLUTE LONG, since
+        ABSTOPCREL is really trying to shorten an ABSOLUTE address anyway */
+      if ((fragP->fr_opcode[1] & 0x3F) != 0x3A)
+       abort ();
+      fragP->fr_opcode[1] &= ~0x3F;
+      fragP->fr_opcode[1] |= 0x39;     /* Mode 7.1 */
+      fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol, fragP->fr_offset,
+              0, RELAX_RELOC_ABS32);
+      fragP->fr_fix += 4;

       break;
       break;

-    }
-
-  if (ext)
-    {
-      md_number_to_chars (buffer_address, (long) disp, (int) ext);
-      fragP->fr_fix += ext;

     }
 }
 
     }
 }
 


@@ -4514,256 +4565,127 @@ md_estimate_size_before_relax (fragP, segment)
      register fragS *fragP;
      segT segment;
 {
      register fragS *fragP;
      segT segment;
 {

-  int old_fix;
-  register char *buffer_address = fragP->fr_fix + fragP->fr_literal;
-
-  old_fix = fragP->fr_fix;
-
-  /* handle SZ_UNDEF first, it can be changed to BYTE or SHORT */
+  /* Handle SZ_UNDEF first, it can be changed to BYTE or SHORT.  */

   switch (fragP->fr_subtype)
     {
   switch (fragP->fr_subtype)
     {

-
-    case TAB (ABRANCH, SZ_UNDEF):
+    case TAB (BRANCHBWL, SZ_UNDEF):
+    case TAB (BRABSJUNC, SZ_UNDEF):
+    case TAB (BRABSJCOND, SZ_UNDEF):

       {
       {

-       if ((fragP->fr_symbol != NULL)  /* Not absolute */
-           && S_GET_SEGMENT (fragP->fr_symbol) == segment
+       if (S_GET_SEGMENT (fragP->fr_symbol) == segment

            && relaxable_symbol (fragP->fr_symbol))
          {
            fragP->fr_subtype = TAB (TABTYPE (fragP->fr_subtype), BYTE);
            && relaxable_symbol (fragP->fr_symbol))
          {
            fragP->fr_subtype = TAB (TABTYPE (fragP->fr_subtype), BYTE);

-           break;
-         }
-       else if ((fragP->fr_symbol != NULL) && flag_short_refs)
-         {                     /* Symbol is undefined and we want short ref */
-           fix_new (fragP, (int) (fragP->fr_fix), 2, fragP->fr_symbol,
-                    fragP->fr_offset, 1, NO_RELOC);
-           fragP->fr_fix += 2;
-           frag_wane (fragP);
-           break;
-         }
-       else if ((fragP->fr_symbol == 0) || !HAVE_LONG_BRANCH(current_architecture))
-         {
-           /* On 68000, or for absolute value, switch to abs long */
-           /* FIXME, we should check abs val, pick short or long */
-           if (fragP->fr_opcode[0] == 0x61)
-             {
-               fragP->fr_opcode[0] = 0x4E;
-               fragP->fr_opcode[1] = (char) 0xB9; /* JBSR with ABSL LONG offset */
-               fix_new (fragP, fragP->fr_fix, 4,
-                        fragP->fr_symbol, fragP->fr_offset, 0, NO_RELOC);
-               fragP->fr_fix += 4;
-               frag_wane (fragP);
-             }
-           else if (fragP->fr_opcode[0] == 0x60)
-             {
-               fragP->fr_opcode[0] = 0x4E;
-               fragP->fr_opcode[1] = (char) 0xF9; /* JMP  with ABSL LONG offset */
-               fix_new (fragP, fragP->fr_fix, 4,
-                        fragP->fr_symbol, fragP->fr_offset, 0, NO_RELOC);
-               fragP->fr_fix += 4;
-               frag_wane (fragP);
-             }
-           else
-             {
-               /* This should never happen, because if it's a conditional
-                  branch and we are on a 68000, BCC68000 should have been
-                  picked instead of ABRANCH. */
-               abort ();
-             }
-         }
-       else
-         {                     /* Symbol is still undefined.  Make it simple */
-           fix_new (fragP, (int) (fragP->fr_fix), 4, fragP->fr_symbol,
-                    fragP->fr_offset, 1, NO_RELOC);
-           fragP->fr_fix += 4;
-           fragP->fr_opcode[1] = (char) 0xff;
-           frag_wane (fragP);
-           break;
-         }
-
-       break;
-      }                                /* case TAB(ABRANCH,SZ_UNDEF) */
-
-    case TAB (FBRANCH, SZ_UNDEF):
-      {
-       if ((S_GET_SEGMENT (fragP->fr_symbol) == segment
-            && relaxable_symbol (fragP->fr_symbol))
-           || flag_short_refs)
-         {
-           fragP->fr_subtype = TAB (FBRANCH, SHORT);
-           fragP->fr_var += 2;
-         }
-       else
-         {
-           fix_new (fragP, (int) fragP->fr_fix, 4, fragP->fr_symbol,
-                    fragP->fr_offset, 1, NO_RELOC);
-           fragP->fr_fix += 4;
-           fragP->fr_opcode[1] |= 0x40; /* Turn on LONG bit */
-           frag_wane (fragP);
-         }
-       break;
-      }                                /* TAB(FBRANCH,SZ_UNDEF) */
-
-    case TAB (PCREL, SZ_UNDEF):
-      {
-       if ((S_GET_SEGMENT (fragP->fr_symbol) == segment
-            && relaxable_symbol (fragP->fr_symbol))
-           || flag_short_refs)
-         {
-           fragP->fr_subtype = TAB (PCREL, SHORT);
-           fragP->fr_var += 2;

          }
          }

-       else
+       else if (flag_short_refs)

          {
          {

-           fragP->fr_subtype = TAB (PCREL, LONG);
-           fragP->fr_var += 4;
-         }
-       break;
-      }                                /* TAB(PCREL,SZ_UNDEF) */
-
-    case TAB (BCC68000, SZ_UNDEF):
-      {
-       if ((fragP->fr_symbol != NULL)
-           && S_GET_SEGMENT (fragP->fr_symbol) == segment
-           && relaxable_symbol (fragP->fr_symbol))
-         {
-           fragP->fr_subtype = TAB (BCC68000, BYTE);
-           break;
-         }
-       /* only Bcc 68000 instructions can come here */
-       if ((fragP->fr_symbol != NULL) && flag_short_refs)
-         {
-           /* the user wants short refs, so emit one */
-           fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
-                    fragP->fr_offset, 1, NO_RELOC);
-           fragP->fr_fix += 2;
+           /* Symbol is undefined and we want short ref.  */
+           fragP->fr_subtype = TAB (TABTYPE (fragP->fr_subtype), SHORT);

          }
        else
          {
          }
        else
          {

-           /* change bcc into b!cc/jmp absl long */
-           fragP->fr_opcode[0] ^= 0x01;        /* invert bcc */
-           fragP->fr_opcode[1] = 0x06; /* branch offset = 6 */
-           /* JF: these were fr_opcode[2,3] */
-           buffer_address[0] = 0x4e;   /* put in jmp long (0x4ef9) */
-           buffer_address[1] = (char) 0xf9;
-           fragP->fr_fix += 2; /* account for jmp instruction */
-           fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
-                    fragP->fr_offset, 0, NO_RELOC);
-           fragP->fr_fix += 4;
+           /* Symbol is still undefined.  Make it LONG.  */
+           fragP->fr_subtype = TAB (TABTYPE (fragP->fr_subtype), LONG);

          }
          }

-       frag_wane (fragP);

        break;
        break;

-      }                                /* case TAB(BCC68000,SZ_UNDEF) */
+      }

 
 

-    case TAB (DBCC, SZ_UNDEF):
+    case TAB (BRANCHBW, SZ_UNDEF):

       {
       {

-       if (fragP->fr_symbol != NULL
-           && S_GET_SEGMENT (fragP->fr_symbol) == segment
+       if (S_GET_SEGMENT (fragP->fr_symbol) == segment

            && relaxable_symbol (fragP->fr_symbol))
          {
            && relaxable_symbol (fragP->fr_symbol))
          {

-           fragP->fr_subtype = TAB (DBCC, SHORT);
-           fragP->fr_var += 2;
-           break;
-         }
-       /* only DBcc 68000 instructions can come here */
-
-       if (fragP->fr_symbol != NULL && flag_short_refs)
-         {
-           /* the user wants short refs, so emit one */
-           fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
-                    fragP->fr_offset, 1, NO_RELOC);
-           fragP->fr_fix += 2;
+           fragP->fr_subtype = TAB (TABTYPE (fragP->fr_subtype), BYTE);

          }
        else
          {
          }
        else
          {

-           /* change dbcc into dbcc/jmp absl long */
-           /* JF: these used to be fr_opcode[2-4], which is wrong. */
-           buffer_address[0] = 0x00;   /* branch offset = 4 */
-           buffer_address[1] = 0x04;
-           buffer_address[2] = 0x60;   /* put in bra pc + ... */
-           /* JF: these were fr_opcode[5-7] */
-           buffer_address[3] = 0x06;   /* Plus 6 */
-           buffer_address[4] = 0x4e;   /* put in jmp long (0x4ef9) */
-           buffer_address[5] = (char) 0xf9;
-           fragP->fr_fix += 6; /* account for bra/jmp instruction */
-           fix_new (fragP, fragP->fr_fix, 4, fragP->fr_symbol,
-                    fragP->fr_offset, 0, NO_RELOC);
-           fragP->fr_fix += 4;
+           /* Symbol is undefined and we don't have long branches.  */
+           fragP->fr_subtype = TAB (TABTYPE (fragP->fr_subtype), SHORT);

          }
          }

-
-       frag_wane (fragP);

        break;
        break;

-      }                                /* case TAB(DBCC,SZ_UNDEF) */
+      }

 
 

-    case TAB (PCLEA, SZ_UNDEF):
+    case TAB (FBRANCH, SZ_UNDEF):
+    case TAB (DBCCLBR, SZ_UNDEF):
+    case TAB (DBCCABSJ, SZ_UNDEF):
+    case TAB (PCREL1632, SZ_UNDEF):

       {
       {

-       if (((S_GET_SEGMENT (fragP->fr_symbol)) == segment
+       if ((S_GET_SEGMENT (fragP->fr_symbol) == segment

             && relaxable_symbol (fragP->fr_symbol))
             && relaxable_symbol (fragP->fr_symbol))

-           || flag_short_refs
-           || cpu_of_arch (current_architecture) < m68020
-           || cpu_of_arch (current_architecture) == mcf5200)
+           || flag_short_refs)

          {
          {

-           fragP->fr_subtype = TAB (PCLEA, SHORT);
-           fragP->fr_var += 2;
+           fragP->fr_subtype = TAB (TABTYPE (fragP->fr_subtype), SHORT);

          }
        else
          {
          }
        else
          {

-           fragP->fr_subtype = TAB (PCLEA, LONG);
-           fragP->fr_var += 6;
+           fragP->fr_subtype = TAB (TABTYPE (fragP->fr_subtype), LONG);

          }
        break;
          }
        break;

-      }                                /* TAB(PCLEA,SZ_UNDEF) */
+      }

 
     case TAB (PCINDEX, SZ_UNDEF):
       if ((S_GET_SEGMENT (fragP->fr_symbol) == segment
 
     case TAB (PCINDEX, SZ_UNDEF):
       if ((S_GET_SEGMENT (fragP->fr_symbol) == segment

-          && relaxable_symbol (fragP->fr_symbol))
-         || cpu_of_arch (current_architecture) < m68020
-         || cpu_of_arch (current_architecture) == mcf5200)
+          && relaxable_symbol (fragP->fr_symbol)))

        {
          fragP->fr_subtype = TAB (PCINDEX, BYTE);
        }
       else
        {
          fragP->fr_subtype = TAB (PCINDEX, LONG);
        {
          fragP->fr_subtype = TAB (PCINDEX, BYTE);
        }
       else
        {
          fragP->fr_subtype = TAB (PCINDEX, LONG);

-         fragP->fr_var += 4;

        }
       break;
 
        }
       break;
 

+    case TAB (ABSTOPCREL, SZ_UNDEF):
+      {
+       if ((S_GET_SEGMENT (fragP->fr_symbol) == segment
+            && relaxable_symbol (fragP->fr_symbol)))
+         {
+           fragP->fr_subtype = TAB (ABSTOPCREL, SHORT);
+         }
+       else
+         {
+           fragP->fr_subtype = TAB (ABSTOPCREL, LONG);
+         }
+       break;
+      }
+

     default:
       break;
     }
 
     default:
       break;
     }
 

-  /* now that SZ_UNDEF are taken care of, check others */
+  /* Now that SZ_UNDEF are taken care of, check others.  */

   switch (fragP->fr_subtype)
     {
   switch (fragP->fr_subtype)
     {

-    case TAB (BCC68000, BYTE):
-    case TAB (ABRANCH, BYTE):
+    case TAB (BRANCHBWL, BYTE):
+    case TAB (BRABSJUNC, BYTE):
+    case TAB (BRABSJCOND, BYTE):
+    case TAB (BRANCHBW, BYTE):

       /* We can't do a short jump to the next instruction, so in that
       /* We can't do a short jump to the next instruction, so in that

-        case we force word mode.  At this point S_GET_VALUE should
-        return the offset of the symbol within its frag.  If the
-        symbol is at the start of a frag, and it is the next frag
-        with any data in it (usually this is just the next frag, but
-        assembler listings may introduce empty frags), we must use
-        word mode.  */
-      if (fragP->fr_symbol && S_GET_VALUE (fragP->fr_symbol) == 0)
+        case we force word mode.  If the symbol is at the start of a
+        frag, and it is the next frag with any data in it (usually
+        this is just the next frag, but assembler listings may
+        introduce empty frags), we must use word mode.  */
+      if (fragP->fr_symbol)

        {
        {

-         fragS *stop;
-         fragS *l;
+         fragS *sym_frag;

 
 

-         stop = symbol_get_frag (fragP->fr_symbol);
-         for (l = fragP->fr_next; l != stop; l = l->fr_next)
-           if (l->fr_fix + l->fr_var != 0)
-             break;
-         if (l == stop)
+         sym_frag = symbol_get_frag (fragP->fr_symbol);
+         if (S_GET_VALUE (fragP->fr_symbol) == sym_frag->fr_address)

            {
            {

-             fragP->fr_subtype = TAB (TABTYPE (fragP->fr_subtype), SHORT);
-             fragP->fr_var += 2;
+             fragS *l;
+
+             for (l = fragP->fr_next; l != sym_frag; l = l->fr_next)
+               if (l->fr_fix != 0)
+                 break;
+             if (l == sym_frag)
+               fragP->fr_subtype = TAB (TABTYPE (fragP->fr_subtype), SHORT);

            }
        }
       break;
     default:
       break;
     }
            }
        }
       break;
     default:
       break;
     }

-  return fragP->fr_var + fragP->fr_fix - old_fix;
+  return md_relax_table[fragP->fr_subtype].rlx_length;

 }
 
 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)
 }
 
 #if defined(OBJ_AOUT) | defined(OBJ_BOUT)


@@ -4776,7 +4698,7 @@ md_estimate_size_before_relax (fragP, segment)
    bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
    nibble as nuthin. (on Sun 3 at least) */
 /* Translate the internal relocation information into target-specific
    bit 7 as pcrel, bits 6 & 5 as length, bit 4 as pcrel, and the lower
    nibble as nuthin. (on Sun 3 at least) */
 /* Translate the internal relocation information into target-specific

-   format. */
+   format.  */

 #ifdef comment
 void
 md_ri_to_chars (the_bytes, ri)
 #ifdef comment
 void
 md_ri_to_chars (the_bytes, ri)


@@ -5058,7 +4980,7 @@ s_even (ignore)
 
   temp = 1;                    /* JF should be 2? */
   temp_fill = get_absolute_expression ();
 
   temp = 1;                    /* JF should be 2? */
   temp_fill = get_absolute_expression ();

-  if (!need_pass_2)            /* Never make frag if expect extra pass. */
+  if (!need_pass_2)            /* Never make frag if expect extra pass.  */

     frag_align (temp, (int) temp_fill, 0);
   demand_empty_rest_of_line ();
   record_alignment (now_seg, temp);
     frag_align (temp, (int) temp_fill, 0);
   demand_empty_rest_of_line ();
   record_alignment (now_seg, temp);


@@ -5428,7 +5350,7 @@ s_reg (ignore)
   SKIP_WHITESPACE ();
 
   s = input_line_pointer;
   SKIP_WHITESPACE ();
 
   s = input_line_pointer;

-  while (isalnum ((unsigned char) *input_line_pointer)
+  while (ISALNUM (*input_line_pointer)

 #ifdef REGISTER_PREFIX
         || *input_line_pointer == REGISTER_PREFIX
 #endif
 #ifdef REGISTER_PREFIX
         || *input_line_pointer == REGISTER_PREFIX
 #endif


@@ -5640,10 +5562,7 @@ mri_assemble (str)
 
   /* md_assemble expects the opcode to be in lower case.  */
   for (s = str; *s != ' ' && *s != '\0'; s++)
 
   /* md_assemble expects the opcode to be in lower case.  */
   for (s = str; *s != ' ' && *s != '\0'; s++)

-    {
-      if (isupper ((unsigned char) *s))
-       *s = tolower ((unsigned char) *s);
-    }
+    *s = TOLOWER (*s);

 
   md_assemble (str);
 }
 
   md_assemble (str);
 }


@@ -5725,10 +5644,8 @@ parse_mri_condition (pcc)
   ++input_line_pointer;
   SKIP_WHITESPACE ();
 
   ++input_line_pointer;
   SKIP_WHITESPACE ();
 

-  if (isupper (c1))
-    c1 = tolower (c1);
-  if (isupper (c2))
-    c2 = tolower (c2);
+  c1 = TOLOWER (c1);
+  c2 = TOLOWER (c2);

 
   *pcc = (c1 << 8) | c2;
 
 
   *pcc = (c1 << 8) | c2;
 


@@ -5786,11 +5703,17 @@ parse_mri_control_operand (pcc, leftstart, leftstop, rightstart, rightstop)
   /* Look ahead for AND or OR or end of line.  */
   for (s = input_line_pointer; *s != '\0'; ++s)
     {
   /* Look ahead for AND or OR or end of line.  */
   for (s = input_line_pointer; *s != '\0'; ++s)
     {

-      if ((strncasecmp (s, "AND", 3) == 0
-          && (s[3] == '.' || ! is_part_of_name (s[3])))
-         || (strncasecmp (s, "OR", 2) == 0
-             && (s[2] == '.' || ! is_part_of_name (s[2]))))
-       break;
+      /* We must make sure we don't misinterpret AND/OR at the end of labels!
+         if d0 <eq> #FOOAND and d1 <ne> #BAROR then
+                        ^^^                 ^^ */
+      if (    (    s == input_line_pointer
+                || *(s-1) == ' '
+                || *(s-1) == '\t')
+           && (    (    strncasecmp (s, "AND", 3) == 0
+                     && (s[3] == '.' || ! is_part_of_name (s[3])))
+                || (    strncasecmp (s, "OR", 2) == 0
+                     && (s[2] == '.' || ! is_part_of_name (s[2])))))
+             break;

     }
 
   *rightstart = input_line_pointer;
     }
 
   *rightstart = input_line_pointer;


@@ -5817,7 +5740,11 @@ swap_mri_condition (cc)
     {
     case MCC ('h', 'i'): return MCC ('c', 's');
     case MCC ('l', 's'): return MCC ('c', 'c');
     {
     case MCC ('h', 'i'): return MCC ('c', 's');
     case MCC ('l', 's'): return MCC ('c', 'c');

+    /* <HS> is an alias for <CC> */
+    case MCC ('h', 's'):

     case MCC ('c', 'c'): return MCC ('l', 's');
     case MCC ('c', 'c'): return MCC ('l', 's');

+    /* <LO> is an alias for <CS> */
+    case MCC ('l', 'o'):

     case MCC ('c', 's'): return MCC ('h', 'i');
     case MCC ('p', 'l'): return MCC ('m', 'i');
     case MCC ('m', 'i'): return MCC ('p', 'l');
     case MCC ('c', 's'): return MCC ('h', 'i');
     case MCC ('p', 'l'): return MCC ('m', 'i');
     case MCC ('m', 'i'): return MCC ('p', 'l');


@@ -5825,6 +5752,15 @@ swap_mri_condition (cc)
     case MCC ('l', 't'): return MCC ('g', 't');
     case MCC ('g', 't'): return MCC ('l', 't');
     case MCC ('l', 'e'): return MCC ('g', 'e');
     case MCC ('l', 't'): return MCC ('g', 't');
     case MCC ('g', 't'): return MCC ('l', 't');
     case MCC ('l', 'e'): return MCC ('g', 'e');

+    /* issue a warning for conditions we can not swap */
+    case MCC ('n', 'e'): return MCC ('n', 'e'); // no problem here
+    case MCC ('e', 'q'): return MCC ('e', 'q'); // also no problem
+    case MCC ('v', 'c'):
+    case MCC ('v', 's'):
+    default :
+          as_warn (_("Condition <%c%c> in structured control directive can not be encoded correctly"),
+                        (char) (cc >> 8), (char) (cc));
+      break;

     }
   return cc;
 }
     }
   return cc;
 }


@@ -5839,7 +5775,11 @@ reverse_mri_condition (cc)
     {
     case MCC ('h', 'i'): return MCC ('l', 's');
     case MCC ('l', 's'): return MCC ('h', 'i');
     {
     case MCC ('h', 'i'): return MCC ('l', 's');
     case MCC ('l', 's'): return MCC ('h', 'i');

+    /* <HS> is an alias for <CC> */
+    case MCC ('h', 's'): return MCC ('l', 'o');

     case MCC ('c', 'c'): return MCC ('c', 's');
     case MCC ('c', 'c'): return MCC ('c', 's');

+    /* <LO> is an alias for <CS> */
+    case MCC ('l', 'o'): return MCC ('h', 's');

     case MCC ('c', 's'): return MCC ('c', 'c');
     case MCC ('n', 'e'): return MCC ('e', 'q');
     case MCC ('e', 'q'): return MCC ('n', 'e');
     case MCC ('c', 's'): return MCC ('c', 'c');
     case MCC ('n', 'e'): return MCC ('e', 'q');
     case MCC ('e', 'q'): return MCC ('n', 'e');


@@ -5906,13 +5846,28 @@ build_mri_control_operand (qual, cc, leftstart, leftstop, rightstart,
        {
          char *temp;
 
        {
          char *temp;
 

-         cc = swap_mri_condition (cc);
+     /* Correct conditional handling:
+        if #1 <lt> d0 then  ;means if (1 < d0)
+           ...
+        endi
+
+        should assemble to:
+
+         cmp #1,d0        if we do *not* swap the operands
+         bgt true         we need the swapped condition!
+         ble false
+        true:
+         ...
+        false:
+     */

          temp = leftstart;
          leftstart = rightstart;
          rightstart = temp;
          temp = leftstop;
          leftstop = rightstop;
          rightstop = temp;
          temp = leftstart;
          leftstart = rightstart;
          rightstart = temp;
          temp = leftstop;
          leftstop = rightstop;
          rightstop = temp;

+       } else {
+         cc = swap_mri_condition (cc);

        }
     }
 
        }
     }
 


@@ -5921,7 +5876,7 @@ build_mri_control_operand (qual, cc, leftstart, leftstop, rightstart,
       cc = reverse_mri_condition (cc);
       truelab = falselab;
     }
       cc = reverse_mri_condition (cc);
       truelab = falselab;
     }

-      
+

   if (leftstart != NULL)
     {
       buf = (char *) xmalloc (20
   if (leftstart != NULL)
     {
       buf = (char *) xmalloc (20


@@ -5932,7 +5887,7 @@ build_mri_control_operand (qual, cc, leftstart, leftstop, rightstart,
       *s++ = 'm';
       *s++ = 'p';
       if (qual != '\0')
       *s++ = 'm';
       *s++ = 'p';
       if (qual != '\0')

-       *s++ = qual;
+       *s++ = TOLOWER (qual);

       *s++ = ' ';
       memcpy (s, leftstart, leftstop - leftstart);
       s += leftstop - leftstart;
       *s++ = ' ';
       memcpy (s, leftstart, leftstop - leftstart);
       s += leftstop - leftstart;


@@ -5943,14 +5898,14 @@ build_mri_control_operand (qual, cc, leftstart, leftstop, rightstart,
       mri_assemble (buf);
       free (buf);
     }
       mri_assemble (buf);
       free (buf);
     }

-      
+

   buf = (char *) xmalloc (20 + strlen (truelab));
   s = buf;
   *s++ = 'b';
   *s++ = cc >> 8;
   *s++ = cc & 0xff;
   if (extent != '\0')
   buf = (char *) xmalloc (20 + strlen (truelab));
   s = buf;
   *s++ = 'b';
   *s++ = cc >> 8;
   *s++ = cc & 0xff;
   if (extent != '\0')

-    *s++ = extent;
+    *s++ = TOLOWER (extent);

   *s++ = ' ';
   strcpy (s, truelab);
   mri_assemble (buf);
   *s++ = ' ';
   strcpy (s, truelab);
   mri_assemble (buf);


@@ -6085,8 +6040,17 @@ s_mri_if (qual)
   /* A structured control directive must end with THEN with an
      optional qualifier.  */
   s = input_line_pointer;
   /* A structured control directive must end with THEN with an
      optional qualifier.  */
   s = input_line_pointer;

-  while (! is_end_of_line[(unsigned char) *s]
-        && (! flag_mri || *s != '*'))
+  /* We only accept '*' as introduction of comments if preceded by white space
+     or at first column of a line (I think this can't actually happen here?)
+     This is important when assembling:
+       if d0 <ne> 12(a0,d0*2) then
+       if d0 <ne> #CONST*20   then */
+  while ( ! (    is_end_of_line[(unsigned char) *s]
+              || (     flag_mri
+                   && *s == '*'
+                   && (    s == input_line_pointer
+                        || *(s-1) == ' '
+                        || *(s-1) == '\t'))))

     ++s;
   --s;
   while (s > input_line_pointer && (*s == ' ' || *s == '\t'))
     ++s;
   --s;
   while (s > input_line_pointer && (*s == ' ' || *s == '\t'))


@@ -6191,7 +6155,7 @@ s_mri_else (qual)
   mri_control_stack->else_seen = 1;
 
   buf = (char *) xmalloc (20 + strlen (mri_control_stack->bottom));
   mri_control_stack->else_seen = 1;
 
   buf = (char *) xmalloc (20 + strlen (mri_control_stack->bottom));

-  q[0] = qual;
+  q[0] = TOLOWER (qual);

   q[1] = '\0';
   sprintf (buf, "bra%s %s", q, mri_control_stack->bottom);
   mri_assemble (buf);
   q[1] = '\0';
   sprintf (buf, "bra%s %s", q, mri_control_stack->bottom);
   mri_assemble (buf);


@@ -6264,7 +6228,7 @@ s_mri_break (extent)
     }
 
   buf = (char *) xmalloc (20 + strlen (n->bottom));
     }
 
   buf = (char *) xmalloc (20 + strlen (n->bottom));

-  ex[0] = extent;
+  ex[0] = TOLOWER (extent);

   ex[1] = '\0';
   sprintf (buf, "bra%s %s", ex, n->bottom);
   mri_assemble (buf);
   ex[1] = '\0';
   sprintf (buf, "bra%s %s", ex, n->bottom);
   mri_assemble (buf);


@@ -6303,7 +6267,7 @@ s_mri_next (extent)
     }
 
   buf = (char *) xmalloc (20 + strlen (n->next));
     }
 
   buf = (char *) xmalloc (20 + strlen (n->next));

-  ex[0] = extent;
+  ex[0] = TOLOWER (extent);

   ex[1] = '\0';
   sprintf (buf, "bra%s %s", ex, n->next);
   mri_assemble (buf);
   ex[1] = '\0';
   sprintf (buf, "bra%s %s", ex, n->next);
   mri_assemble (buf);


@@ -6487,7 +6451,7 @@ s_mri_for (qual)
   *s++ = 'v';
   *s++ = 'e';
   if (qual != '\0')
   *s++ = 'v';
   *s++ = 'e';
   if (qual != '\0')

-    *s++ = qual;
+    *s++ = TOLOWER (qual);

   *s++ = ' ';
   memcpy (s, initstart, initstop - initstart);
   s += initstop - initstart;
   *s++ = ' ';
   memcpy (s, initstart, initstop - initstart);
   s += initstop - initstart;


@@ -6505,7 +6469,7 @@ s_mri_for (qual)
   *s++ = 'm';
   *s++ = 'p';
   if (qual != '\0')
   *s++ = 'm';
   *s++ = 'p';
   if (qual != '\0')

-    *s++ = qual;
+    *s++ = TOLOWER (qual);

   *s++ = ' ';
   memcpy (s, endstart, endstop - endstart);
   s += endstop - endstart;
   *s++ = ' ';
   memcpy (s, endstart, endstop - endstart);
   s += endstop - endstart;


@@ -6516,7 +6480,7 @@ s_mri_for (qual)
   mri_assemble (buf);
 
   /* bcc bottom */
   mri_assemble (buf);
 
   /* bcc bottom */

-  ex[0] = extent;
+  ex[0] = TOLOWER (extent);

   ex[1] = '\0';
   if (up)
     sprintf (buf, "blt%s %s", ex, n->bottom);
   ex[1] = '\0';
   if (up)
     sprintf (buf, "blt%s %s", ex, n->bottom);


@@ -6532,7 +6496,7 @@ s_mri_for (qual)
     strcpy (s, "sub");
   s += 3;
   if (qual != '\0')
     strcpy (s, "sub");
   s += 3;
   if (qual != '\0')

-    *s++ = qual;
+    *s++ = TOLOWER (qual);

   *s++ = ' ';
   memcpy (s, bystart, bystop - bystart);
   s += bystop - bystart;
   *s++ = ' ';
   memcpy (s, bystart, bystop - bystart);
   s += bystop - bystart;


@@ -6655,8 +6619,17 @@ s_mri_while (qual)
   struct mri_control_info *n;
 
   s = input_line_pointer;
   struct mri_control_info *n;
 
   s = input_line_pointer;

-  while (! is_end_of_line[(unsigned char) *s]
-        && (! flag_mri || *s != '*'))
+  /* We only accept '*' as introduction of comments if preceded by white space
+     or at first column of a line (I think this can't actually happen here?)
+     This is important when assembling:
+       while d0 <ne> 12(a0,d0*2) do
+       while d0 <ne> #CONST*20   do */
+  while ( ! (    is_end_of_line[(unsigned char) *s]
+              || (     flag_mri
+                   && *s == '*'
+                   && (    s == input_line_pointer
+                        || *(s-1) == ' '
+                        || *(s-1) == '\t'))))

     s++;
   --s;
   while (*s == ' ' || *s == '\t')
     s++;
   --s;
   while (*s == ' ' || *s == '\t')


@@ -6745,6 +6718,7 @@ s_mri_endw (ignore)
  *
  *     -pic    Indicates PIC.
  *     -k      Indicates PIC.  (Sun 3 only.)
  *
  *     -pic    Indicates PIC.
  *     -k      Indicates PIC.  (Sun 3 only.)

+ *      --pcrel Never turn PC-relative branches into absolute jumps.

  *
  *     --bitwise-or
  *             Permit `|' to be used in expressions.
  *
  *     --bitwise-or
  *             Permit `|' to be used in expressions.


@@ -6773,9 +6747,11 @@ struct option md_longopts[] = {
   {"disp-size-default-16", no_argument, NULL, OPTION_DISP_SIZE_DEFAULT_16},
 #define OPTION_DISP_SIZE_DEFAULT_32 (OPTION_MD_BASE + 6)
   {"disp-size-default-32", no_argument, NULL, OPTION_DISP_SIZE_DEFAULT_32},
   {"disp-size-default-16", no_argument, NULL, OPTION_DISP_SIZE_DEFAULT_16},
 #define OPTION_DISP_SIZE_DEFAULT_32 (OPTION_MD_BASE + 6)
   {"disp-size-default-32", no_argument, NULL, OPTION_DISP_SIZE_DEFAULT_32},

+#define OPTION_PCREL (OPTION_MD_BASE + 7)
+  {"pcrel", no_argument, NULL, OPTION_PCREL},

   {NULL, no_argument, NULL, 0}
 };
   {NULL, no_argument, NULL, 0}
 };

-size_t md_longopts_size = sizeof(md_longopts);
+size_t md_longopts_size = sizeof (md_longopts);

 
 int
 md_parse_option (c, arg)
 
 int
 md_parse_option (c, arg)


@@ -6794,6 +6770,11 @@ md_parse_option (c, arg)
       flag_long_jumps = 1;
       break;
 
       flag_long_jumps = 1;
       break;
 

+    case OPTION_PCREL:         /* --pcrel means never turn PC-relative
+                                  branches into absolute jumps.  */
+      flag_keep_pcrel = 1;
+      break;
+

     case 'A':
       if (*arg == 'm')
        arg++;
     case 'A':
       if (*arg == 'm')
        arg++;


@@ -6934,22 +6915,23 @@ void
 md_show_usage (stream)
      FILE *stream;
 {
 md_show_usage (stream)
      FILE *stream;
 {

-  fprintf(stream, _("\
+  fprintf (stream, _("\

 680X0 options:\n\
 -l                     use 1 word for refs to undefined symbols [default 2]\n\
 680X0 options:\n\
 -l                     use 1 word for refs to undefined symbols [default 2]\n\

--m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060\n\
- | -m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -m68360\n\
- | -mcpu32 | -m5200\n\
+-m68000 | -m68008 | -m68010 | -m68020 | -m68030 | -m68040 | -m68060 |\n\
+-m68302 | -m68331 | -m68332 | -m68333 | -m68340 | -m68360 | -mcpu32 |\n\
+-m5200  | -m5202  | -m5204  | -m5206  | -m5206e | -m5307  | -m5407\n\

                        specify variant of 680X0 architecture [default 68020]\n\
 -m68881 | -m68882 | -mno-68881 | -mno-68882\n\
                        target has/lacks floating-point coprocessor\n\
                        [default yes for 68020, 68030, and cpu32]\n"));
                        specify variant of 680X0 architecture [default 68020]\n\
 -m68881 | -m68882 | -mno-68881 | -mno-68882\n\
                        target has/lacks floating-point coprocessor\n\
                        [default yes for 68020, 68030, and cpu32]\n"));

-  fprintf(stream, _("\
+  fprintf (stream, _("\

 -m68851 | -mno-68851\n\
                        target has/lacks memory-management unit coprocessor\n\
                        [default yes for 68020 and up]\n\
 -pic, -k               generate position independent code\n\
 -S                     turn jbsr into jsr\n\
 -m68851 | -mno-68851\n\
                        target has/lacks memory-management unit coprocessor\n\
                        [default yes for 68020 and up]\n\
 -pic, -k               generate position independent code\n\
 -S                     turn jbsr into jsr\n\

+--pcrel                 never turn PC-relative branches into absolute jumps\n\

 --register-prefix-optional\n\
                        recognize register names without prefix character\n\
 --bitwise-or           do not treat `|' as a comment character\n"));
 --register-prefix-optional\n\
                        recognize register names without prefix character\n\
 --bitwise-or           do not treat `|' as a comment character\n"));


@@ -7052,7 +7034,6 @@ is_label (str)
 
 /* We have no need to default values of symbols.  */
 
 
 /* We have no need to default values of symbols.  */
 

-/* ARGSUSED */

 symbolS *
 md_undefined_symbol (name)
      char *name ATTRIBUTE_UNUSED;
 symbolS *
 md_undefined_symbol (name)
      char *name ATTRIBUTE_UNUSED;


@@ -7086,16 +7067,16 @@ md_section_align (segment, size)
 /* Exactly what point is a PC-relative offset relative TO?
    On the 68k, it is relative to the address of the first extension
    word.  The difference between the addresses of the offset and the
 /* Exactly what point is a PC-relative offset relative TO?
    On the 68k, it is relative to the address of the first extension
    word.  The difference between the addresses of the offset and the

-   first extension word is stored in fx_pcrel_adjust. */
+   first extension word is stored in fx_pcrel_adjust.  */

 long
 md_pcrel_from (fixP)
      fixS *fixP;
 {
   int adjust;
 
 long
 md_pcrel_from (fixP)
      fixS *fixP;
 {
   int adjust;
 

-  /* Because fx_pcrel_adjust is a char, and may be unsigned, we store
-     -1 as 64.  */
-  adjust = fixP->fx_pcrel_adjust;
+  /* Because fx_pcrel_adjust is a char, and may be unsigned, we explicitly
+     sign extend the value here.  */
+  adjust = ((fixP->fx_pcrel_adjust & 0xff) ^ 0x80) - 0x80;

   if (adjust == 64)
     adjust = -1;
   return fixP->fx_where + fixP->fx_frag->fr_address - adjust;
   if (adjust == 64)
     adjust = -1;
   return fixP->fx_where + fixP->fx_frag->fr_address - adjust;


@@ -7104,7 +7085,6 @@ md_pcrel_from (fixP)
 #ifndef BFD_ASSEMBLER
 #ifdef OBJ_COFF
 
 #ifndef BFD_ASSEMBLER
 #ifdef OBJ_COFF
 

-/*ARGSUSED*/

 void
 tc_coff_symbol_emit_hook (ignore)
      symbolS *ignore ATTRIBUTE_UNUSED;
 void
 tc_coff_symbol_emit_hook (ignore)
      symbolS *ignore ATTRIBUTE_UNUSED;


@@ -7139,4 +7119,3 @@ void m68k_elf_final_processing()
      elf_elfheader (stdoutput)->e_flags |= EF_CPU32;
 }
 #endif
      elf_elfheader (stdoutput)->e_flags |= EF_CPU32;
 }
 #endif

-/* end of tc-m68k.c */