- /* MIPS1 ISA */
- { "MIPS1", 1, ISA_MIPS1, CPU_R3000, },
- { "mips", 1, ISA_MIPS1, CPU_R3000, },
-
- /* MIPS2 ISA */
- { "MIPS2", 1, ISA_MIPS2, CPU_R6000, },
-
- /* MIPS3 ISA */
- { "MIPS3", 1, ISA_MIPS3, CPU_R4000, },
-
- /* MIPS4 ISA */
- { "MIPS4", 1, ISA_MIPS4, CPU_R8000, },
-
- /* MIPS5 ISA */
- { "MIPS5", 1, ISA_MIPS5, CPU_MIPS5, },
- { "Generic-MIPS5", 0, ISA_MIPS5, CPU_MIPS5, },
-
- /* MIPS32 ISA */
- { "MIPS32", 1, ISA_MIPS32, CPU_MIPS32, },
- { "mipsisa32", 0, ISA_MIPS32, CPU_MIPS32, },
- { "Generic-MIPS32", 0, ISA_MIPS32, CPU_MIPS32, },
- { "4kc", 0, ISA_MIPS32, CPU_MIPS32, },
- { "4km", 0, ISA_MIPS32, CPU_MIPS32, },
- { "4kp", 0, ISA_MIPS32, CPU_MIPS32, },
-
- /* For historical reasons. */
- { "MIPS64", 1, ISA_MIPS3, CPU_R4000, },
-
- /* MIPS64 ISA */
- { "mipsisa64", 1, ISA_MIPS64, CPU_MIPS64, },
- { "Generic-MIPS64", 0, ISA_MIPS64, CPU_MIPS64, },
- { "5kc", 0, ISA_MIPS64, CPU_MIPS64, },
- { "20kc", 0, ISA_MIPS64, CPU_MIPS64, },
-
- /* R2000 CPU */
- { "R2000", 0, ISA_MIPS1, CPU_R2000, },
- { "2000", 0, ISA_MIPS1, CPU_R2000, },
- { "2k", 0, ISA_MIPS1, CPU_R2000, },
- { "r2k", 0, ISA_MIPS1, CPU_R2000, },
-
- /* R3000 CPU */
- { "R3000", 0, ISA_MIPS1, CPU_R3000, },
- { "3000", 0, ISA_MIPS1, CPU_R3000, },
- { "3k", 0, ISA_MIPS1, CPU_R3000, },
- { "r3k", 0, ISA_MIPS1, CPU_R3000, },
-
- /* TX3900 CPU */
- { "R3900", 0, ISA_MIPS1, CPU_R3900, },
- { "3900", 0, ISA_MIPS1, CPU_R3900, },
- { "mipstx39", 0, ISA_MIPS1, CPU_R3900, },
-
- /* R4000 CPU */
- { "R4000", 0, ISA_MIPS3, CPU_R4000, },
- { "4000", 0, ISA_MIPS3, CPU_R4000, },
- { "4k", 0, ISA_MIPS3, CPU_R4000, }, /* beware */
- { "r4k", 0, ISA_MIPS3, CPU_R4000, },
-
- /* R4010 CPU */
- { "R4010", 0, ISA_MIPS2, CPU_R4010, },
- { "4010", 0, ISA_MIPS2, CPU_R4010, },
-
- /* R4400 CPU */
- { "R4400", 0, ISA_MIPS3, CPU_R4400, },
- { "4400", 0, ISA_MIPS3, CPU_R4400, },
-
- /* R4600 CPU */
- { "R4600", 0, ISA_MIPS3, CPU_R4600, },
- { "4600", 0, ISA_MIPS3, CPU_R4600, },
- { "mips64orion", 0, ISA_MIPS3, CPU_R4600, },
- { "orion", 0, ISA_MIPS3, CPU_R4600, },
-
- /* R4650 CPU */
- { "R4650", 0, ISA_MIPS3, CPU_R4650, },
- { "4650", 0, ISA_MIPS3, CPU_R4650, },
-
- /* R6000 CPU */
- { "R6000", 0, ISA_MIPS2, CPU_R6000, },
- { "6000", 0, ISA_MIPS2, CPU_R6000, },
- { "6k", 0, ISA_MIPS2, CPU_R6000, },
- { "r6k", 0, ISA_MIPS2, CPU_R6000, },
-
- /* R8000 CPU */
- { "R8000", 0, ISA_MIPS4, CPU_R8000, },
- { "8000", 0, ISA_MIPS4, CPU_R8000, },
- { "8k", 0, ISA_MIPS4, CPU_R8000, },
- { "r8k", 0, ISA_MIPS4, CPU_R8000, },
-
- /* R10000 CPU */
- { "R10000", 0, ISA_MIPS4, CPU_R10000, },
- { "10000", 0, ISA_MIPS4, CPU_R10000, },
- { "10k", 0, ISA_MIPS4, CPU_R10000, },
- { "r10k", 0, ISA_MIPS4, CPU_R10000, },
-
- /* R12000 CPU */
- { "R12000", 0, ISA_MIPS4, CPU_R12000, },
- { "12000", 0, ISA_MIPS4, CPU_R12000, },
- { "12k", 0, ISA_MIPS4, CPU_R12000, },
- { "r12k", 0, ISA_MIPS4, CPU_R12000, },
-
- /* VR4100 CPU */
- { "VR4100", 0, ISA_MIPS3, CPU_VR4100, },
- { "4100", 0, ISA_MIPS3, CPU_VR4100, },
- { "mips64vr4100", 0, ISA_MIPS3, CPU_VR4100, },
- { "r4100", 0, ISA_MIPS3, CPU_VR4100, },
-
- /* VR4111 CPU */
- { "VR4111", 0, ISA_MIPS3, CPU_R4111, },
- { "4111", 0, ISA_MIPS3, CPU_R4111, },
- { "mips64vr4111", 0, ISA_MIPS3, CPU_R4111, },
- { "r4111", 0, ISA_MIPS3, CPU_R4111, },
-
- /* VR4300 CPU */
- { "VR4300", 0, ISA_MIPS3, CPU_R4300, },
- { "4300", 0, ISA_MIPS3, CPU_R4300, },
- { "mips64vr4300", 0, ISA_MIPS3, CPU_R4300, },
- { "r4300", 0, ISA_MIPS3, CPU_R4300, },
-
- /* VR5000 CPU */
- { "VR5000", 0, ISA_MIPS4, CPU_R5000, },
- { "5000", 0, ISA_MIPS4, CPU_R5000, },
- { "5k", 0, ISA_MIPS4, CPU_R5000, },
- { "mips64vr5000", 0, ISA_MIPS4, CPU_R5000, },
- { "r5000", 0, ISA_MIPS4, CPU_R5000, },
- { "r5200", 0, ISA_MIPS4, CPU_R5000, },
- { "rm5200", 0, ISA_MIPS4, CPU_R5000, },
- { "r5230", 0, ISA_MIPS4, CPU_R5000, },
- { "rm5230", 0, ISA_MIPS4, CPU_R5000, },
- { "r5231", 0, ISA_MIPS4, CPU_R5000, },
- { "rm5231", 0, ISA_MIPS4, CPU_R5000, },
- { "r5261", 0, ISA_MIPS4, CPU_R5000, },
- { "rm5261", 0, ISA_MIPS4, CPU_R5000, },
- { "r5721", 0, ISA_MIPS4, CPU_R5000, },
- { "rm5721", 0, ISA_MIPS4, CPU_R5000, },
- { "r5k", 0, ISA_MIPS4, CPU_R5000, },
- { "r7000", 0, ISA_MIPS4, CPU_R5000, },
-
- /* Broadcom SB-1 CPU */
- { "SB-1", 0, ISA_MIPS64, CPU_SB1, },
- { "sb-1250", 0, ISA_MIPS64, CPU_SB1, },
- { "sb1", 0, ISA_MIPS64, CPU_SB1, },
- { "sb1250", 0, ISA_MIPS64, CPU_SB1, },
-
- /* End marker. */
- { NULL, 0, 0, 0, },
+ /* Entries for generic ISAs */
+ { "mips1", 1, ISA_MIPS1, CPU_R3000 },
+ { "mips2", 1, ISA_MIPS2, CPU_R6000 },
+ { "mips3", 1, ISA_MIPS3, CPU_R4000 },
+ { "mips4", 1, ISA_MIPS4, CPU_R8000 },
+ { "mips5", 1, ISA_MIPS5, CPU_MIPS5 },
+ { "mips32", 1, ISA_MIPS32, CPU_MIPS32 },
+ { "mips32r2", 1, ISA_MIPS32R2, CPU_MIPS32R2 },
+ { "mips64", 1, ISA_MIPS64, CPU_MIPS64 },
+
+ /* MIPS I */
+ { "r3000", 0, ISA_MIPS1, CPU_R3000 },
+ { "r2000", 0, ISA_MIPS1, CPU_R3000 },
+ { "r3900", 0, ISA_MIPS1, CPU_R3900 },
+
+ /* MIPS II */
+ { "r6000", 0, ISA_MIPS2, CPU_R6000 },
+
+ /* MIPS III */
+ { "r4000", 0, ISA_MIPS3, CPU_R4000 },
+ { "r4010", 0, ISA_MIPS2, CPU_R4010 },
+ { "vr4100", 0, ISA_MIPS3, CPU_VR4100 },
+ { "vr4111", 0, ISA_MIPS3, CPU_R4111 },
+ { "vr4120", 0, ISA_MIPS3, CPU_VR4120 },
+ { "vr4130", 0, ISA_MIPS3, CPU_VR4120 },
+ { "vr4181", 0, ISA_MIPS3, CPU_R4111 },
+ { "vr4300", 0, ISA_MIPS3, CPU_R4300 },
+ { "r4400", 0, ISA_MIPS3, CPU_R4400 },
+ { "r4600", 0, ISA_MIPS3, CPU_R4600 },
+ { "orion", 0, ISA_MIPS3, CPU_R4600 },
+ { "r4650", 0, ISA_MIPS3, CPU_R4650 },
+
+ /* MIPS IV */
+ { "r8000", 0, ISA_MIPS4, CPU_R8000 },
+ { "r10000", 0, ISA_MIPS4, CPU_R10000 },
+ { "r12000", 0, ISA_MIPS4, CPU_R12000 },
+ { "vr5000", 0, ISA_MIPS4, CPU_R5000 },
+ { "vr5400", 0, ISA_MIPS4, CPU_VR5400 },
+ { "vr5500", 0, ISA_MIPS4, CPU_VR5500 },
+ { "rm5200", 0, ISA_MIPS4, CPU_R5000 },
+ { "rm5230", 0, ISA_MIPS4, CPU_R5000 },
+ { "rm5231", 0, ISA_MIPS4, CPU_R5000 },
+ { "rm5261", 0, ISA_MIPS4, CPU_R5000 },
+ { "rm5721", 0, ISA_MIPS4, CPU_R5000 },
+ { "rm7000", 0, ISA_MIPS4, CPU_RM7000 },
+ { "rm9000", 0, ISA_MIPS4, CPU_RM7000 },
+
+ /* MIPS 32 */
+ { "4kc", 0, ISA_MIPS32, CPU_MIPS32 },
+ { "4km", 0, ISA_MIPS32, CPU_MIPS32 },
+ { "4kp", 0, ISA_MIPS32, CPU_MIPS32 },
+
+ /* MIPS 64 */
+ { "5kc", 0, ISA_MIPS64, CPU_MIPS64 },
+ { "20kc", 0, ISA_MIPS64, CPU_MIPS64 },
+
+ /* Broadcom SB-1 CPU core */
+ { "sb1", 0, ISA_MIPS64, CPU_SB1 },
+
+ /* End marker */
+ { NULL, 0, 0, 0 }