+ { "asid", 23, PROCESSOR_NOT_V850 },
+ { "bpam", 25, PROCESSOR_NOT_V850 },
+ { "bpav", 24, PROCESSOR_NOT_V850 },
+ { "bpc", 22, PROCESSOR_NOT_V850 },
+ { "bpdm", 27, PROCESSOR_NOT_V850 },
+ { "bpdv", 26, PROCESSOR_NOT_V850 },
+ { "bsel", 31, PROCESSOR_V850E2_UP },
+ { "cfg", 7, PROCESSOR_V850E2V3_UP },
+ { "ctbp", 20, PROCESSOR_NOT_V850 },
+ { "ctpc", 16, PROCESSOR_NOT_V850 },
+ { "ctpsw", 17, PROCESSOR_NOT_V850 },
+ { "dbic", 15, PROCESSOR_V850E2_UP },
+ { "dbpc", 18, PROCESSOR_NOT_V850 },
+ { "dbpsw", 19, PROCESSOR_NOT_V850 },
+ { "dbwr", 30, PROCESSOR_V850E2_UP },
+ { "dir", 21, PROCESSOR_NOT_V850 },
+ { "dpa0l", 16, PROCESSOR_V850E2V3_UP },
+ { "dpa0u", 17, PROCESSOR_V850E2V3_UP },
+ { "dpa1l", 18, PROCESSOR_V850E2V3_UP },
+ { "dpa1u", 19, PROCESSOR_V850E2V3_UP },
+ { "dpa2l", 20, PROCESSOR_V850E2V3_UP },
+ { "dpa2u", 21, PROCESSOR_V850E2V3_UP },
+ { "dpa3l", 22, PROCESSOR_V850E2V3_UP },
+ { "dpa3u", 23, PROCESSOR_V850E2V3_UP },
+ { "dpa4l", 24, PROCESSOR_V850E2V3_UP },
+ { "dpa4u", 25, PROCESSOR_V850E2V3_UP },
+ { "dpa5l", 26, PROCESSOR_V850E2V3_UP },
+ { "dpa5u", 27, PROCESSOR_V850E2V3_UP },
+ { "ecr", 4, PROCESSOR_ALL },
+ { "eh_base", 3, PROCESSOR_V850E2V3_UP },
+ { "eh_cfg", 1, PROCESSOR_V850E2V3_UP },
+ { "eh_reset", 2, PROCESSOR_V850E2V3_UP },
+ { "eiic", 13, PROCESSOR_V850E2_UP },
+ { "eipc", 0, PROCESSOR_ALL },
+ { "eipsw", 1, PROCESSOR_ALL },
+ { "eiwr", 28, PROCESSOR_V850E2_UP },
+ { "feic", 14, PROCESSOR_V850E2_UP },
+ { "fepc", 2, PROCESSOR_ALL },
+ { "fepsw", 3, PROCESSOR_ALL },
+ { "fewr", 29, PROCESSOR_V850E2_UP },
+ { "fpcc", 9, PROCESSOR_V850E2V3_UP },
+ { "fpcfg", 10, PROCESSOR_V850E2V3_UP },
+ { "fpec", 11, PROCESSOR_V850E2V3_UP },
+ { "fpepc", 7, PROCESSOR_V850E2V3_UP },
+ { "fpspc", 27, PROCESSOR_V850E2V3_UP },
+ { "fpsr", 6, PROCESSOR_V850E2V3_UP },
+ { "fpst", 8, PROCESSOR_V850E2V3_UP },
+ { "ipa0l", 6, PROCESSOR_V850E2V3_UP },
+ { "ipa0u", 7, PROCESSOR_V850E2V3_UP },
+ { "ipa1l", 8, PROCESSOR_V850E2V3_UP },
+ { "ipa1u", 9, PROCESSOR_V850E2V3_UP },
+ { "ipa2l", 10, PROCESSOR_V850E2V3_UP },
+ { "ipa2u", 11, PROCESSOR_V850E2V3_UP },
+ { "ipa3l", 12, PROCESSOR_V850E2V3_UP },
+ { "ipa3u", 13, PROCESSOR_V850E2V3_UP },
+ { "ipa4l", 14, PROCESSOR_V850E2V3_UP },
+ { "ipa4u", 15, PROCESSOR_V850E2V3_UP },
+ { "mca", 24, PROCESSOR_V850E2V3_UP },
+ { "mcc", 26, PROCESSOR_V850E2V3_UP },
+ { "mcr", 27, PROCESSOR_V850E2V3_UP },
+ { "mcs", 25, PROCESSOR_V850E2V3_UP },
+ { "mpc", 1, PROCESSOR_V850E2V3_UP },
+ { "mpm", 0, PROCESSOR_V850E2V3_UP },
+ { "mpu10_dpa0l", 16, PROCESSOR_V850E2V3_UP },
+ { "mpu10_dpa0u", 17, PROCESSOR_V850E2V3_UP },
+ { "mpu10_dpa1l", 18, PROCESSOR_V850E2V3_UP },
+ { "mpu10_dpa1u", 19, PROCESSOR_V850E2V3_UP },
+ { "mpu10_dpa2l", 20, PROCESSOR_V850E2V3_UP },
+ { "mpu10_dpa2u", 21, PROCESSOR_V850E2V3_UP },
+ { "mpu10_dpa3l", 22, PROCESSOR_V850E2V3_UP },
+ { "mpu10_dpa3u", 23, PROCESSOR_V850E2V3_UP },
+ { "mpu10_dpa4l", 24, PROCESSOR_V850E2V3_UP },
+ { "mpu10_dpa4u", 25, PROCESSOR_V850E2V3_UP },
+ { "mpu10_dpa5l", 26, PROCESSOR_V850E2V3_UP },
+ { "mpu10_dpa5u", 27, PROCESSOR_V850E2V3_UP },
+ { "mpu10_ipa0l", 6, PROCESSOR_V850E2V3_UP },
+ { "mpu10_ipa0u", 7, PROCESSOR_V850E2V3_UP },
+ { "mpu10_ipa1l", 8, PROCESSOR_V850E2V3_UP },
+ { "mpu10_ipa1u", 9, PROCESSOR_V850E2V3_UP },
+ { "mpu10_ipa2l", 10, PROCESSOR_V850E2V3_UP },
+ { "mpu10_ipa2u", 11, PROCESSOR_V850E2V3_UP },
+ { "mpu10_ipa3l", 12, PROCESSOR_V850E2V3_UP },
+ { "mpu10_ipa3u", 13, PROCESSOR_V850E2V3_UP },
+ { "mpu10_ipa4l", 14, PROCESSOR_V850E2V3_UP },
+ { "mpu10_ipa4u", 15, PROCESSOR_V850E2V3_UP },
+ { "mpu10_mpc", 1, PROCESSOR_V850E2V3_UP },
+ { "mpu10_mpm", 0, PROCESSOR_V850E2V3_UP },
+ { "mpu10_tid", 2, PROCESSOR_V850E2V3_UP },
+ { "mpu10_vmadr", 5, PROCESSOR_V850E2V3_UP },
+ { "mpu10_vmecr", 3, PROCESSOR_V850E2V3_UP },
+ { "mpu10_vmtid", 4, PROCESSOR_V850E2V3_UP },
+ { "pid", 6, PROCESSOR_V850E2V3_UP },
+ { "pmcr0", 4, PROCESSOR_V850E2V3_UP },
+ { "pmis2", 14, PROCESSOR_V850E2V3_UP },
+ { "psw", 5, PROCESSOR_ALL },
+ { "scbp", 12, PROCESSOR_V850E2V3_UP },
+ { "sccfg", 11, PROCESSOR_V850E2V3_UP },
+ { "sr0", 0, PROCESSOR_ALL },
+ { "sr1", 1, PROCESSOR_ALL },
+ { "sr10", 10, PROCESSOR_ALL },
+ { "sr11", 11, PROCESSOR_ALL },
+ { "sr12", 12, PROCESSOR_ALL },
+ { "sr13", 13, PROCESSOR_ALL },
+ { "sr14", 14, PROCESSOR_ALL },
+ { "sr15", 15, PROCESSOR_ALL },
+ { "sr16", 16, PROCESSOR_ALL },
+ { "sr17", 17, PROCESSOR_ALL },
+ { "sr18", 18, PROCESSOR_ALL },
+ { "sr19", 19, PROCESSOR_ALL },
+ { "sr2", 2, PROCESSOR_ALL },
+ { "sr20", 20, PROCESSOR_ALL },
+ { "sr21", 21, PROCESSOR_ALL },
+ { "sr22", 22, PROCESSOR_ALL },
+ { "sr23", 23, PROCESSOR_ALL },
+ { "sr24", 24, PROCESSOR_ALL },
+ { "sr25", 25, PROCESSOR_ALL },
+ { "sr26", 26, PROCESSOR_ALL },
+ { "sr27", 27, PROCESSOR_ALL },
+ { "sr28", 28, PROCESSOR_ALL },
+ { "sr29", 29, PROCESSOR_ALL },
+ { "sr3", 3, PROCESSOR_ALL },
+ { "sr30", 30, PROCESSOR_ALL },
+ { "sr31", 31, PROCESSOR_ALL },
+ { "sr4", 4, PROCESSOR_ALL },
+ { "sr5", 5, PROCESSOR_ALL },
+ { "sr6", 6, PROCESSOR_ALL },
+ { "sr7", 7, PROCESSOR_ALL },
+ { "sr8", 8, PROCESSOR_ALL },
+ { "sr9", 9, PROCESSOR_ALL },
+ { "sw_base", 3, PROCESSOR_V850E2V3_UP },
+ { "sw_cfg", 1, PROCESSOR_V850E2V3_UP },
+ { "sw_ctl", 0, PROCESSOR_V850E2V3_UP },
+ { "tid", 2, PROCESSOR_V850E2V3_UP },
+ { "vmadr", 6, PROCESSOR_V850E2V3_UP },
+ { "vmecr", 4, PROCESSOR_V850E2V3_UP },
+ { "vmtid", 5, PROCESSOR_V850E2V3_UP },
+ { "vsadr", 2, PROCESSOR_V850E2V3_UP },
+ { "vsecr", 0, PROCESSOR_V850E2V3_UP },
+ { "vstid", 1, PROCESSOR_V850E2V3_UP },