gdb: check for partial symtab presence in dwarf2_initialize_objfile

[deliverable/binutils-gdb.git] / gas / doc / c-i386.texi

diff --git a/gas/doc/c-i386.texi b/gas/doc/c-i386.texi
index 8c8e8d0f1873a6f8da43d0f6f4862d8549b7a624..d4e6fcb698004b869f2b21428e225db62590fa2c 100644 (file)
--- a/gas/doc/c-i386.texi
+++ b/gas/doc/c-i386.texi
@@ -187,6 +187,8 @@ accept various extension mnemonics.  For example,
 @code{movdiri},
 @code{movdir64b},
 @code{enqcmd},
 @code{movdiri},
 @code{movdir64b},
 @code{enqcmd},

+@code{serialize},
+@code{tsxldtrk},

 @code{avx512f},
 @code{avx512cd},
 @code{avx512er},
 @code{avx512f},
 @code{avx512cd},
 @code{avx512er},


@@ -202,6 +204,7 @@ accept various extension mnemonics.  For example,
 @code{avx512_vbmi2},
 @code{avx512_vnni},
 @code{avx512_bitalg},
 @code{avx512_vbmi2},
 @code{avx512_vnni},
 @code{avx512_bitalg},

+@code{avx512_vp2intersect},

 @code{avx512_bf16},
 @code{noavx512f},
 @code{noavx512cd},
 @code{avx512_bf16},
 @code{noavx512f},
 @code{noavx512cd},


@@ -221,6 +224,8 @@ accept various extension mnemonics.  For example,
 @code{noavx512_vp2intersect},
 @code{noavx512_bf16},
 @code{noenqcmd},
 @code{noavx512_vp2intersect},
 @code{noavx512_bf16},
 @code{noenqcmd},

+@code{noserialize},
+@code{notsxldtrk},

 @code{vmx},
 @code{vmfunc},
 @code{smx},
 @code{vmx},
 @code{vmfunc},
 @code{smx},


@@ -251,6 +256,7 @@ accept various extension mnemonics.  For example,
 @code{cldemote},
 @code{rdpru},
 @code{mcommit},
 @code{cldemote},
 @code{rdpru},
 @code{mcommit},

+@code{sev_es},

 @code{lwp},
 @code{fma4},
 @code{xop},
 @code{lwp},
 @code{fma4},
 @code{xop},


@@ -385,9 +391,10 @@ with default visibility can be preempted.  The resulting code is
 slightly bigger.  This option only affects the handling of branch
 instructions.
 
 slightly bigger.  This option only affects the handling of branch
 instructions.
 

+@cindex @samp{-mbig-obj} option, i386

 @cindex @samp{-mbig-obj} option, x86-64
 @item -mbig-obj
 @cindex @samp{-mbig-obj} option, x86-64
 @item -mbig-obj

-On x86-64 PE/COFF target this option forces the use of big object file
+On PE/COFF target this option forces the use of big object file

 format, which allows more than 32768 sections.
 
 @cindex @samp{-momit-lock-prefix=} option, i386
 format, which allows more than 32768 sections.
 
 @cindex @samp{-momit-lock-prefix=} option, i386


@@ -463,6 +470,53 @@ on an instruction.  It is equivalent to
 @option{-malign-branch-prefix-size=5}.
 The default doesn't align branches.
 
 @option{-malign-branch-prefix-size=5}.
 The default doesn't align branches.
 

+@cindex @samp{-mlfence-after-load=} option, i386
+@cindex @samp{-mlfence-after-load=} option, x86-64
+@item -mlfence-after-load=@var{no}
+@itemx -mlfence-after-load=@var{yes}
+These options control whether the assembler should generate lfence
+after load instructions.  @option{-mlfence-after-load=@var{yes}} will
+generate lfence.  @option{-mlfence-after-load=@var{no}} will not generate
+lfence, which is the default.
+
+@cindex @samp{-mlfence-before-indirect-branch=} option, i386
+@cindex @samp{-mlfence-before-indirect-branch=} option, x86-64
+@item -mlfence-before-indirect-branch=@var{none}
+@item -mlfence-before-indirect-branch=@var{all}
+@item -mlfence-before-indirect-branch=@var{register}
+@itemx -mlfence-before-indirect-branch=@var{memory}
+These options control whether the assembler should generate lfence
+before indirect near branch instructions.
+@option{-mlfence-before-indirect-branch=@var{all}} will generate lfence
+before indirect near branch via register and issue a warning before
+indirect near branch via memory.
+It also implicitly sets @option{-mlfence-before-ret=@var{shl}} when
+there's no explict @option{-mlfence-before-ret=}.
+@option{-mlfence-before-indirect-branch=@var{register}} will generate
+lfence before indirect near branch via register.
+@option{-mlfence-before-indirect-branch=@var{memory}} will issue a
+warning before indirect near branch via memory.
+@option{-mlfence-before-indirect-branch=@var{none}} will not generate
+lfence nor issue warning, which is the default.  Note that lfence won't
+be generated before indirect near branch via register with
+@option{-mlfence-after-load=@var{yes}} since lfence will be generated
+after loading branch target register.
+
+@cindex @samp{-mlfence-before-ret=} option, i386
+@cindex @samp{-mlfence-before-ret=} option, x86-64
+@item -mlfence-before-ret=@var{none}
+@item -mlfence-before-ret=@var{shl}
+@item -mlfence-before-ret=@var{or}
+@item -mlfence-before-ret=@var{yes}
+@itemx -mlfence-before-ret=@var{not}
+These options control whether the assembler should generate lfence
+before ret.  @option{-mlfence-before-ret=@var{or}} will generate
+generate or instruction with lfence.
+@option{-mlfence-before-ret=@var{shl/yes}} will generate shl instruction
+with lfence. @option{-mlfence-before-ret=@var{not}} will generate not
+instruction with lfence. @option{-mlfence-before-ret=@var{none}} will not
+generate lfence, which is the default.
+

 @cindex @samp{-mx86-used-note=} option, i386
 @cindex @samp{-mx86-used-note=} option, x86-64
 @item -mx86-used-note=@var{no}
 @cindex @samp{-mx86-used-note=} option, i386
 @cindex @samp{-mx86-used-note=} option, x86-64
 @item -mx86-used-note=@var{no}


@@ -1449,12 +1503,12 @@ supported on the CPU specified.  The choices for @var{cpu_type} are:
 @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @item @samp{.ibt}
 @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
 @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}
 @item @samp{.clwb} @tab @samp{.rdpid} @tab @samp{.ptwrite} @tab @item @samp{.ibt}
 @item @samp{.wbnoinvd} @tab @samp{.pconfig} @tab @samp{.waitpkg} @tab @samp{.cldemote}
 @item @samp{.shstk} @tab @samp{.gfni} @tab @samp{.vaes} @tab @samp{.vpclmulqdq}

-@item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd}
+@item @samp{.movdiri} @tab @samp{.movdir64b} @tab @samp{.enqcmd} @tab @samp{.tsxldtrk}

 @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
 @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme}
 @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}
 @item @samp{.padlock} @tab @samp{.clzero} @tab @samp{.mwaitx} @tab @samp{.rdpru}
 @item @samp{.3dnow} @tab @samp{.3dnowa} @tab @samp{.sse4a} @tab @samp{.sse5}
 @item @samp{.syscall} @tab @samp{.rdtscp} @tab @samp{.svme}
 @item @samp{.lwp} @tab @samp{.fma4} @tab @samp{.xop} @tab @samp{.cx16}
 @item @samp{.padlock} @tab @samp{.clzero} @tab @samp{.mwaitx} @tab @samp{.rdpru}

-@item @samp{.mcommit}
+@item @samp{.mcommit} @tab @samp{.sev_es}

 @end multitable
 
 Apart from the warning, there are only two other effects on
 @end multitable
 
 Apart from the warning, there are only two other effects on