- {
- fragS *fx_frag; /* Which frag? */
- long fx_where; /* Where is the 1st byte to fix up? */
- symbolS *fx_addsy; /* NULL or Symbol whose value we add in. */
- symbolS *fx_subsy; /* NULL or Symbol whose value we subtract. */
- long fx_offset; /* Absolute number we add in. */
- struct fix *fx_next; /* NULL or -> next fixS. */
- short int fx_size; /* How many bytes are involved? */
- char fx_pcrel; /* TRUE: pc-relative. */
- char fx_pcrel_adjust; /* pc-relative offset adjust */
- char fx_im_disp; /* TRUE: value is a displacement */
- bit_fixS *fx_bit_fixP; /* IF NULL no bitfix's to do */
- char fx_bsr; /* sequent-hack */
-#if defined(TC_SPARC) || defined(TC_A29K) || defined(NEED_FX_R_TYPE)
- /* Hacks for machines where the type of reloc can't be
- worked out by looking at how big it is */
-
- int fx_r_type;
+{
+ /* These small fields are grouped together for compactness of
+ this structure, and efficiency of access on some architectures. */
+
+ /* Is this a pc-relative relocation? */
+ unsigned fx_pcrel : 1;
+
+ /* Is this value an immediate displacement? */
+ /* Only used on ns32k; merge it into TC_FIX_TYPE sometime. */
+ unsigned fx_im_disp : 2;
+
+ /* Some bits for the CPU specific code. */
+ unsigned fx_tcbit : 1;
+ unsigned fx_tcbit2 : 1;
+
+ /* Has this relocation already been applied? */
+ unsigned fx_done : 1;
+
+ /* Suppress overflow complaints on large addends. This is used
+ in the PowerPC ELF config to allow large addends on the
+ BFD_RELOC_{LO16,HI16,HI16_S} relocations.
+
+ @@ Can this be determined from BFD? */
+ unsigned fx_no_overflow : 1;
+
+ /* The value is signed when checking for overflow. */
+ unsigned fx_signed : 1;
+
+ /* pc-relative offset adjust (only used by some CPU specific code) */
+ signed char fx_pcrel_adjust;
+
+ /* How many bytes are involved? */
+ unsigned char fx_size;
+
+ /* Which frag does this fix apply to? */
+ fragS *fx_frag;
+
+ /* Where is the first byte to fix up? */
+ long fx_where;
+
+ /* NULL or Symbol whose value we add in. */
+ symbolS *fx_addsy;
+
+ /* NULL or Symbol whose value we subtract. */
+ symbolS *fx_subsy;
+
+ /* Absolute number we add in. */
+ valueT fx_offset;
+
+ /* The value of dot when the fixup expression was parsed. */
+ addressT fx_dot_value;
+
+ /* The frag fx_dot_value is based on. */
+ fragS *fx_dot_frag;
+
+ /* Next fixS in linked list, or NULL. */
+ struct fix *fx_next;
+
+ /* If NULL, no bitfix's to do. */
+ /* Only i960-coff and ns32k use this, and i960-coff stores an
+ integer. This can probably be folded into tc_fix_data, below.
+ @@ Alpha also uses it, but only to disable certain relocation
+ processing. */
+ bit_fixS *fx_bit_fixP;
+
+ bfd_reloc_code_real_type fx_r_type;
+
+ /* This field is sort of misnamed. It appears to be a sort of random
+ scratch field, for use by the back ends. The main gas code doesn't
+ do anything but initialize it to zero. The use of it does need to
+ be coordinated between the cpu and format files, though. E.g., some
+ coff targets pass the `addend' field from the cpu file via this
+ field. I don't know why the `fx_offset' field above can't be used
+ for that; investigate later and document. KR */
+ valueT fx_addnumber;
+
+ /* The location of the instruction which created the reloc, used
+ in error messages. */
+ char *fx_file;
+ unsigned fx_line;
+
+#ifdef USING_CGEN
+ struct {
+ /* CGEN_INSN entry for this instruction. */
+ const struct cgen_insn *insn;
+ /* Target specific data, usually reloc number. */
+ int opinfo;
+ /* Which ifield this fixup applies to. */
+ struct cgen_maybe_multi_ifield * field;
+ /* is this field is the MSB field in a set? */
+ int msb_field_p;
+ } fx_cgen;