+/* At a ptrace syscall-stop, return the syscall number. This either
+ comes from the SWI instruction (OABI) or from r7 (EABI).
+
+ When the function fails, it should return -1. */
+
+static LONGEST
+arm_linux_get_syscall_number (struct gdbarch *gdbarch,
+ ptid_t ptid)
+{
+ struct regcache *regs = get_thread_regcache (ptid);
+ struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
+
+ ULONGEST pc;
+ ULONGEST cpsr;
+ ULONGEST t_bit = arm_psr_thumb_bit (gdbarch);
+ int is_thumb;
+ ULONGEST svc_number = -1;
+
+ regcache_cooked_read_unsigned (regs, ARM_PC_REGNUM, &pc);
+ regcache_cooked_read_unsigned (regs, ARM_PS_REGNUM, &cpsr);
+ is_thumb = (cpsr & t_bit) != 0;
+
+ if (is_thumb)
+ {
+ regcache_cooked_read_unsigned (regs, 7, &svc_number);
+ }
+ else
+ {
+ enum bfd_endian byte_order_for_code =
+ gdbarch_byte_order_for_code (gdbarch);
+
+ /* PC gets incremented before the syscall-stop, so read the
+ previous instruction. */
+ unsigned long this_instr =
+ read_memory_unsigned_integer (pc - 4, 4, byte_order_for_code);
+
+ unsigned long svc_operand = (0x00ffffff & this_instr);
+
+ if (svc_operand)
+ {
+ /* OABI */
+ svc_number = svc_operand - 0x900000;
+ }
+ else
+ {
+ /* EABI */
+ regcache_cooked_read_unsigned (regs, 7, &svc_number);
+ }
+ }
+
+ return svc_number;
+}
+
+/* When FRAME is at a syscall instruction, return the PC of the next
+ instruction to be executed. */
+
+static CORE_ADDR
+arm_linux_syscall_next_pc (struct frame_info *frame)
+{
+ CORE_ADDR pc = get_frame_pc (frame);
+ CORE_ADDR return_addr = 0;
+ int is_thumb = arm_frame_is_thumb (frame);
+ ULONGEST svc_number = 0;
+
+ if (is_thumb)
+ {
+ svc_number = get_frame_register_unsigned (frame, 7);
+ return_addr = pc + 2;
+ }
+ else
+ {
+ struct gdbarch *gdbarch = get_frame_arch (frame);
+ enum bfd_endian byte_order_for_code =
+ gdbarch_byte_order_for_code (gdbarch);
+ unsigned long this_instr =
+ read_memory_unsigned_integer (pc, 4, byte_order_for_code);
+
+ unsigned long svc_operand = (0x00ffffff & this_instr);
+ if (svc_operand) /* OABI. */
+ {
+ svc_number = svc_operand - 0x900000;
+ }
+ else /* EABI. */
+ {
+ svc_number = get_frame_register_unsigned (frame, 7);
+ }
+
+ return_addr = pc + 4;
+ }
+
+ arm_linux_sigreturn_return_addr (frame, svc_number, &return_addr, &is_thumb);
+
+ /* Addresses for calling Thumb functions have the bit 0 set. */
+ if (is_thumb)
+ return_addr |= 1;
+
+ return return_addr;
+}
+
+
+/* Insert a single step breakpoint at the next executed instruction. */
+
+static int
+arm_linux_software_single_step (struct frame_info *frame)
+{
+ struct gdbarch *gdbarch = get_frame_arch (frame);
+ struct address_space *aspace = get_frame_address_space (frame);
+ CORE_ADDR next_pc;
+
+ if (arm_deal_with_atomic_sequence (frame))
+ return 1;
+
+ next_pc = arm_get_next_pc (frame, get_frame_pc (frame));
+
+ /* The Linux kernel offers some user-mode helpers in a high page. We can
+ not read this page (as of 2.6.23), and even if we could then we couldn't
+ set breakpoints in it, and even if we could then the atomic operations
+ would fail when interrupted. They are all called as functions and return
+ to the address in LR, so step to there instead. */
+ if (next_pc > 0xffff0000)
+ next_pc = get_frame_register_unsigned (frame, ARM_LR_REGNUM);
+
+ arm_insert_single_step_breakpoint (gdbarch, aspace, next_pc);
+
+ return 1;
+}
+
+/* Support for displaced stepping of Linux SVC instructions. */
+
+static void
+arm_linux_cleanup_svc (struct gdbarch *gdbarch,
+ struct regcache *regs,
+ struct displaced_step_closure *dsc)
+{
+ CORE_ADDR from = dsc->insn_addr;
+ ULONGEST apparent_pc;
+ int within_scratch;
+
+ regcache_cooked_read_unsigned (regs, ARM_PC_REGNUM, &apparent_pc);
+
+ within_scratch = (apparent_pc >= dsc->scratch_base
+ && apparent_pc < (dsc->scratch_base
+ + DISPLACED_MODIFIED_INSNS * 4 + 4));
+
+ if (debug_displaced)
+ {
+ fprintf_unfiltered (gdb_stdlog, "displaced: PC is apparently %.8lx after "
+ "SVC step ", (unsigned long) apparent_pc);
+ if (within_scratch)
+ fprintf_unfiltered (gdb_stdlog, "(within scratch space)\n");
+ else
+ fprintf_unfiltered (gdb_stdlog, "(outside scratch space)\n");
+ }
+
+ if (within_scratch)
+ displaced_write_reg (regs, dsc, ARM_PC_REGNUM, from + 4, BRANCH_WRITE_PC);
+}
+
+static int
+arm_linux_copy_svc (struct gdbarch *gdbarch, struct regcache *regs,
+ struct displaced_step_closure *dsc)
+{
+ CORE_ADDR return_to = 0;
+
+ struct frame_info *frame;
+ unsigned int svc_number = displaced_read_reg (regs, dsc, 7);
+ int is_sigreturn = 0;
+ int is_thumb;
+
+ frame = get_current_frame ();
+
+ is_sigreturn = arm_linux_sigreturn_return_addr(frame, svc_number,
+ &return_to, &is_thumb);
+ if (is_sigreturn)
+ {
+ struct symtab_and_line sal;
+
+ if (debug_displaced)
+ fprintf_unfiltered (gdb_stdlog, "displaced: found "
+ "sigreturn/rt_sigreturn SVC call. PC in frame = %lx\n",
+ (unsigned long) get_frame_pc (frame));
+
+ if (debug_displaced)
+ fprintf_unfiltered (gdb_stdlog, "displaced: unwind pc = %lx. "
+ "Setting momentary breakpoint.\n", (unsigned long) return_to);
+
+ gdb_assert (inferior_thread ()->control.step_resume_breakpoint
+ == NULL);
+
+ sal = find_pc_line (return_to, 0);
+ sal.pc = return_to;
+ sal.section = find_pc_overlay (return_to);
+ sal.explicit_pc = 1;
+
+ frame = get_prev_frame (frame);
+
+ if (frame)
+ {
+ inferior_thread ()->control.step_resume_breakpoint
+ = set_momentary_breakpoint (gdbarch, sal, get_frame_id (frame),
+ bp_step_resume);
+
+ /* set_momentary_breakpoint invalidates FRAME. */
+ frame = NULL;
+
+ /* We need to make sure we actually insert the momentary
+ breakpoint set above. */
+ insert_breakpoints ();
+ }
+ else if (debug_displaced)
+ fprintf_unfiltered (gdb_stderr, "displaced: couldn't find previous "
+ "frame to set momentary breakpoint for "
+ "sigreturn/rt_sigreturn\n");
+ }
+ else if (debug_displaced)
+ fprintf_unfiltered (gdb_stdlog, "displaced: sigreturn/rt_sigreturn "
+ "SVC call not in signal trampoline frame\n");
+
+
+ /* Preparation: If we detect sigreturn, set momentary breakpoint at resume
+ location, else nothing.
+ Insn: unmodified svc.
+ Cleanup: if pc lands in scratch space, pc <- insn_addr + 4
+ else leave pc alone. */
+
+
+ dsc->cleanup = &arm_linux_cleanup_svc;
+ /* Pretend we wrote to the PC, so cleanup doesn't set PC to the next
+ instruction. */
+ dsc->wrote_to_pc = 1;
+
+ return 0;
+}
+
+
+/* The following two functions implement single-stepping over calls to Linux
+ kernel helper routines, which perform e.g. atomic operations on architecture
+ variants which don't support them natively.
+
+ When this function is called, the PC will be pointing at the kernel helper
+ (at an address inaccessible to GDB), and r14 will point to the return
+ address. Displaced stepping always executes code in the copy area:
+ so, make the copy-area instruction branch back to the kernel helper (the
+ "from" address), and make r14 point to the breakpoint in the copy area. In
+ that way, we regain control once the kernel helper returns, and can clean
+ up appropriately (as if we had just returned from the kernel helper as it
+ would have been called from the non-displaced location). */
+
+static void
+cleanup_kernel_helper_return (struct gdbarch *gdbarch,
+ struct regcache *regs,
+ struct displaced_step_closure *dsc)
+{
+ displaced_write_reg (regs, dsc, ARM_LR_REGNUM, dsc->tmp[0], CANNOT_WRITE_PC);
+ displaced_write_reg (regs, dsc, ARM_PC_REGNUM, dsc->tmp[0], BRANCH_WRITE_PC);
+}
+
+static void
+arm_catch_kernel_helper_return (struct gdbarch *gdbarch, CORE_ADDR from,
+ CORE_ADDR to, struct regcache *regs,
+ struct displaced_step_closure *dsc)
+{
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+
+ dsc->numinsns = 1;
+ dsc->insn_addr = from;
+ dsc->cleanup = &cleanup_kernel_helper_return;
+ /* Say we wrote to the PC, else cleanup will set PC to the next
+ instruction in the helper, which isn't helpful. */
+ dsc->wrote_to_pc = 1;
+
+ /* Preparation: tmp[0] <- r14
+ r14 <- <scratch space>+4
+ *(<scratch space>+8) <- from
+ Insn: ldr pc, [r14, #4]
+ Cleanup: r14 <- tmp[0], pc <- tmp[0]. */
+
+ dsc->tmp[0] = displaced_read_reg (regs, dsc, ARM_LR_REGNUM);
+ displaced_write_reg (regs, dsc, ARM_LR_REGNUM, (ULONGEST) to + 4,
+ CANNOT_WRITE_PC);
+ write_memory_unsigned_integer (to + 8, 4, byte_order, from);
+
+ dsc->modinsn[0] = 0xe59ef004; /* ldr pc, [lr, #4]. */
+}
+
+/* Linux-specific displaced step instruction copying function. Detects when
+ the program has stepped into a Linux kernel helper routine (which must be
+ handled as a special case), falling back to arm_displaced_step_copy_insn()
+ if it hasn't. */
+
+static struct displaced_step_closure *
+arm_linux_displaced_step_copy_insn (struct gdbarch *gdbarch,
+ CORE_ADDR from, CORE_ADDR to,
+ struct regcache *regs)
+{
+ struct displaced_step_closure *dsc
+ = xmalloc (sizeof (struct displaced_step_closure));
+
+ /* Detect when we enter an (inaccessible by GDB) Linux kernel helper, and
+ stop at the return location. */
+ if (from > 0xffff0000)
+ {
+ if (debug_displaced)
+ fprintf_unfiltered (gdb_stdlog, "displaced: detected kernel helper "
+ "at %.8lx\n", (unsigned long) from);
+
+ arm_catch_kernel_helper_return (gdbarch, from, to, regs, dsc);
+ }
+ else
+ {
+ /* Override the default handling of SVC instructions. */
+ dsc->u.svc.copy_svc_os = arm_linux_copy_svc;
+
+ arm_process_displaced_insn (gdbarch, from, to, regs, dsc);
+ }
+
+ arm_displaced_init_closure (gdbarch, from, to, dsc);
+
+ return dsc;
+}
+
+/* Implementation of `gdbarch_stap_is_single_operand', as defined in
+ gdbarch.h. */
+
+static int
+arm_stap_is_single_operand (struct gdbarch *gdbarch, const char *s)
+{
+ return (*s == '#' || *s == '$' || isdigit (*s) /* Literal number. */
+ || *s == '[' /* Register indirection or
+ displacement. */
+ || isalpha (*s)); /* Register value. */
+}
+
+/* This routine is used to parse a special token in ARM's assembly.
+
+ The special tokens parsed by it are:
+
+ - Register displacement (e.g, [fp, #-8])
+
+ It returns one if the special token has been parsed successfully,
+ or zero if the current token is not considered special. */
+
+static int
+arm_stap_parse_special_token (struct gdbarch *gdbarch,
+ struct stap_parse_info *p)
+{
+ if (*p->arg == '[')
+ {
+ /* Temporary holder for lookahead. */
+ const char *tmp = p->arg;
+ char *endp;
+ /* Used to save the register name. */
+ const char *start;
+ char *regname;
+ int len, offset;
+ int got_minus = 0;
+ long displacement;
+ struct stoken str;
+
+ ++tmp;
+ start = tmp;
+
+ /* Register name. */
+ while (isalnum (*tmp))
+ ++tmp;
+
+ if (*tmp != ',')
+ return 0;
+
+ len = tmp - start;
+ regname = alloca (len + 2);
+
+ offset = 0;
+ if (isdigit (*start))
+ {
+ /* If we are dealing with a register whose name begins with a
+ digit, it means we should prefix the name with the letter
+ `r', because GDB expects this name pattern. Otherwise (e.g.,
+ we are dealing with the register `fp'), we don't need to
+ add such a prefix. */
+ regname[0] = 'r';
+ offset = 1;
+ }
+
+ strncpy (regname + offset, start, len);
+ len += offset;
+ regname[len] = '\0';
+
+ if (user_reg_map_name_to_regnum (gdbarch, regname, len) == -1)
+ error (_("Invalid register name `%s' on expression `%s'."),
+ regname, p->saved_arg);
+
+ ++tmp;
+ tmp = skip_spaces_const (tmp);
+ if (*tmp == '#' || *tmp == '$')
+ ++tmp;
+
+ if (*tmp == '-')
+ {
+ ++tmp;
+ got_minus = 1;
+ }
+
+ displacement = strtol (tmp, &endp, 10);
+ tmp = endp;
+
+ /* Skipping last `]'. */
+ if (*tmp++ != ']')
+ return 0;
+
+ /* The displacement. */
+ write_exp_elt_opcode (&p->pstate, OP_LONG);
+ write_exp_elt_type (&p->pstate, builtin_type (gdbarch)->builtin_long);
+ write_exp_elt_longcst (&p->pstate, displacement);
+ write_exp_elt_opcode (&p->pstate, OP_LONG);
+ if (got_minus)
+ write_exp_elt_opcode (&p->pstate, UNOP_NEG);
+
+ /* The register name. */
+ write_exp_elt_opcode (&p->pstate, OP_REGISTER);
+ str.ptr = regname;
+ str.length = len;
+ write_exp_string (&p->pstate, str);
+ write_exp_elt_opcode (&p->pstate, OP_REGISTER);
+
+ write_exp_elt_opcode (&p->pstate, BINOP_ADD);
+
+ /* Casting to the expected type. */
+ write_exp_elt_opcode (&p->pstate, UNOP_CAST);
+ write_exp_elt_type (&p->pstate, lookup_pointer_type (p->arg_type));
+ write_exp_elt_opcode (&p->pstate, UNOP_CAST);
+
+ write_exp_elt_opcode (&p->pstate, UNOP_IND);
+
+ p->arg = tmp;
+ }
+ else
+ return 0;
+
+ return 1;
+}
+
+/* ARM process record-replay constructs: syscall, signal etc. */
+
+struct linux_record_tdep arm_linux_record_tdep;
+
+/* arm_canonicalize_syscall maps from the native arm Linux set
+ of syscall ids into a canonical set of syscall ids used by
+ process record. */
+
+static enum gdb_syscall
+arm_canonicalize_syscall (int syscall)
+{
+ enum { sys_process_vm_writev = 377 };
+
+ if (syscall <= gdb_sys_sched_getaffinity)
+ return syscall;
+ else if (syscall >= 243 && syscall <= 247)
+ return syscall + 2;
+ else if (syscall >= 248 && syscall <= 253)
+ return syscall + 4;
+
+ return -1;
+}
+
+/* Record all registers but PC register for process-record. */
+
+static int
+arm_all_but_pc_registers_record (struct regcache *regcache)
+{
+ int i;
+
+ for (i = 0; i < ARM_PC_REGNUM; i++)
+ {
+ if (record_full_arch_list_add_reg (regcache, ARM_A1_REGNUM + i))
+ return -1;
+ }
+
+ if (record_full_arch_list_add_reg (regcache, ARM_PS_REGNUM))
+ return -1;
+
+ return 0;
+}
+
+/* Handler for arm system call instruction recording. */
+
+static int
+arm_linux_syscall_record (struct regcache *regcache, unsigned long svc_number)
+{
+ int ret = 0;
+ enum gdb_syscall syscall_gdb;
+
+ syscall_gdb = arm_canonicalize_syscall (svc_number);
+
+ if (syscall_gdb < 0)
+ {
+ printf_unfiltered (_("Process record and replay target doesn't "
+ "support syscall number %s\n"),
+ plongest (svc_number));
+ return -1;
+ }
+
+ if (syscall_gdb == gdb_sys_sigreturn
+ || syscall_gdb == gdb_sys_rt_sigreturn)
+ {
+ if (arm_all_but_pc_registers_record (regcache))
+ return -1;
+ return 0;
+ }
+
+ ret = record_linux_system_call (syscall_gdb, regcache,
+ &arm_linux_record_tdep);
+ if (ret != 0)
+ return ret;
+
+ /* Record the return value of the system call. */
+ if (record_full_arch_list_add_reg (regcache, ARM_A1_REGNUM))
+ return -1;
+ /* Record LR. */
+ if (record_full_arch_list_add_reg (regcache, ARM_LR_REGNUM))
+ return -1;
+ /* Record CPSR. */
+ if (record_full_arch_list_add_reg (regcache, ARM_PS_REGNUM))
+ return -1;
+
+ return 0;
+}
+
+/* Implement the skip_trampoline_code gdbarch method. */
+
+static CORE_ADDR
+arm_linux_skip_trampoline_code (struct frame_info *frame, CORE_ADDR pc)
+{
+ CORE_ADDR target_pc = arm_skip_stub (frame, pc);
+
+ if (target_pc != 0)
+ return target_pc;
+
+ return find_solib_trampoline_target (frame, pc);