- /* R0 to R13 are stored in reverse order at offset (2 * 4) in
- struct pt_regs. */
- for (i = 0; i <= 13; i++)
- info->saved_regs[i].addr = addr + ((15 - i) * 4);
-
- info->saved_regs[MOF_REGNUM].addr = addr + (16 * 4);
- info->saved_regs[DCCR_REGNUM].addr = addr + (17 * 4);
- info->saved_regs[SRP_REGNUM].addr = addr + (18 * 4);
- /* Note: IRP is off by 2 at this point. There's no point in correcting it
- though since that will mean that the backtrace will show a PC different
- from what is shown when stopped. */
- info->saved_regs[IRP_REGNUM].addr = addr + (19 * 4);
- info->saved_regs[PC_REGNUM] = info->saved_regs[IRP_REGNUM];
- info->saved_regs[SP_REGNUM].addr = addr + (24 * 4);
+ if (tdep->cris_version == 10)
+ {
+ /* R0 to R13 are stored in reverse order at offset (2 * 4) in
+ struct pt_regs. */
+ for (i = 0; i <= 13; i++)
+ info->saved_regs[i].addr = addr + ((15 - i) * 4);
+
+ info->saved_regs[MOF_REGNUM].addr = addr + (16 * 4);
+ info->saved_regs[DCCR_REGNUM].addr = addr + (17 * 4);
+ info->saved_regs[SRP_REGNUM].addr = addr + (18 * 4);
+ /* Note: IRP is off by 2 at this point. There's no point in correcting
+ it though since that will mean that the backtrace will show a PC
+ different from what is shown when stopped. */
+ info->saved_regs[IRP_REGNUM].addr = addr + (19 * 4);
+ info->saved_regs[gdbarch_pc_regnum (gdbarch)]
+ = info->saved_regs[IRP_REGNUM];
+ info->saved_regs[gdbarch_sp_regnum (gdbarch)].addr = addr + (24 * 4);
+ }
+ else
+ {
+ /* CRISv32. */
+ /* R0 to R13 are stored in order at offset (1 * 4) in
+ struct pt_regs. */
+ for (i = 0; i <= 13; i++)
+ info->saved_regs[i].addr = addr + ((i + 1) * 4);
+
+ info->saved_regs[ACR_REGNUM].addr = addr + (15 * 4);
+ info->saved_regs[SRS_REGNUM].addr = addr + (16 * 4);
+ info->saved_regs[MOF_REGNUM].addr = addr + (17 * 4);
+ info->saved_regs[SPC_REGNUM].addr = addr + (18 * 4);
+ info->saved_regs[CCS_REGNUM].addr = addr + (19 * 4);
+ info->saved_regs[SRP_REGNUM].addr = addr + (20 * 4);
+ info->saved_regs[ERP_REGNUM].addr = addr + (21 * 4);
+ info->saved_regs[EXS_REGNUM].addr = addr + (22 * 4);
+ info->saved_regs[EDA_REGNUM].addr = addr + (23 * 4);
+
+ /* FIXME: If ERP is in a delay slot at this point then the PC will
+ be wrong at this point. This problem manifests itself in the
+ sigaltstack.exp test case, which occasionally generates FAILs when
+ the signal is received while in a delay slot.
+
+ This could be solved by a couple of read_memory_unsigned_integer and a
+ trad_frame_set_value. */
+ info->saved_regs[gdbarch_pc_regnum (gdbarch)]
+ = info->saved_regs[ERP_REGNUM];
+
+ info->saved_regs[gdbarch_sp_regnum (gdbarch)].addr
+ = addr + (25 * 4);
+ }