+/* Correct in either endianness, obviously. */
+static const unsigned short sh_breakpoint = 0xc3c3;
+#define sh_breakpoint_len 2
+
+/* Implementation of linux_target_ops method "sw_breakpoint_from_kind". */
+
+static const gdb_byte *
+sh_sw_breakpoint_from_kind (int kind, int *size)
+{
+ *size = sh_breakpoint_len;
+ return (const gdb_byte *) &sh_breakpoint;
+}
+
+static int
+sh_breakpoint_at (CORE_ADDR where)
+{
+ unsigned short insn;
+
+ (*the_target->read_memory) (where, (unsigned char *) &insn, 2);
+ if (insn == sh_breakpoint)
+ return 1;
+
+ /* If necessary, recognize more trap instructions here. GDB only uses the
+ one. */
+ return 0;
+}
+
+/* Support for hardware single step. */
+
+static int
+sh_supports_hardware_single_step (void)
+{
+ return 1;
+}
+
+/* Provide only a fill function for the general register set. ps_lgetregs
+ will use this for NPTL support. */
+
+static void sh_fill_gregset (struct regcache *regcache, void *buf)
+{
+ int i;
+
+ for (i = 0; i < 23; i++)
+ if (sh_regmap[i] != -1)
+ collect_register (regcache, i, (char *) buf + sh_regmap[i]);
+}
+
+static struct regset_info sh_regsets[] = {
+ { 0, 0, 0, 0, GENERAL_REGS, sh_fill_gregset, NULL },
+ NULL_REGSET
+};
+
+static struct regsets_info sh_regsets_info =
+ {
+ sh_regsets, /* regsets */
+ 0, /* num_regsets */
+ NULL, /* disabled_regsets */
+ };
+
+static struct usrregs_info sh_usrregs_info =
+ {
+ sh_num_regs,
+ sh_regmap,
+ };
+
+static struct regs_info regs_info =
+ {
+ NULL, /* regset_bitmap */
+ &sh_usrregs_info,
+ &sh_regsets_info
+ };
+
+static const struct regs_info *
+sh_regs_info (void)
+{
+ return ®s_info;
+}
+
+static void
+sh_arch_setup (void)
+{
+ current_process ()->tdesc = tdesc_sh;
+}
+