+
+ /* Returns true if the target supports multi-process debugging. */
+ int (*supports_multi_process) (void);
+
+ /* If not NULL, target-specific routine to process monitor command.
+ Returns 1 if handled, or 0 to perform default processing. */
+ int (*handle_monitor_command) (char *);
+
+ /* Returns the core given a thread, or -1 if not known. */
+ int (*core_of_thread) (ptid_t);
+
+ /* Target specific qSupported support. */
+ void (*process_qsupported) (const char *);
+
+ /* Return 1 if the target supports tracepoints, 0 (or leave the
+ callback NULL) otherwise. */
+ int (*supports_tracepoints) (void);
+
+ /* Read PC from REGCACHE. */
+ CORE_ADDR (*read_pc) (struct regcache *regcache);
+
+ /* Write PC to REGCACHE. */
+ void (*write_pc) (struct regcache *regcache, CORE_ADDR pc);
+
+ /* Return true if THREAD is known to be stopped now. */
+ int (*thread_stopped) (struct thread_info *thread);
+
+ /* Read Thread Information Block address. */
+ int (*get_tib_address) (ptid_t ptid, CORE_ADDR *address);
+
+ /* Pause all threads. If FREEZE, arrange for any resume attempt be
+ be ignored until an unpause_all call unfreezes threads again.
+ There can be nested calls to pause_all, so a freeze counter
+ should be maintained. */
+ void (*pause_all) (int freeze);
+
+ /* Unpause all threads. Threads that hadn't been resumed by the
+ client should be left stopped. Basically a pause/unpause call
+ pair should not end up resuming threads that were stopped before
+ the pause call. */
+ void (*unpause_all) (int unfreeze);
+
+ /* Cancel all pending breakpoints hits in all threads. */
+ void (*cancel_breakpoints) (void);
+
+ /* Stabilize all threads. That is, force them out of jump pads. */
+ void (*stabilize_threads) (void);
+
+ /* Install a fast tracepoint jump pad. TPOINT is the address of the
+ tracepoint internal object as used by the IPA agent. TPADDR is
+ the address of tracepoint. COLLECTOR is address of the function
+ the jump pad redirects to. LOCKADDR is the address of the jump
+ pad lock object. ORIG_SIZE is the size in bytes of the
+ instruction at TPADDR. JUMP_ENTRY points to the address of the
+ jump pad entry, and on return holds the address past the end of
+ the created jump pad. JJUMP_PAD_INSN is a buffer containing a
+ copy of the instruction at TPADDR. ADJUST_INSN_ADDR and
+ ADJUST_INSN_ADDR_END are output parameters that return the
+ address range where the instruction at TPADDR was relocated
+ to. */
+ int (*install_fast_tracepoint_jump_pad) (CORE_ADDR tpoint, CORE_ADDR tpaddr,
+ CORE_ADDR collector,
+ CORE_ADDR lockaddr,
+ ULONGEST orig_size,
+ CORE_ADDR *jump_entry,
+ unsigned char *jjump_pad_insn,
+ ULONGEST *jjump_pad_insn_size,
+ CORE_ADDR *adjusted_insn_addr,
+ CORE_ADDR *adjusted_insn_addr_end);
+
+ /* Return the bytecode operations vector for the current inferior.
+ Returns NULL if bytecode compilation is not supported. */
+ struct emit_ops *(*emit_ops) (void);