+#define IS_MOVB_RnRm(x) (((x) & 0xff88) == 0x0c88)
+#define IS_MOVW_RnRm(x) (((x) & 0xff88) == 0x0d00)
+#define IS_MOVL_RnRm(x) (((x) & 0xff88) == 0x0f80)
+#define IS_MOVB_Rn16_SP(x) (((x) & 0xfff0) == 0x6ee0)
+#define IS_MOVB_EXT(x) ((x) == 0x7860)
+#define IS_MOVB_Rn24_SP(x) (((x) & 0xfff0) == 0x6aa0)
+#define IS_MOVW_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
+#define IS_MOVW_EXT(x) ((x) == 0x78e0)
+#define IS_MOVW_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
+/* Same instructions as mov.w, just prefixed with 0x0100. */
+#define IS_MOVL_PRE(x) ((x) == 0x0100)
+#define IS_MOVL_Rn16_SP(x) (((x) & 0xfff0) == 0x6fe0)
+#define IS_MOVL_EXT(x) ((x) == 0x78e0)
+#define IS_MOVL_Rn24_SP(x) (((x) & 0xfff0) == 0x6ba0)
+
+#define IS_PUSHFP_MOVESPFP(x) ((x) == 0x6df60d76)
+#define IS_PUSH_FP(x) ((x) == 0x01006df6)
+#define IS_MOV_SP_FP(x) ((x) == 0x0ff6)
+#define IS_SUB2_SP(x) ((x) == 0x1b87)
+#define IS_SUB4_SP(x) ((x) == 0x1b97)
+#define IS_ADD_IMM_SP(x) ((x) == 0x7a1f)
+#define IS_SUB_IMM_SP(x) ((x) == 0x7a3f)
+#define IS_SUBL4_SP(x) ((x) == 0x1acf)
+#define IS_MOV_IMM_Rn(x) (((x) & 0xfff0) == 0x7905)
+#define IS_SUB_RnSP(x) (((x) & 0xff0f) == 0x1907)
+#define IS_ADD_RnSP(x) (((x) & 0xff0f) == 0x0907)
+#define IS_PUSH(x) (((x) & 0xfff0) == 0x6df0)
+
+/* If the instruction at PC is an argument register spill, return its
+ length. Otherwise, return zero.
+
+ An argument register spill is an instruction that moves an argument
+ from the register in which it was passed to the stack slot in which
+ it really lives. It is a byte, word, or longword move from an
+ argument register to a negative offset from the frame pointer.
+
+ CV, 2003-06-16: Or, in optimized code or when the `register' qualifier
+ is used, it could be a byte, word or long move to registers r3-r5. */
+
+static int
+h8300_is_argument_spill (struct gdbarch *gdbarch, CORE_ADDR pc)