+ /* General-purpose registers. */
+ struct regset *gregset;
+ int *gregset_reg_offset;
+ int gregset_num_regs;
+ size_t sizeof_gregset;
+
+ /* The general-purpose registers used to pass integers when making
+ function calls. This only applies to amd64, as all parameters
+ are passed through the stack on x86. */
+ int call_dummy_num_integer_regs;
+ int *call_dummy_integer_regs;
+
+ /* Used on amd64 only. Classify TYPE according to calling conventions,
+ and store the result in CLASS. */
+ void (*classify) (struct type *type, enum amd64_reg_class class[2]);
+
+ /* Used on amd64 only. Non-zero if the first few MEMORY arguments
+ should be passed by pointer.
+
+ More precisely, MEMORY arguments are passed through the stack.
+ But certain architectures require that their address be passed
+ by register as well, if there are still some integer registers
+ available for argument passing. */
+ int memory_args_by_pointer;
+
+ /* Used on amd64 only.
+
+ If non-zero, then the callers of a function are expected to reserve
+ some space in the stack just before the area where the PC is saved
+ so that the callee may save the integer-parameter registers there.
+ The amount of space is dependent on the list of registers used for
+ integer parameter passing (see component call_dummy_num_integer_regs
+ above). */
+ int integer_param_regs_saved_in_caller_frame;
+
+ /* Floating-point registers. */
+ struct regset *fpregset;
+ size_t sizeof_fpregset;
+
+ /* XSAVE extended state. */
+ struct regset *xstateregset;
+
+ /* Register number for %st(0). The register numbers for the other
+ registers follow from this one. Set this to -1 to indicate the
+ absence of an FPU. */
+ int st0_regnum;
+
+ /* Number of MMX registers. */
+ int num_mmx_regs;
+
+ /* Register number for %mm0. Set this to -1 to indicate the absence
+ of MMX support. */
+ int mm0_regnum;
+
+ /* Number of pseudo YMM registers. */
+ int num_ymm_regs;
+
+ /* Register number for %ymm0. Set this to -1 to indicate the absence
+ of pseudo YMM register support. */
+ int ymm0_regnum;
+
+ /* Number of byte registers. */
+ int num_byte_regs;
+
+ /* Register pseudo number for %al. */
+ int al_regnum;
+
+ /* Number of pseudo word registers. */
+ int num_word_regs;
+
+ /* Register number for %ax. */
+ int ax_regnum;
+
+ /* Number of pseudo dword registers. */
+ int num_dword_regs;
+
+ /* Register number for %eax. Set this to -1 to indicate the absence
+ of pseudo dword register support. */
+ int eax_regnum;
+
+ /* Number of core registers. */
+ int num_core_regs;