+#include <machine/frame.h>
+#include <machine/pcb.h>
+
+#include "i386-tdep.h"
+#include "i386bsd-nat.h"
+#include "obsd-nat.h"
+#include "bsd-kvm.h"
+
+static int
+i386obsd_supply_pcb (struct regcache *regcache, struct pcb *pcb)
+{
+ struct gdbarch *gdbarch = get_regcache_arch (regcache);
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ struct switchframe sf;
+
+ /* The following is true for OpenBSD 3.6:
+
+ The pcb contains %esp and %ebp at the point of the context switch
+ in cpu_switch(). At that point we have a stack frame as
+ described by `struct switchframe', which for OpenBSD 3.6 has the
+ following layout:
+
+ interrupt level
+ %edi
+ %esi
+ %ebx
+ %eip
+
+ we reconstruct the register state as it would look when we just
+ returned from cpu_switch(). */
+
+ /* The stack pointer shouldn't be zero. */
+ if (pcb->pcb_esp == 0)
+ return 0;
+
+ /* Read the stack frame, and check its validity. We do this by
+ checking if the saved interrupt priority level in the stack frame
+ looks reasonable.. */
+#ifdef PCB_SAVECTX
+ if ((pcb->pcb_flags & PCB_SAVECTX) == 0)
+ {
+ /* Yes, we have a frame that matches cpu_switch(). */
+ read_memory (pcb->pcb_esp, (gdb_byte *) &sf, sizeof sf);
+ pcb->pcb_esp += sizeof (struct switchframe);
+ regcache_raw_supply (regcache, I386_EDI_REGNUM, &sf.sf_edi);
+ regcache_raw_supply (regcache, I386_ESI_REGNUM, &sf.sf_esi);
+ regcache_raw_supply (regcache, I386_EBX_REGNUM, &sf.sf_ebx);
+ regcache_raw_supply (regcache, I386_EIP_REGNUM, &sf.sf_eip);
+ }
+ else
+#endif
+ {
+ /* No, the pcb must have been last updated by savectx(). */
+ pcb->pcb_esp = pcb->pcb_ebp;
+ pcb->pcb_ebp = read_memory_integer(pcb->pcb_esp, 4, byte_order);
+ sf.sf_eip = read_memory_integer(pcb->pcb_esp + 4, 4, byte_order);
+ regcache_raw_supply (regcache, I386_EIP_REGNUM, &sf.sf_eip);
+ }
+
+ regcache_raw_supply (regcache, I386_EBP_REGNUM, &pcb->pcb_ebp);
+ regcache_raw_supply (regcache, I386_ESP_REGNUM, &pcb->pcb_esp);
+
+ return 1;
+}
+\f