+ fetch_subexp_value (cond, &pc, &right_val, NULL, &right_chain, 0);
+ num_accesses_right = num_memory_accesses (right_chain);
+
+ if (right_val == NULL || num_accesses_right < 0)
+ return 0;
+
+ if (num_accesses_left == 1 && num_accesses_right == 0
+ && VALUE_LVAL (left_val) == lval_memory
+ && value_address (left_val) == watch_addr)
+ {
+ *data_value = value_as_long (right_val);
+
+ /* DATA_VALUE is the constant in RIGHT_VAL, but actually has
+ the same type as the memory region referenced by LEFT_VAL. */
+ *len = TYPE_LENGTH (check_typedef (value_type (left_val)));
+ }
+ else if (num_accesses_left == 0 && num_accesses_right == 1
+ && VALUE_LVAL (right_val) == lval_memory
+ && value_address (right_val) == watch_addr)
+ {
+ *data_value = value_as_long (left_val);
+
+ /* DATA_VALUE is the constant in LEFT_VAL, but actually has
+ the same type as the memory region referenced by RIGHT_VAL. */
+ *len = TYPE_LENGTH (check_typedef (value_type (right_val)));
+ }
+ else
+ return 0;
+
+ return 1;
+}
+
+/* Return true if the target is capable of using hardware to evaluate the
+ condition expression, thus only triggering the watchpoint when it is
+ true. */
+
+bool
+ppc_linux_nat_target::can_accel_watchpoint_condition (CORE_ADDR addr,
+ int len, int rw,
+ struct expression *cond)
+{
+ CORE_ADDR data_value;
+
+ m_dreg_interface.detect (inferior_ptid);
+
+ return (m_dreg_interface.hwdebug_p ()
+ && (m_dreg_interface.hwdebug_info ().num_condition_regs > 0)
+ && check_condition (addr, cond, &data_value, &len));
+}
+
+/* Set up P with the parameters necessary to request a watchpoint covering
+ LEN bytes starting at ADDR and if possible with condition expression COND
+ evaluated by hardware. INSERT tells if we are creating a request for
+ inserting or removing the watchpoint. */
+
+void
+ppc_linux_nat_target::create_watchpoint_request (struct ppc_hw_breakpoint *p,
+ CORE_ADDR addr, int len,
+ enum target_hw_bp_type type,
+ struct expression *cond,
+ int insert)
+{
+ const struct ppc_debug_info &hwdebug_info = (m_dreg_interface
+ .hwdebug_info ());
+
+ if (len == 1
+ || !(hwdebug_info.features & PPC_DEBUG_FEATURE_DATA_BP_RANGE))
+ {
+ int use_condition;
+ CORE_ADDR data_value;
+
+ use_condition = (insert? can_use_watchpoint_cond_accel ()
+ : hwdebug_info.num_condition_regs > 0);
+ if (cond && use_condition && check_condition (addr, cond,
+ &data_value, &len))
+ calculate_dvc (addr, len, data_value, &p->condition_mode,
+ &p->condition_value);
+ else
+ {
+ p->condition_mode = PPC_BREAKPOINT_CONDITION_NONE;
+ p->condition_value = 0;
+ }
+
+ p->addr_mode = PPC_BREAKPOINT_MODE_EXACT;
+ p->addr2 = 0;
+ }
+ else
+ {
+ p->addr_mode = PPC_BREAKPOINT_MODE_RANGE_INCLUSIVE;
+ p->condition_mode = PPC_BREAKPOINT_CONDITION_NONE;
+ p->condition_value = 0;
+
+ /* The watchpoint will trigger if the address of the memory access is
+ within the defined range, as follows: p->addr <= address < p->addr2.
+
+ Note that the above sentence just documents how ptrace interprets
+ its arguments; the watchpoint is set to watch the range defined by
+ the user _inclusively_, as specified by the user interface. */
+ p->addr2 = (uint64_t) addr + len;
+ }
+
+ p->version = PPC_DEBUG_CURRENT_VERSION;
+ p->trigger_type = get_trigger_type (type);
+ p->addr = (uint64_t) addr;
+}
+
+/* Register a watchpoint, to be inserted when the threads of the group of
+ inferior_ptid are next resumed. Returns 0 on success, and -1 if there
+ is no ptrace interface available to install the watchpoint. */
+
+int
+ppc_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
+ enum target_hw_bp_type type,
+ struct expression *cond)
+{
+ m_dreg_interface.detect (inferior_ptid);
+
+ if (m_dreg_interface.unavailable_p ())
+ return -1;
+
+ if (m_dreg_interface.hwdebug_p ())
+ {
+ struct ppc_hw_breakpoint p;
+
+ create_watchpoint_request (&p, addr, len, type, cond, 1);
+
+ register_hw_breakpoint (inferior_ptid.pid (), p);
+ }
+ else
+ {
+ gdb_assert (m_dreg_interface.debugreg_p ());
+
+ long wp_value;
+ long read_mode, write_mode;
+
+ if (linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE)
+ {
+ /* PowerPC 440 requires only the read/write flags to be passed
+ to the kernel. */
+ read_mode = 1;
+ write_mode = 2;
+ }
+ else
+ {
+ /* PowerPC 970 and other DABR-based processors are required to pass
+ the Breakpoint Translation bit together with the flags. */
+ read_mode = 5;
+ write_mode = 6;
+ }
+
+ wp_value = addr & ~(read_mode | write_mode);
+ switch (type)
+ {
+ case hw_read:
+ /* Set read and translate bits. */
+ wp_value |= read_mode;
+ break;
+ case hw_write:
+ /* Set write and translate bits. */
+ wp_value |= write_mode;
+ break;
+ case hw_access:
+ /* Set read, write and translate bits. */
+ wp_value |= read_mode | write_mode;
+ break;
+ }
+
+ register_wp (inferior_ptid.pid (), wp_value);
+ }
+
+ return 0;
+}
+
+/* Clear a registration for a hardware watchpoint. It will be removed
+ from the threads of the group of inferior_ptid when they are next
+ resumed. */
+
+int
+ppc_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len,
+ enum target_hw_bp_type type,
+ struct expression *cond)
+{
+ gdb_assert (!m_dreg_interface.unavailable_p ());
+
+ if (m_dreg_interface.hwdebug_p ())
+ {
+ struct ppc_hw_breakpoint p;
+
+ create_watchpoint_request (&p, addr, len, type, cond, 0);
+
+ clear_hw_breakpoint (inferior_ptid.pid (), p);
+ }
+ else
+ {
+ gdb_assert (m_dreg_interface.debugreg_p ());
+
+ clear_wp (inferior_ptid.pid ());
+ }
+
+ return 0;
+}
+
+/* Clean up the per-process info associated with PID. When using the
+ HWDEBUG interface, we also erase the per-thread state of installed
+ debug registers for all the threads that belong to the group of PID.
+
+ Usually the thread state is cleaned up by low_delete_thread. We also
+ do it here because low_new_thread is not called for the initial LWP,
+ so low_delete_thread won't be able to clean up this state. */
+
+void
+ppc_linux_nat_target::low_forget_process (pid_t pid)
+{
+ if ((!m_dreg_interface.detected_p ())
+ || (m_dreg_interface.unavailable_p ()))
+ return;
+
+ ptid_t pid_ptid (pid, 0, 0);
+
+ m_process_info.erase (pid);
+
+ if (m_dreg_interface.hwdebug_p ())
+ {
+ for (auto it = m_installed_hw_bps.begin ();
+ it != m_installed_hw_bps.end ();)
+ {
+ if (it->first.matches (pid_ptid))
+ it = m_installed_hw_bps.erase (it);
+ else
+ it++;
+ }
+ }
+}
+
+/* Copy the per-process state associated with the pid of PARENT to the
+ sate of CHILD_PID. GDB expects that a forked process will have the
+ same hardware breakpoints and watchpoints as the parent.
+
+ If we're using the HWDEBUG interface, also copy the thread debug
+ register state for the ptid of PARENT to the state for CHILD_PID.
+
+ Like for clone events, we assume the kernel will copy the debug
+ registers from the parent thread to the child. The
+ low_prepare_to_resume function is made to work even if it doesn't.
+
+ We copy the thread state here and not in low_new_thread since we don't
+ have the pid of the parent in low_new_thread. Even if we did,
+ low_new_thread might not be called immediately after the fork event is
+ detected. For instance, with the checkpointing system (see
+ linux-fork.c), the thread won't be added until GDB decides to switch
+ to a new checkpointed process. At that point, the debug register
+ state of the parent thread is unlikely to correspond to the state it
+ had at the point when it forked. */
+
+void
+ppc_linux_nat_target::low_new_fork (struct lwp_info *parent,
+ pid_t child_pid)
+{
+ if ((!m_dreg_interface.detected_p ())
+ || (m_dreg_interface.unavailable_p ()))
+ return;
+
+ auto process_it = m_process_info.find (parent->ptid.pid ());
+
+ if (process_it != m_process_info.end ())
+ m_process_info[child_pid] = m_process_info[parent->ptid.pid ()];
+
+ if (m_dreg_interface.hwdebug_p ())
+ {
+ ptid_t child_ptid (child_pid, child_pid, 0);
+
+ copy_thread_dreg_state (parent->ptid, child_ptid);
+ }
+}
+
+/* Copy the thread debug register state from the PARENT thread to the the
+ state for CHILD_LWP, if we're using the HWDEBUG interface. We assume
+ the kernel copies the debug registers from one thread to another after
+ a clone event. The low_prepare_to_resume function is made to work
+ even if it doesn't. */
+
+void
+ppc_linux_nat_target::low_new_clone (struct lwp_info *parent,
+ pid_t child_lwp)
+{
+ if ((!m_dreg_interface.detected_p ())
+ || (m_dreg_interface.unavailable_p ()))
+ return;
+
+ if (m_dreg_interface.hwdebug_p ())
+ {
+ ptid_t child_ptid (parent->ptid.pid (), child_lwp, 0);
+
+ copy_thread_dreg_state (parent->ptid, child_ptid);
+ }
+}
+
+/* Initialize the arch-specific thread state for LP so that it contains
+ the ptid for lp, so that we can use it in low_delete_thread. Mark the
+ new thread LP as stale so that we update its debug registers before
+ resuming it. This is not called for the initial thread. */
+
+void
+ppc_linux_nat_target::low_new_thread (struct lwp_info *lp)
+{
+ init_arch_lwp_info (lp);
+
+ mark_thread_stale (lp);
+}
+
+/* Delete the per-thread debug register stale flag. */
+
+void
+ppc_linux_nat_target::low_delete_thread (struct arch_lwp_info
+ *lp_arch_info)
+{
+ if (lp_arch_info != NULL)
+ {
+ if (m_dreg_interface.detected_p ()
+ && m_dreg_interface.hwdebug_p ())
+ m_installed_hw_bps.erase (lp_arch_info->lwp_ptid);
+
+ xfree (lp_arch_info);
+ }
+}
+
+/* Install or delete debug registers in thread LP so that it matches what
+ GDB requested before it is resumed. */
+
+void
+ppc_linux_nat_target::low_prepare_to_resume (struct lwp_info *lp)
+{
+ if ((!m_dreg_interface.detected_p ())
+ || (m_dreg_interface.unavailable_p ()))
+ return;
+
+ /* We have to re-install or clear the debug registers if we set the
+ stale flag.
+
+ In addition, some kernels configurations can disable a hardware
+ watchpoint after it is hit. Usually, GDB will remove and re-install
+ a hardware watchpoint when the thread stops if "breakpoint
+ always-inserted" is off, or to single-step a watchpoint. But so
+ that we don't rely on this behavior, if we stop due to a hardware
+ breakpoint or watchpoint, we also refresh our debug registers. */
+
+ arch_lwp_info *lp_arch_info = get_arch_lwp_info (lp);
+
+ bool stale_dregs = (lp->stop_reason == TARGET_STOPPED_BY_WATCHPOINT
+ || lp->stop_reason == TARGET_STOPPED_BY_HW_BREAKPOINT
+ || lp_arch_info->debug_regs_stale);
+
+ if (!stale_dregs)
+ return;
+
+ gdb_assert (lp->ptid.lwp_p ());
+
+ auto process_it = m_process_info.find (lp->ptid.pid ());
+
+ if (m_dreg_interface.hwdebug_p ())
+ {
+ /* First, delete any hardware watchpoint or breakpoint installed in
+ the inferior and update the thread state. */
+ auto installed_it = m_installed_hw_bps.find (lp->ptid);
+
+ if (installed_it != m_installed_hw_bps.end ())
+ {
+ auto &bp_list = installed_it->second;
+
+ for (auto bp_it = bp_list.begin (); bp_it != bp_list.end ();)
+ {
+ /* We ignore ENOENT to account for various possible kernel
+ behaviors, e.g. the kernel might or might not copy debug
+ registers across forks and clones, and we always copy
+ the debug register state when fork and clone events are
+ detected. */
+ if (ptrace (PPC_PTRACE_DELHWDEBUG, lp->ptid.lwp (), 0,
+ bp_it->first) == -1)
+ if (errno != ENOENT)
+ perror_with_name (_("Error deleting hardware "
+ "breakpoint or watchpoint"));
+
+ /* We erase the entries one at a time after successfuly
+ removing the corresponding slot form the thread so that
+ if we throw an exception above in a future iteration the
+ map remains consistent. */
+ bp_it = bp_list.erase (bp_it);
+ }
+
+ gdb_assert (bp_list.empty ());
+ }
+
+ /* Now we install all the requested hardware breakpoints and
+ watchpoints and update the thread state. */
+
+ if (process_it != m_process_info.end ())
+ {
+ auto &bp_list = m_installed_hw_bps[lp->ptid];
+
+ for (ppc_hw_breakpoint bp
+ : process_it->second.requested_hw_bps)
+ {
+ long slot = ptrace (PPC_PTRACE_SETHWDEBUG, lp->ptid.lwp (),
+ 0, &bp);
+
+ if (slot < 0)
+ perror_with_name (_("Error setting hardware "
+ "breakpoint or watchpoint"));
+
+ /* Keep track of which slots we installed in this
+ thread. */
+ bp_list.emplace (bp_list.begin (), slot, bp);
+ }
+ }
+ }
+ else
+ {
+ gdb_assert (m_dreg_interface.debugreg_p ());
+
+ /* Passing 0 to PTRACE_SET_DEBUGREG will clear the
+ watchpoint. */
+ long wp = 0;
+
+ /* GDB requested a watchpoint to be installed. */
+ if (process_it != m_process_info.end ()
+ && process_it->second.requested_wp_val.has_value ())
+ wp = *(process_it->second.requested_wp_val);
+
+ long ret = ptrace (PTRACE_SET_DEBUGREG, lp->ptid.lwp (),
+ 0, wp);
+
+ if (ret == -1)
+ perror_with_name (_("Error setting hardware watchpoint"));
+ }
+
+ lp_arch_info->debug_regs_stale = false;
+}
+
+/* Return true if INFERIOR_PTID is known to have been stopped by a
+ hardware watchpoint, false otherwise. If true is returned, write the
+ address that the kernel reported as causing the SIGTRAP in ADDR_P. */
+
+bool
+ppc_linux_nat_target::low_stopped_data_address (CORE_ADDR *addr_p)
+{
+ siginfo_t siginfo;
+
+ if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
+ return false;
+
+ if (siginfo.si_signo != SIGTRAP
+ || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
+ return false;
+
+ gdb_assert (!m_dreg_interface.unavailable_p ());
+
+ /* Check if this signal corresponds to a hardware breakpoint. We only
+ need to check this if we're using the HWDEBUG interface, since the
+ DEBUGREG interface only allows setting one hardware watchpoint. */
+ if (m_dreg_interface.hwdebug_p ())
+ {
+ /* The index (or slot) of the *point is passed in the si_errno
+ field. Currently, this is only the case if the kernel was
+ configured with CONFIG_PPC_ADV_DEBUG_REGS. If not, we assume
+ the kernel will set si_errno to a value that doesn't correspond
+ to any real slot. */
+ int slot = siginfo.si_errno;
+
+ auto installed_it = m_installed_hw_bps.find (inferior_ptid);
+
+ /* We must have installed slots for the thread if it got a
+ TRAP_HWBKPT signal. */
+ gdb_assert (installed_it != m_installed_hw_bps.end ());
+
+ for (const auto & slot_bp_pair : installed_it->second)
+ if (slot_bp_pair.first == slot
+ && (slot_bp_pair.second.trigger_type
+ == PPC_BREAKPOINT_TRIGGER_EXECUTE))
+ return false;
+ }
+
+ *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
+ return true;
+}
+
+/* Return true if INFERIOR_PTID is known to have been stopped by a
+ hardware watchpoint, false otherwise. */
+
+bool
+ppc_linux_nat_target::low_stopped_by_watchpoint ()
+{
+ CORE_ADDR addr;
+ return low_stopped_data_address (&addr);
+}
+
+bool
+ppc_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
+ CORE_ADDR start,
+ int length)
+{
+ gdb_assert (!m_dreg_interface.unavailable_p ());
+
+ int mask;
+
+ if (m_dreg_interface.hwdebug_p ()
+ && linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE)
+ return start <= addr && start + length >= addr;
+ else if (linux_get_hwcap (current_top_target ()) & PPC_FEATURE_BOOKE)
+ mask = 3;
+ else
+ mask = 7;
+
+ addr &= ~mask;
+
+ /* Check whether [start, start+length-1] intersects [addr, addr+mask]. */
+ return start <= addr + mask && start + length - 1 >= addr;
+}
+
+/* Return the number of registers needed for a masked hardware watchpoint. */
+
+int
+ppc_linux_nat_target::masked_watch_num_registers (CORE_ADDR addr,
+ CORE_ADDR mask)
+{
+ m_dreg_interface.detect (inferior_ptid);
+
+ if (!m_dreg_interface.hwdebug_p ()
+ || (m_dreg_interface.hwdebug_info ().features
+ & PPC_DEBUG_FEATURE_DATA_BP_MASK) == 0)
+ return -1;
+ else if ((mask & 0xC0000000) != 0xC0000000)
+ {
+ warning (_("The given mask covers kernel address space "
+ "and cannot be used.\n"));
+
+ return -2;
+ }
+ else
+ return 2;
+}
+
+/* Copy the per-thread debug register state, if any, from thread
+ PARENT_PTID to thread CHILD_PTID, if the debug register being used is
+ HWDEBUG. */
+
+void
+ppc_linux_nat_target::copy_thread_dreg_state (const ptid_t &parent_ptid,
+ const ptid_t &child_ptid)
+{
+ gdb_assert (m_dreg_interface.hwdebug_p ());
+
+ auto installed_it = m_installed_hw_bps.find (parent_ptid);
+
+ if (installed_it != m_installed_hw_bps.end ())
+ m_installed_hw_bps[child_ptid] = m_installed_hw_bps[parent_ptid];
+}
+
+/* Mark the debug register stale flag for the new thread, if we have
+ already detected which debug register interface we use. */
+
+void
+ppc_linux_nat_target::mark_thread_stale (struct lwp_info *lp)
+{
+ if ((!m_dreg_interface.detected_p ())
+ || (m_dreg_interface.unavailable_p ()))
+ return;
+
+ arch_lwp_info *lp_arch_info = get_arch_lwp_info (lp);
+
+ lp_arch_info->debug_regs_stale = true;
+}
+
+/* Mark all the threads of the group of PID as stale with respect to
+ debug registers and issue a stop request to each such thread that
+ isn't already stopped. */
+
+void
+ppc_linux_nat_target::mark_debug_registers_changed (pid_t pid)
+{
+ /* We do this in two passes to make sure all threads are marked even if
+ we get an exception when stopping one of them. */
+
+ iterate_over_lwps (ptid_t (pid),
+ [this] (struct lwp_info *lp) -> int {
+ this->mark_thread_stale (lp);
+ return 0;
+ });
+
+ iterate_over_lwps (ptid_t (pid),
+ [] (struct lwp_info *lp) -> int {
+ if (!lwp_is_stopped (lp))
+ linux_stop_lwp (lp);
+ return 0;
+ });
+}
+
+/* Register a hardware breakpoint or watchpoint BP for the pid PID, then
+ mark the stale flag for all threads of the group of PID, and issue a
+ stop request for them. The breakpoint or watchpoint will be installed
+ the next time each thread is resumed. Should only be used if the
+ debug register interface is HWDEBUG. */
+
+void
+ppc_linux_nat_target::register_hw_breakpoint (pid_t pid,
+ const struct
+ ppc_hw_breakpoint &bp)
+{
+ gdb_assert (m_dreg_interface.hwdebug_p ());
+
+ m_process_info[pid].requested_hw_bps.push_back (bp);
+
+ mark_debug_registers_changed (pid);
+}
+
+/* Clear a registration for a hardware breakpoint or watchpoint BP for
+ the pid PID, then mark the stale flag for all threads of the group of
+ PID, and issue a stop request for them. The breakpoint or watchpoint
+ will be removed the next time each thread is resumed. Should only be
+ used if the debug register interface is HWDEBUG. */
+
+void
+ppc_linux_nat_target::clear_hw_breakpoint (pid_t pid,
+ const struct ppc_hw_breakpoint &bp)
+{
+ gdb_assert (m_dreg_interface.hwdebug_p ());
+
+ auto process_it = m_process_info.find (pid);
+
+ gdb_assert (process_it != m_process_info.end ());
+
+ auto bp_it = std::find_if (process_it->second.requested_hw_bps.begin (),
+ process_it->second.requested_hw_bps.end (),
+ [&bp, this]
+ (const struct ppc_hw_breakpoint &curr)
+ { return hwdebug_point_cmp (bp, curr); }
+ );
+
+ /* If GDB is removing a watchpoint, it must have been inserted. */
+ gdb_assert (bp_it != process_it->second.requested_hw_bps.end ());
+
+ process_it->second.requested_hw_bps.erase (bp_it);
+
+ mark_debug_registers_changed (pid);
+}
+
+/* Register the hardware watchpoint value WP_VALUE for the pid PID,
+ then mark the stale flag for all threads of the group of PID, and
+ issue a stop request for them. The breakpoint or watchpoint will be
+ installed the next time each thread is resumed. Should only be used
+ if the debug register interface is DEBUGREG. */
+
+void
+ppc_linux_nat_target::register_wp (pid_t pid, long wp_value)
+{
+ gdb_assert (m_dreg_interface.debugreg_p ());
+
+ /* Our other functions should have told GDB that we only have one
+ hardware watchpoint with this interface. */
+ gdb_assert (!m_process_info[pid].requested_wp_val.has_value ());
+
+ m_process_info[pid].requested_wp_val.emplace (wp_value);
+
+ mark_debug_registers_changed (pid);
+}
+
+/* Clear the hardware watchpoint registration for the pid PID, then mark
+ the stale flag for all threads of the group of PID, and issue a stop
+ request for them. The breakpoint or watchpoint will be installed the
+ next time each thread is resumed. Should only be used if the debug
+ register interface is DEBUGREG. */
+
+void
+ppc_linux_nat_target::clear_wp (pid_t pid)
+{
+ gdb_assert (m_dreg_interface.debugreg_p ());
+
+ auto process_it = m_process_info.find (pid);
+
+ gdb_assert (process_it != m_process_info.end ());
+ gdb_assert (process_it->second.requested_wp_val.has_value ());
+
+ process_it->second.requested_wp_val.reset ();
+
+ mark_debug_registers_changed (pid);
+}
+
+/* Initialize the arch-specific thread state for LWP, if it not already
+ created. */
+
+void
+ppc_linux_nat_target::init_arch_lwp_info (struct lwp_info *lp)
+{
+ if (lwp_arch_private_info (lp) == NULL)
+ {
+ lwp_set_arch_private_info (lp, XCNEW (struct arch_lwp_info));
+ lwp_arch_private_info (lp)->debug_regs_stale = false;
+ lwp_arch_private_info (lp)->lwp_ptid = lp->ptid;
+ }
+}
+
+/* Get the arch-specific thread state for LWP, creating it if
+ necessary. */
+
+arch_lwp_info *
+ppc_linux_nat_target::get_arch_lwp_info (struct lwp_info *lp)
+{
+ init_arch_lwp_info (lp);
+
+ return lwp_arch_private_info (lp);
+}
+
+void _initialize_ppc_linux_nat ();
+void
+_initialize_ppc_linux_nat ()
+{
+ linux_target = &the_ppc_linux_nat_target;