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x2apic: fix reserved APIC register accesses in print_local_APIC()
[deliverable/linux.git]
/
include
/
asm-x86
/
apic.h
diff --git
a/include/asm-x86/apic.h
b/include/asm-x86/apic.h
index bc2e364bdb1007c12a4c22e3a8e48a14393eef61..ef1d72dbdfe02b74d389c2067af12373db2cd3de 100644
(file)
--- a/
include/asm-x86/apic.h
+++ b/
include/asm-x86/apic.h
@@
-40,8
+40,6
@@
extern void generic_apic_probe(void);
extern unsigned int apic_verbosity;
extern int local_apic_timer_c2_ok;
extern unsigned int apic_verbosity;
extern int local_apic_timer_c2_ok;
-extern int ioapic_force;
-
extern int disable_apic;
/*
* Basic functions accessing APICs.
extern int disable_apic;
/*
* Basic functions accessing APICs.
@@
-54,6
+52,11
@@
extern int disable_apic;
#endif
extern int is_vsmp_box(void);
#endif
extern int is_vsmp_box(void);
+extern void xapic_wait_icr_idle(void);
+extern u32 safe_xapic_wait_icr_idle(void);
+extern u64 xapic_icr_read(void);
+extern void xapic_icr_write(u32, u32);
+extern int setup_profiling_timer(unsigned int);
static inline void native_apic_mem_write(u32 reg, u32 v)
{
static inline void native_apic_mem_write(u32 reg, u32 v)
{
@@
-95,6
+98,20
@@
extern void check_x2apic(void);
extern void enable_x2apic(void);
extern void enable_IR_x2apic(void);
extern void x2apic_icr_write(u32 low, u32 id);
extern void enable_x2apic(void);
extern void enable_IR_x2apic(void);
extern void x2apic_icr_write(u32 low, u32 id);
+static inline int x2apic_enabled(void)
+{
+ int msr, msr2;
+
+ if (!cpu_has_x2apic)
+ return 0;
+
+ rdmsr(MSR_IA32_APICBASE, msr, msr2);
+ if (msr & X2APIC_ENABLE)
+ return 1;
+ return 0;
+}
+#else
+#define x2apic_enabled() 0
#endif
struct apic_ops {
#endif
struct apic_ops {
@@
-129,9
+146,7
@@
static inline void ack_x2APIC_irq(void)
static inline void ack_APIC_irq(void)
{
/*
static inline void ack_APIC_irq(void)
{
/*
- * ack_APIC_irq() actually gets compiled as a single instruction:
- * - a single rmw on Pentium/82489DX
- * - a single write on P6+ cores (CONFIG_X86_GOOD_APIC)
+ * ack_APIC_irq() actually gets compiled as a single instruction
* ... yummie.
*/
* ... yummie.
*/
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