+#define AARCH64_FEATURE_V8_5 0x2000000000ULL /* ARMv8.5 processors. */
+#define AARCH64_FEATURE_V8_6 0x00000002 /* ARMv8.6 processors. */
+#define AARCH64_FEATURE_BFLOAT16 0x00000004 /* Bfloat16 insns. */
+
+/* Flag Manipulation insns. */
+#define AARCH64_FEATURE_FLAGMANIP 0x4000000000ULL
+/* FRINT[32,64][Z,X] insns. */
+#define AARCH64_FEATURE_FRINTTS 0x8000000000ULL
+/* SB instruction. */
+#define AARCH64_FEATURE_SB 0x10000000000ULL
+/* Execution and Data Prediction Restriction instructions. */
+#define AARCH64_FEATURE_PREDRES 0x20000000000ULL
+/* DC CVADP. */
+#define AARCH64_FEATURE_CVADP 0x40000000000ULL
+/* Random Number instructions. */
+#define AARCH64_FEATURE_RNG 0x80000000000ULL
+/* BTI instructions. */
+#define AARCH64_FEATURE_BTI 0x100000000000ULL
+/* SCXTNUM_ELx. */
+#define AARCH64_FEATURE_SCXTNUM 0x200000000000ULL
+/* ID_PFR2 instructions. */
+#define AARCH64_FEATURE_ID_PFR2 0x400000000000ULL
+/* SSBS mechanism enabled. */
+#define AARCH64_FEATURE_SSBS 0x800000000000ULL
+/* Memory Tagging Extension. */
+#define AARCH64_FEATURE_MEMTAG 0x1000000000000ULL
+/* Transactional Memory Extension. */
+#define AARCH64_FEATURE_TME 0x2000000000000ULL
+
+/* SVE2 instructions. */
+#define AARCH64_FEATURE_SVE2 0x000000010
+#define AARCH64_FEATURE_SVE2_AES 0x000000080
+#define AARCH64_FEATURE_SVE2_BITPERM 0x000000100
+#define AARCH64_FEATURE_SVE2_SM4 0x000000200
+#define AARCH64_FEATURE_SVE2_SHA3 0x000000400