+#define OPERAND_SIGNED (0x10000)
+
+/* special accumulator shifts need a 4-bit number */
+/* 1 <= x <= 16 */
+#define OPERAND_SHIFT (0x20000)
+
+/* general purpose register */
+#define OPERAND_GPR (0x40000)
+
+/* special imm3 values with range restricted to -2 <= imm3 <= 3 */
+/* needed for rac/rachi */
+#define RESTRICTED_NUM3 (0x80000)
+
+/* Pre-decrement is only supported for SP. */
+#define OPERAND_SP (0x100000)
+
+/* Post-decrement is not supported for SP. Like OPERAND_EVEN, and
+ unlike OPERAND_SP, this flag doesn't prevent the instruction from
+ matching, it only fails validation later on. */
+#define OPERAND_NOSP (0x200000)