+ * ia64-dis.c (print_insn_ia64): Call ia64_free_opcode at end.
+
+2000-07-28 Ben Elliston <bje@redhat.com>
+
+ * Makefile.am (CGEN, CGENDEPS, CGENDIR, CGENFLAGS): New.
+ (run-cgen, stamp-m32r, stamp-fr30): New targets.
+ * Makefile.in: Regenerate.
+ * configure.in: Add --enable-cgen-maint option.
+ * configure: Regenerate.
+
+2000-07-26 Dave Brolley <brolley@redhat.com>
+
+ * cgen-opc.c (cgen_hw_lookup_by_name): 'i' is now unsigned.
+ (cgen_hw_lookup_by_num): Ditto.
+ (cgen_operand_lookup_by_name): Ditto.
+ (print_address): Ditto.
+ (print_keyword): Ditto.
+ * cgen-dis.c (hash_insn_array): Mark unused parameters with
+ ATTRIBUTE_UNUSED.
+ * cgen-asm.c (hash_insn_array): Mark unused parameters with
+ ATTRIBUTE_UNUSED.
+ (cgen_parse_keyword): Ditto.
+
+2000-07-22 Jason Eckhardt <jle@cygnus.com>
+
+ * i860-dis.c: New file.
+ (print_insn_i860): New function.
+ (print_br_address): New function.
+ (sign_extend): New function.
+ (BITWISE_OP): New macro.
+ (I860_REG_PREFIX): New macro.
+ (grnames, frnames, crnames): New structures.
+
+ * disassemble.c (ARCH_i860): Define.
+ (disassembler): Add check for bfd_arch_i860 to set disassemble
+ function to print_insn_i860.
+
+ * Makefile.in (CFILES): Added i860-dis.c.
+ (ALL_MACHINES): Added i860-dis.lo.
+ (i860-dis.lo): New dependences.
+
+ * configure.in: New bits for bfd_i860_arch.
+
+ * configure: Regenerated.
+
+2000-07-20 Hans-Peter Nilsson <hp@axis.com>
+
+ * Makefile.am (CFILES): Add cris-dis.c and cris-opc.c.
+ (ALL_MACHINES): Add cris-dis.lo and cris-opc.lo.
+ (cris-dis.lo, cris-opc.lo): New rules.
+ * Makefile.in: Rebuild.
+ * configure.in (bfd_cris_arch): New target.
+ * configure: Rebuild.
+ * disassemble.c (ARCH_cris): Define.
+ (disassembler): Support ARCH_cris.
+ * cris-dis.c, cris-opc.c: New files.
+ * po/POTFILES.in, po/opcodes.pot: Regenerate.
+
+2000-07-11 Jakub Jelinek <jakub@redhat.com>
+
+ * sparc-opc.c (sparc_opcodes): popc has 0 in rs1, not rs2.
+ Reported by Bill Clarke <llib@computer.org>.
+
+2000-07-09 Geoffrey Keating <geoffk@cygnus.com>
+
+ * ppc-opc.c (powerpc_opcodes): Correct suffix for vslw.
+ Patch by Randall J Fisher <rfisher@ecn.purdue.edu>.
+
+2000-07-09 Alan Modra <alan@linuxcare.com.au>
+
+ * hppa-dis.c (fput_reg, fput_fp_reg, fput_fp_reg_r, fput_creg,
+ fput_const, extract_3, extract_5_load, extract_5_store,
+ extract_5r_store, extract_5R_store, extract_10U_store,
+ extract_5Q_store, extract_11, extract_14, extract_16, extract_21,
+ extract_12, extract_17, extract_22): Prototype.
+ (print_insn_hppa): Rename inner block opcode -> opc to avoid
+ shadowing outer block.
+ (GET_BIT): Define.
+
+2000-07-05 DJ Delorie <dj@redhat.com>
+
+ * MAINTAINERS: new
+
+2000-07-04 Alexandre Oliva <aoliva@redhat.com>
+
+ * arm-dis.c (print_insn_arm): Output combinations of PSR flags.
+
+2000-07-03 Marek Michalkiewicz <marekm@linux.org.pl>
+
+ * avr-dis.c (avr_operand): Change _ () to _() around all strings
+ marked for translation (exception from the usual coding style).
+ (print_insn_avr): Initialize insn2 to avoid warnings.
+
+2000-07-03 Kazu Hirata <kazu@hxi.com>
+
+ * h8300-dis.c (bfd_h8_disassemble): Improve readability.
+ * h8500-dis.c: Fix formatting.
+
+2000-07-01 Alan Modra <alan@linuxcare.com.au>
+
+ * Makefile.am (DEP): Fix 2000-06-22. grep after running dep.sed
+ (CLEANFILES): Add DEPA.
+ * Makefile.in: Regenerate.
+
+2000-06-26 Scott Bambrough <scottb@netwinder.org>
+
+ * arm-dis.c (regnames): Add an additional register set to match
+ the set used by GCC. Make it the default.
+
+2000-06-22 Alan Modra <alan@linuxcare.com.au>
+
+ * Makefile.am (DEP): grep for leading `/' in DEP1, and fail if we
+ find one.
+ * Makefile.in: Regenerate.
+
+2000-06-20 H.J. Lu <hjl@gnu.org>
+
+ * Makefile.am: Rebuild dependency.
+ * Makefile.in: Rebuild.
+
+2000-06-18 Stephane Carrez <stcarrez@worldnet.fr>
+
+ * Makefile.in, configure: regenerate
+ * disassemble.c (disassembler): Recognize ARCH_m68hc12,
+ ARCH_m68hc11.
+ * m68hc11-dis.c (read_memory, print_insn, print_insn_m68hc12):
+ New functions.
+ * configure.in: Recognize m68hc12 and m68hc11.
+ * m68hc11-dis.c, m68hc11-opc.c: New files for support of m68hc1x
+ * Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
+ and opcode generation for m68hc11 and m68hc12.
+
+2000-06-16 Nick Duffek <nsd@redhat.com>
+
+ * disassemble.c (disassembler): Refer to the PowerPC 620 using
+ bfd_mach_ppc_620 instead of 620.
+
+2000-06-12 Kazu Hirata <kazu@hxi.com>
+
+ * h8300-dis.c: Fix formatting.
+ (bfd_h8_disassemble): Distinguish adds/subs, inc/dec.[wl]
+ correctly.
+
+Fri Jun 9 21:49:02 2000 Denis Chertykov <denisc@overta.ru>
+
+ * avr-dis.c (avr_operand): Bugfix for jmp/call address.
+
+Wed Jun 7 21:36:45 2000 Denis Chertykov <denisc@overta.ru>
+
+ * avr-dis.c: completely rewritten.
+
+2000-06-02 Kazu Hirata <kazu@hxi.com>
+
+ * h8300-dis.c: Follow the GNU coding style.
+ (bfd_h8_disassemble) Fix a typo.
+
+2000-06-01 Kazu Hirata <kazu@hxi.com>
+
+ * h8300-dis.c (bfd_h8_disassemble_init): Fix a typo.
+ (bfd_h8_disassemble): Distinguish the operand size of inc/dev.[wl]
+ correctly. Fix a typo.
+
+2000-05-31 Nick Clifton <nickc@cygnus.com>
+
+ * opintl.h (_(String)): Explain why dgettext is used instead of
+ gettext.
+
+2000-05-30 Nick Clifton <nickc@cygnus.com>
+
+ * opintl.h (gettext, dgettext, dcgettext, textdomain,
+ bindtextdomain): Replace defines with those from intl/libgettext.h
+ to quieten gcc warnings.
+
+2000-05-26 Alan Modra <alan@linuxcare.com.au>
+
+ * Makefile.am: Update dependencies with "make dep-am"
+ * Makefile.in: Regenerate.
+
+Thu May 25 22:53:20 2000 Alexandre Oliva <aoliva@cygnus.com>
+
+ * m10300-dis.c (disassemble): Don't assume 32-bit longs when
+ sign-extending operands.
+
+Mon May 15 15:18:07 2000 Donald Lindsay <dlindsay@cygnus.com>
+
+ * d10v-opc.c (d10v_opcodes): add ALONE tag to all short branches
+ except brf's.
+
+2000-05-21 Nick Clifton <nickc@cygnus.com>
+
+ * Makefile.am (LIBIBERTY): Define.
+
+Fri May 19 12:29:27 EDT 2000 Diego Novillo <dnovillo@redhat.com>
+
+ * mips-dis.c (REGISTER_NAMES): Rename to STD_REGISTER_NAMES.
+ (STD_REGISTER_NAMES): New name for REGISTER_NAMES.
+ (reg_names): Rename to std_reg_names. Change it to a char **
+ static variable.
+ (std_reg_names): New name for reg_names.
+ (set_mips_isa_type): Set reg_names to point to std_reg_names by
+ default.
+
+2000-05-16 Frank Ch. Eigler <fche@redhat.com>
+
+ * fr30-desc.h: Partially regenerated to account for changed
+ CGEN_MAX_* -> CGEN_ACTUAL_MAX_* macros.
+ * m32r-desc.h: Ditto.
+
+2000-05-15 Nick Clifton <nickc@cygnus.com>
+
+ * arm-opc.h: Use upper case for flasg in MSR and MRS
+ instructions. Allow any bit to be set in the field_mask of
+ the MSR instruction.
+
+ * arm-dis.c (print_insn_arm): Decode _x and _s bits of the
+ field_mask of an MSR instruction.
+
+2000-05-11 Thomas de Lellis <tdel@windriver.com>
+
+ * arm-opc.c: Disassembly of thumb ldsb/ldsh
+ instructions changed to ldrsb/ldrsh.
+
+2000-05-11 Ulf Carlsson <ulfc@engr.sgi.com>
+
+ * mips-dis.c (print_insn_arg): Don't mask top 32 bits of 64-bit
+ target addresses for 'jal' and 'j'.
+
+2000-05-10 Geoff Keating <geoffk@cygnus.com>
+
+ * ppc-opc.c (powerpc_opcodes): Make the predicted-branch opcodes
+ also available in common mode when powerpc syntax is being used.
+
+2000-05-08 Alan Modra <alan@linuxcare.com.au>
+
+ * m68k-dis.c (dummy_printer): Add ATTRIBUTE_UNUSED to args.
+ (dummy_print_address): Ditto.
+
+2000-05-04 Timothy Wall <twall@cygnus.com>
+
+ * tic54x-opc.c: New.
+ * tic54x-dis.c: New.
+ * disassemble.c (disassembler): Add ARCH_tic54x.
+ * configure.in: Added tic54x target.
+ * configure: Ditto.
+ * Makefile.am: Add tic54x dependencies.
+ * Makefile.in: Ditto.
+
+2000-05-03 J.T. Conklin <jtc@redback.com>
+
+ * ppc-opc.c (VA, VB, VC, VD, VS, SIMM, UIMM, SHB): New macros, for
+ vector unit operands.
+ (VX, VX_MASK, VXA, VXA_MASK, VXR, VXR_MASK): New macros, for vector
+ unit instruction formats.
+ (PPCVEC): New macro, mask for vector instructions.
+ (powerpc_operands): Add table entries for above operand types.
+ (powerpc_opcodes): Add table entries for vector instructions.
+
+ * ppc-dis.c (print_insn_big_powerpc): Add PPC_OPCODE_ALTIVEC to mask.
+ (print_insn_little_powerpc): Likewise.
+ (print_insn_powerpc): Prepend 'v' when printing vector registers.
+
+Sun Apr 23 17:54:14 2000 Denis Chertykov <denisc@overta.ru>
+
+ * avr-dis.c (reg_fmul_d): New. Extract destination register from
+ FMUL instruction.
+ (reg_fmul_r): New. Extract source register from FMUL instruction.
+ (reg_muls_d): New. Extract destination register from MULS instruction.
+ (reg_muls_r): New. Extract source register from MULS instruction.
+ (reg_movw_d): New. Extract destination register from MOVW instruction.
+ (reg_movw_r): New. Extract source register from MOVW instruction.
+ (print_insn_avr): Handle MOVW, MULS, MULSU, FMUL, FMULS, FMULSU,
+ EICALL, EIJMP, LPM r,Z, ELPM r,Z, SPM, ESPM instructions.
+
+Mon Apr 24 15:21:35 2000 Clinton Popetz <cpopetz@cygnus.com>
+
+ * configure.in: Add bfd_powerpc_64_arch.
+ * disassemble.c (disassembler): Use print_insn_big_powerpc for
+ 64 bit code.
+
+2000-04-24 Nick Clifton <nickc@cygnus.com>
+
+ * fr30-desc.c (fr30_cgen_cpu_open): Initialise signed_overflow
+ field.
+
+2000-04-22 Timothy Wall <twall@cygnus.com>
+
+ * ia64-gen.c (general): Add an ordered table of primary
+ opcode names, as well as priority fields to disassembly data
+ structures to enforce a preferred disassembly format based on the
+ ordering of the opcode tables.
+ (load_insn_classes): Show a useful message if IC tables are missing.
+ (load_depfile): Ditto.
+ * ia64-asmtab.h (struct ia64_dis_names ): Add priority flag to
+ distinguish preferred disassembly.
+ * ia64-opc-f.c: Reorder some insn for preferred disassembly
+ format. Fix incorrect flag on fma.s/fma.s.s0.
+ * ia64-opc.c: Scan *all* disassembly matches and use the one with
+ the highest priority.
+ * ia64-opc-b.c: Use more abbreviations.
+ * ia64-asmtab.c: Regenerate.
+
+Fri Apr 21 16:03:39 2000 Jason Eckhardt <jle@cygnus.com>
+
+ * hppa-dis.c (extract_16): New function.
+ (print_insn_hppa): Fix incorrect handling of 'fe'. Added handling of
+ new operand types l,y,&,fe,fE,fx.
+
+Fri Apr 21 13:20:53 2000 Richard Henderson <rth@cygnus.com>
+ David Mosberger <davidm@hpl.hp.com>
+ Timothy Wall <twall@cygnus.com>
+ Bob Manson <manson@charmed.cygnus.com>
+ Jim Wilson <wilson@cygnus.com>
+
+ * Makefile.am (HFILES): Add ia64-asmtab.h, ia64-opc.h.
+ (CFILES): Add ia64-dis.c, ia64-opc-a.c, ia64-opc-b.c, ia64-opc-f.c,
+ ia64-opc-i.c, ia64-opc-m.c, ia64-opc-d.c, ia64-opc.c, ia64-gen.c,
+ ia64-asmtab.c.
+ (ALL_MACHINES): Add ia64-dis.lo, ia64-opc.lo.
+ (ia64-ic.tbl, ia64-raw.tbl, ia64-waw.tbl, ia64-war.tbl, ia64-gen,
+ ia64-gen.o, ia64-asmtab.c, ia64-dis.lo, ia64-opc.lo): New rules.
+ * Makefile.in: Rebuild.
+ * configure Rebuild.
+ * configure.in (bfd_ia64_arch): New target.
+ * disassemble.c (ARCH_ia64): Define.
+ (disassembler): Support ARCH_ia64.
+ * ia64-asmtab.c, ia64-asmtab.h, ia64-dis.c, ia64-gen.c ia64-ic.tbl,
+ ia64-opc-a.c, ia64-opc-b.c, ia64-opc-d.c ia64-opc-f.c, ia64-opc-i.c,
+ ia64-opc-m.c, ia64-opc-x.c, ia64-opc.c, ia64-opc.h, ia64-raw.tbl,
+ ia64-war.tbl, ia64-waw.tbl): New files.
+
+2000-04-20 Alexandre Oliva <aoliva@cygnus.com>
+
+ * m10300-dis.c (HAVE_AM30, HAVE_AM33): Define.
+ (disassemble): Use them.
+
+2000-04-14 Alan Modra <alan@linuxcare.com.au>
+
+ * sysdep.h: Include "ansidecl.h" not <ansidecl.h>
+ * Makefile.am: Update dependencies.
+ * Makefile.in: Regenerate.
+
+2000-04-14 Michael Sokolov <msokolov@ivan.Harhan.ORG>
+
+ * a29k-dis.c, alpha-dis.c, alpha-opc.c, arc-dis.c, arc-opc.c,
+ avr-dis.c, d10v-dis.c, d10v-opc.c, d30v-dis.c, d30v-opc.c,
+ disassemble.c, h8300-dis.c, h8500-dis.c, hppa-dis.c, i370-dis.c,
+ i370-opc.c, i960-dis.c, m10200-dis.c, m10200-opc.c, m10300-dis.c,
+ m10300-opc.c, m68k-dis.c, m68k-opc.c, m88k-dis.c, mcore-dis.c,
+ mips-dis.c, mips-opc.c, mips16-opc.c, pj-dis.c, pj-opc.c,
+ ppc-dis.c, ppc-opc.c, sh-dis.c, sparc-dis.c, sparc-opc.c,
+ tic80-dis.c, tic80-opc.c, v850-dis.c, v850-opc.c, vax-dis.c,
+ w65-dis.c, z8k-dis.c, z8kgen.c: Include sysdep.h. Remove
+ ansidecl.h as sysdep.h includes it.
+
+Fri Apr 7 15:56:57 2000 Andrew Cagney <cagney@b1.cygnus.com>
+
+ * configure.in (WARN_CFLAGS): Set to -W -Wall by default. Add
+ --enable-build-warnings option.
+ * Makefile.am (AM_CFLAGS, WARN_CFLAGS): Add definitions.
+ * Makefile.in, configure: Re-generate.
+
+Wed Apr 5 22:28:18 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * sh-opc.c (sh_table): Use A_DISP_PC / PCRELIMM_8BY2 for ldre & ldrs.
+ stc GBR,@-<REG_N> is available for arch_sh1_up.
+ Group parallel processing insn with identical mnemonics together.
+ Make three-operand psha / pshl come first.
+
+Wed Apr 5 22:05:40 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * sh-opc.h (sh_nibble_type): Remove DISP_8 and DISP_4.
+ Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
+ (sh_arg_type): Add A_PC.
+ (sh_table): Update entries using immediates. Add repeat.
+ * sh-dis.c (print_insn_shx): Remove DISP_8 and DISP_4.
+ Split IMM_[48]{,BY[24]} into IMM[01]_[48]{,BY[24]}. Add REPEAT.
+
+2000-04-04 Alan Modra <alan@linuxcare.com.au>
+
+ * po/opcodes.pot: Regenerate.
+
+ * Makefile.am (MKDEP): Use gcc -MM rather than mkdep.
+ (DEP): Quote when passing vars to sub-make. Add warning message
+ to end.
+ (DEP1): Rewrite for "gcc -MM".
+ (CLEANFILES): Add DEP2.
+ Update dependencies.
+ * Makefile.in: Regenerate.
+
+2000-04-03 Denis Chertykov <denisc@overta.ru>
+
+ * avr-dis.c: Syntax cleanup.
+ (add0fff): Print the pc relative address as a signed number.
+ (add03f8): Likewise.
+
+2000-04-01 Ian Lance Taylor <ian@zembu.com>
+
+ * disassemble.c (disassembler_usage): Don't use a prototype. Mark
+ the parameter ATTRIBUTE_UNUSED.
+ * ppc-opc.c: Add ATTRIBUTE_UNUSED as needed.
+
+2000-04-01 Alexandre Oliva <aoliva@cygnus.com>
+
+ * m10300-opc.c: SP-based offsets are always unsigned.
+
+2000-03-29 Thomas de Lellis <tdel@windriver.com>
+
+ * arm-opc.h (thumb_opcodes): Disassemble 0xde.. to "bal"
+ [branch always] instead of "undefined".
+
+2000-03-27 Nick Clifton <nickc@cygnus.com>
+
+ * d30v-opc.c (d30v_format_table): Move SHORT_AR to end of list of
+ short instructions, from end of list of long instructions.
+
+2000-03-27 Ian Lance Taylor <ian@zembu.com>
+
+ * Makefile.am (CFILES): Add avr-dis.c.
+ (ALL_MACHINES): Add avr-dis.lo.
+
+2000-03-27 Alan Modra <alan@linuxcare.com>
+
+ * avr-dis.c (add0fff, add03f8): Don't use structure bitfields to
+ truncate integers.
+ (print_insn_avr): Call function via pointer in K&R compatible way.
+ (dispLDD, regPP, reg50, reg104, reg40, reg20w, lit404, lit204,
+ add0fff, add03f8): Convert to old style function declaration and
+ add prototype.
+ (avrdis_opcode): Add prototype.
+
+2000-03-27 Denis Chertykov <denisc@overta.ru>
+
+ * avr-dis.c: New file. AVR disassembler.
+ * configure.in (bfd_avr_arch): New architecture support.
+ * disassemble.c: Likewise.
+ * configure: Regenerate.
+
+Mon Mar 6 19:52:05 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * sh-opc.h (sh_table): ldre and ldrs have a *signed* displacement.
+
+2000-03-02 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * d30v-dis.c (print_insn): Remove d*i hacks. Use per-operand
+ flag to determine if operand is pc-relative.
+ * d30v-opc.c:
+ (d30v_format_table):
+ (REL6S3): Renamed from IMM6S3.
+ Added flag OPERAND_PCREL.
+ (REL12S3, REL18S3, REL32): Split from IMM12S3, IMM18S3, REL32, with
+ added flag OPERAND_PCREL.
+ (IMM12S3U): Replaced with REL12S3.
+ (SHORT_D2, LONG_D): Delay target is pc-relative.
+ (SHORT_B2r, SHORT_B3r, SHORT_B3br, SHORT_D2r, LONG_Ur, LONG_2r):
+ Split from SHORT_B2, SHORT_D2, SHORT_B3b, SHORT_D2, LONG_U, LONG_2r,
+ using the REL* operands.
+ (LONG_2br, LONG_Dr): Likewise, from LONG_2b, LONG_D.
+ (SHORT_D1r, SHORT_D2Br, LONG_Dbr): Renamed from SHORT_D1, SHORT_D2B,
+ LONG_Db, using REL* operands.
+ (SHORT_U, SHORT_A5S): Removed stray alternatives.
+ (d30v_opcode_table): Use new *r formats.
+
+2000-02-28 Nick Clifton <nickc@cygnus.com>
+
+ * m32r-desc.c (m32r_cgen_cpu_open): Replace 'flags' with
+ 'signed_overflow_ok_p'.
+
+2000-02-27 Eli Zaretskii <eliz@is.elta.co.il>
+
+ * Makefile.am (stamp-lib): Use $(LIBTOOL) --config to get the
+ name of the libtool directory.
+ * Makefile.in: Rebuild.
+
+2000-02-24 Nick Clifton <nickc@cygnus.com>
+
+ * cgen-opc.c (cgen_set_signed_overflow_ok): New function.
+ (cgen_clear_signed_overflow_ok): New function.
+ (cgen_signed_overflow_ok_p): New function.
+
+2000-02-23 Andrew Haley <aph@cygnus.com>
+
+ * m32r-asm.c, m32r-desc.c, m32r-desc.h, m32r-dis.c,
+ m32r-ibld.c,m32r-opc.h: Rebuild.
+
+2000-02-23 Linas Vepstas <linas@linas.org>
+
+ * i370-dis.c, i370-opc.c: New.
+
+ * disassemble.c (ARCH_i370): Define.
+ (disassembler): Handle it.
+
+ * Makefile.am: Add support for Linux/IBM 370.
+ * configure.in: Likewise.
+
+ * Makefile.in: Regenerate.
+ * configure: Likewise.
+
+2000-02-22 Chandra Chavva <cchavva@cygnus.com>
+
+ * d30v-opc.c (d30v_opcode_tab) : Added FLAG_NOT_WITH_ADDSUBppp to
+ ST2H, STB, STH, STHH, STW and ST2H opcodes to prohibit parallel
+ procedure.
+
+1999-12-30 Andrew Haley <aph@cygnus.com>
+
+ * mips-dis.c (_print_insn_mips): New arg for OPCODE_IS_MEMBER:
+ force gp32 to zero.
+ * mips-opc.c (G6): New define.
+ (mips_builtin_op): Add "move" definition for -gp32.
+
+2000-02-22 Ian Lance Taylor <ian@zembu.com>
+
+ From Grant Erickson <gerickso@Brocade.COM>:
+ * ppc-opc.c: Correct dcread--it takes 3 arguments, not 2.
+
+2000-02-21 Alan Modra <alan@spri.levels.unisa.edu.au>
+
+ * dis-buf.c (buffer_read_memory): Change `length' param and all int
+ vars to unsigned.
+
+Thu Feb 17 00:18:12 2000 J"orn Rennecke <amylaar@cygnus.co.uk>
+
+ * sh-dis.c (print_movxy, print_insn_ddt, print_dsp_reg): New functions.
+ (print_insn_ppi): Likewise.
+ (print_insn_shx): Use info->mach to select appropriate insn set.
+ Add support for sh-dsp. Remove FD_REG_N support.
+ * sh-opc.h (sh_nibble_type): Add new values for sh-dsp support.
+ (sh_arg_type): Likewise. Remove FD_REG_N.
+ (sh_dsp_reg_nums): New enum.
+ (arch_sh1, arch_sh2, arch_sh3, arch_sh3e, arch_sh4): New macros.
+ (arch_sh_dsp, arch_sh3_dsp, arch_sh1_up, arch_sh2_up): Likewise.
+ (arch_sh3_up, arch_sh3e_up, arch_sh4_up, arch_sh_dsp_up): Likewise.
+ (arch_sh3_dsp_up): Likewise.
+ (sh_opcode_info): New field: arch.
+ (sh_table): Split up insn with FD_REG_N into ones with F_REG_N and
+ D_REG_N. Fill in arch field. Add sh-dsp insns.
+
+2000-02-14 Fernando Nasser <fnasser@totem.to.cygnus.com>
+
+ * arm-dis.c: Change flavor name from atpcs-special to
+ special-atpcs to prevent name conflict in gdb.
+ (get_arm_regname_num_options, set_arm_regname_option,
+ get_arm_regnames): New functions. API to access the several
+ flavor of register names. Note: Used by gdb.
+ (print_insn_thumb): Use the register name entry from the currently
+ selected flavor for LR and PC.
+
+2000-02-10 Nick Clifton <nickc@cygnus.com>
+
+ * mcore-opc.h (enum mcore_opclass): Add MULSH and OPSR
+ classes.
+ (mcore_table): Add "idly4", "psrclr", "psrset", "mulsh" and
+ "mulsh.h" instructions.
+ * mcore-dis.c (imsk array): Add masks for MULSH and OPSR
+ classes.
+ (print_insn_mcore): Add support for little endian targets.
+ Add support for MULSH and OPSR classes.
+
+2000-02-07 Nick Clifton <nickc@cygnus.com>
+
+ * arm-dis.c (parse_arm_diassembler_option): Rename again.
+ Previous delat did not take.
+
+2000-02-03 Timothy Wall <twall@redhat.com>
+
projects / deliverable / binutils-gdb.git / blobdiff