+2011-12-13 Alan Modra <amodra@gmail.com>
+
+ * ppc-opc.c (ISA_V2): Define and use for relevant BO field tests.
+ (valid_bo_pre_v2, valid_bo_post_v2): New functions, extracted from..
+ (valid_bo): ..here. When disassembling, accept either 'y' or 'at'
+ type encoding on second pass.
+ (powerpc_opcodes): Use ISA_V2 to enable branch insns rather than
+ POWER4.
+ * ppc-dis.c (print_insn_powerpc): Delete dialect_orig. Instead
+ ignore deprecated on second pass.
+
+2011-12-08 Andrew Pinski <apinski@cavium.com>
+
+ * mips-opc.c (mips_builtin_opcodes): Add "pause".
+
+2011-12-08 Andrew Pinski <apinski@cavium.com>
+ Adam Nemet <anemet@caviumnetworks.com>
+
+ * mips-dis.c (mips_arch_choices): Add Octeon2.
+ For "octeon+", just include OcteonP for the insn.
+ * mips-opc.c (IOCT): Include Octeon2.
+ (IOCTP): Include Octeon2.
+ (IOCT2): New macro.
+ (mips_builtin_opcodes): Add "laa", "laad", "lac", "lacd", "lad",
+ "ladd", "lai", "laid", "las", "lasd", "law", "lawd".
+ Move "lbux", "ldx", "lhx", "lwx", and "lwux" up to where the standard
+ loads are, and add IOCT2 to them.
+ Add "lbx" and "lhux".
+ Add "qmac.00", "qmac.01", "qmac.02", "qmac.03", "qmacs.00",
+ "qmacs.01", "qmacs.01", "qmacs.02" and "qmacs.03".
+ Add "zcb" and "zcbt".
+
+2011-11-29 Andrew Pinski <apinski@cavium.com>
+
+ * mips-dis.c (mips_arch_choices): Add Octeon+.
+ * mips-opc.c (IOCT): Include Octeon+.
+ (IOCTP): New macro.
+ (mips_builtin_opcodes): Add "saa" and "saad".
+