Automatic date update in version.in

[deliverable/binutils-gdb.git] / opcodes / aarch64-asm.c

diff --git a/opcodes/aarch64-asm.c b/opcodes/aarch64-asm.c
index 0ec27b24928fac0b3325c9d4817152236d0bf698..36f84e800ed5e12bfc62ee005e4ffe317a49dac4 100644 (file)
--- a/opcodes/aarch64-asm.c
+++ b/opcodes/aarch64-asm.c
@@ -1,5 +1,5 @@
 /* aarch64-asm.c -- AArch64 assembler support.
 /* aarch64-asm.c -- AArch64 assembler support.

-   Copyright (C) 2012-2019 Free Software Foundation, Inc.
+   Copyright (C) 2012-2020 Free Software Foundation, Inc.

    Contributed by ARM Ltd.
 
    This file is part of the GNU opcodes library.
    Contributed by ARM Ltd.
 
    This file is part of the GNU opcodes library.


@@ -130,6 +130,7 @@ aarch64_ins_reglane (const aarch64_operand *self, const aarch64_opnd_info *info,
       switch (info->qualifier)
        {
        case AARCH64_OPND_QLF_S_4B:
       switch (info->qualifier)
        {
        case AARCH64_OPND_QLF_S_4B:

+       case AARCH64_OPND_QLF_S_2H:

          /* L:H */
          assert (reglane_index < 4);
          insert_fields (code, reglane_index, 0, 2, FLD_L, FLD_H);
          /* L:H */
          assert (reglane_index < 4);
          insert_fields (code, reglane_index, 0, 2, FLD_L, FLD_H);


@@ -1241,8 +1242,9 @@ aarch64_ins_sve_shrimm (const aarch64_operand *self,
   const aarch64_opnd_info *prev_operand;
   unsigned int esize;
 
   const aarch64_opnd_info *prev_operand;
   unsigned int esize;
 

-  assert (info->idx > 0);
-  prev_operand = &inst->operands[info->idx - 1];
+  unsigned int opnd_backshift = get_operand_specific_data (self);
+  assert (info->idx >= (int)opnd_backshift);
+  prev_operand = &inst->operands[info->idx - opnd_backshift];

   esize = aarch64_get_qualifier_esize (prev_operand->qualifier);
   insert_all_fields (self, code, 16 * esize - info->imm.value);
   return TRUE;
   esize = aarch64_get_qualifier_esize (prev_operand->qualifier);
   insert_all_fields (self, code, 16 * esize - info->imm.value);
   return TRUE;


@@ -1624,6 +1626,8 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst)
     case sve_index:
     case sve_shift_pred:
     case sve_shift_unpred:
     case sve_index:
     case sve_shift_pred:
     case sve_shift_unpred:

+    case sve_shift_tsz_hsd:
+    case sve_shift_tsz_bhsd:

       /* For indices and shift amounts, the variant is encoded as
         part of the immediate.  */
       break;
       /* For indices and shift amounts, the variant is encoded as
         part of the immediate.  */
       break;


@@ -1670,8 +1674,14 @@ aarch64_encode_variant_using_iclass (struct aarch64_inst *inst)
                    aarch64_get_variant (inst) + 1, 0);
       break;
 
                    aarch64_get_variant (inst) + 1, 0);
       break;
 

-    case sve_size_013:
-      variant = aarch64_get_variant (inst);
+    case sve_size_tsz_bhs:
+      insert_fields (&inst->value,
+                    (1 << aarch64_get_variant (inst)),
+                    0, 2, FLD_SVE_tszl_19, FLD_SVE_sz);
+      break;
+
+    case sve_size_13:
+      variant = aarch64_get_variant (inst) + 1;

       if (variant == 2)
          variant = 3;
       insert_field (FLD_size, &inst->value, variant, 0);
       if (variant == 2)
          variant = 3;
       insert_field (FLD_size, &inst->value, variant, 0);