arc/opcodes/nps400: Fix some instruction masks

[deliverable/binutils-gdb.git] / opcodes / aarch64-gen.c

diff --git a/opcodes/aarch64-gen.c b/opcodes/aarch64-gen.c
index e04a3d5546f00a45a7b17011a3c439ff8b1cbe06..a62f6c8e008af32e63ebd01292ec40ac1d459241 100644 (file)
--- a/opcodes/aarch64-gen.c
+++ b/opcodes/aarch64-gen.c
@@ -1,6 +1,6 @@
 /* aarch64-gen.c -- Generate tables and routines for opcode lookup and
    instruction encoding and decoding.
 /* aarch64-gen.c -- Generate tables and routines for opcode lookup and
    instruction encoding and decoding.

-   Copyright (C) 2012-2014 Free Software Foundation, Inc.
+   Copyright (C) 2012-2016 Free Software Foundation, Inc.

    Contributed by ARM Ltd.
 
    This file is part of the GNU opcodes library.
    Contributed by ARM Ltd.
 
    This file is part of the GNU opcodes library.


@@ -28,6 +28,7 @@
 #include "getopt.h"
 #include "opcode/aarch64.h"
 
 #include "getopt.h"
 #include "opcode/aarch64.h"
 

+#define VERIFIER(x) NULL

 #include "aarch64-tbl.h"
 
 static int debug = 0;
 #include "aarch64-tbl.h"
 
 static int debug = 0;


@@ -209,7 +210,7 @@ static int max_num_opcodes_at_leaf_node = 0;
    is decided to be undividable and OPCODE will be assigned to BITTREE->LIST.
 
    The function recursively call itself until OPCODE is undividable.
    is decided to be undividable and OPCODE will be assigned to BITTREE->LIST.
 
    The function recursively call itself until OPCODE is undividable.

-   
+

    N.B. the nature of this algrithm determines that given any value in the
    32-bit space, the computed decision tree will always be able to find one or
    more opcodes entries for it, regardless whether there is a valid instruction
    N.B. the nature of this algrithm determines that given any value in the
    32-bit space, the computed decision tree will always be able to find one or
    more opcodes entries for it, regardless whether there is a valid instruction


@@ -377,13 +378,9 @@ initialize_decoder_tree (void)
 static void __attribute__ ((format (printf, 2, 3)))
 indented_print (unsigned int indent, const char *format, ...)
 {
 static void __attribute__ ((format (printf, 2, 3)))
 indented_print (unsigned int indent, const char *format, ...)
 {

-  /* 80 number of spaces pluc a NULL terminator.  */
-  static const char spaces[81] =
-    "                                                                                ";

   va_list ap;
   va_start (ap, format);
   va_list ap;
   va_start (ap, format);

-  assert (indent <= 80);
-  printf ("%s", &spaces[80 - indent]);
+  printf ("%*s", (int) indent, "");

   vprintf (format, ap);
   va_end (ap);
 }
   vprintf (format, ap);
   va_end (ap);
 }


@@ -690,15 +687,17 @@ opcode_node *
 find_alias_opcode (const aarch64_opcode *opcode)
 {
   int i;
 find_alias_opcode (const aarch64_opcode *opcode)
 {
   int i;

-  /* Assume maximum of 8 disassemble preference candidates.  */
-  const int max_num_aliases = 8;
+  /* Assume maximum of 16 disassemble preference candidates.  */
+  const int max_num_aliases = 16;

   const aarch64_opcode *ent;
   const aarch64_opcode *ent;

-  const aarch64_opcode *preferred[max_num_aliases];
+  const aarch64_opcode *preferred[max_num_aliases + 1];

   opcode_node head, **next;
 
   assert (opcode_has_alias (opcode));
 
   i = 0;
   opcode_node head, **next;
 
   assert (opcode_has_alias (opcode));
 
   i = 0;

+  if (opcode->name != NULL)
+    preferred[i++] = opcode;

   ent = aarch64_opcode_table;
   while (ent->name != NULL)
     {
   ent = aarch64_opcode_table;
   while (ent->name != NULL)
     {


@@ -1242,7 +1241,7 @@ main (int argc, char **argv)
     print_divide_result (decoder_tree);
 
   printf ("/* This file is automatically generated by aarch64-gen.  Do not edit!  */\n");
     print_divide_result (decoder_tree);
 
   printf ("/* This file is automatically generated by aarch64-gen.  Do not edit!  */\n");

-  printf ("/* Copyright (C) 2012-2014 Free Software Foundation, Inc.\n\
+  printf ("/* Copyright (C) 2012-2016 Free Software Foundation, Inc.\n\

    Contributed by ARM Ltd.\n\
 \n\
    This file is part of the GNU opcodes library.\n\
    Contributed by ARM Ltd.\n\
 \n\
    This file is part of the GNU opcodes library.\n\