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[AArch64][SVE 17/32] Add a prefix parameter to print_register_list
[deliverable/binutils-gdb.git]
/
opcodes
/
bfin-dis.c
diff --git
a/opcodes/bfin-dis.c
b/opcodes/bfin-dis.c
index cf66b797b443b7db83739c9e8f5fde6cde526eb2..0979b6696b03cc4bc2278378c55d42c0b284007f 100644
(file)
--- a/
opcodes/bfin-dis.c
+++ b/
opcodes/bfin-dis.c
@@
-1,5
+1,5
@@
/* Disassemble ADI Blackfin Instructions.
/* Disassemble ADI Blackfin Instructions.
- Copyright (C) 2005-201
5
Free Software Foundation, Inc.
+ Copyright (C) 2005-201
6
Free Software Foundation, Inc.
This file is part of libopcodes.
This file is part of libopcodes.
@@
-167,7
+167,7
@@
fmtconst (const_forms_t cf, TIword x, bfd_vma pc, disassemble_info *outf)
else
{
if (constant_formats[cf].issigned && x < 0)
else
{
if (constant_formats[cf].issigned && x < 0)
- sprintf (buf, "-0x%
x", abs (
x));
+ sprintf (buf, "-0x%
lx", (unsigned long)(-
x));
else
sprintf (buf, "0x%lx", (unsigned long) x);
}
else
sprintf (buf, "0x%lx", (unsigned long) x);
}
@@
-4664,7
+4664,7
@@
_print_insn_bfin (bfd_vma pc, disassemble_info *outf)
return -1;
priv->iw0 = iw0;
return -1;
priv->iw0 = iw0;
- if ((
iw0 & 0xc000) == 0xc000
)
+ if ((
(iw0 & 0xc000) == 0xc000) && ((iw0 & 0xff00) != 0xf800)
)
{
/* 32-bit insn. */
if (ifetch (pc + 2, outf, &iw1))
{
/* 32-bit insn. */
if (ifetch (pc + 2, outf, &iw1))
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