-/* The operand table. */
-
-#define OPERAND(op) CONCAT2 (FR30_OPERAND_,op)
-#define OP_ENT(op) fr30_cgen_operand_table[OPERAND (op)]
-
-const CGEN_OPERAND fr30_cgen_operand_table[MAX_OPERANDS] =
-{
-/* pc: program counter */
- { "pc", & HW_ENT (HW_H_PC), 0, 0,
- { 0, 0|(1<<CGEN_OPERAND_SEM_ONLY), { 0 } } },
-/* Ri: destination register */
- { "Ri", & HW_ENT (HW_H_GR), 12, 4,
- { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
-/* Rj: source register */
- { "Rj", & HW_ENT (HW_H_GR), 8, 4,
- { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
-/* Rs1: dedicated register */
- { "Rs1", & HW_ENT (HW_H_DR), 8, 4,
- { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
-/* Rs2: dedicated register */
- { "Rs2", & HW_ENT (HW_H_DR), 12, 4,
- { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
-/* R13: General Register 13 */
- { "R13", & HW_ENT (HW_H_R13), 0, 0,
- { 0, 0, { 0 } } },
-/* R14: General Register 14 */
- { "R14", & HW_ENT (HW_H_R14), 0, 0,
- { 0, 0, { 0 } } },
-/* R15: General Register 15 */
- { "R15", & HW_ENT (HW_H_R15), 0, 0,
- { 0, 0, { 0 } } },
-/* ps: Program Status register */
- { "ps", & HW_ENT (HW_H_PS), 0, 0,
- { 0, 0, { 0 } } },
-/* u4: 4 bit unsigned immediate */
- { "u4", & HW_ENT (HW_H_UINT), 8, 4,
- { 0, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
-/* m4: 4 bit negative immediate */
- { "m4", & HW_ENT (HW_H_UINT), 8, 4,
- { 0, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
-/* u8: 8 bit unsigned immediate */
- { "u8", & HW_ENT (HW_H_UINT), 8, 8,
- { 0, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
-/* i8: 8 bit unsigned immediate */
- { "i8", & HW_ENT (HW_H_UINT), 4, 8,
- { 0, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
-/* udisp6: 6 bit unsigned immediate */
- { "udisp6", & HW_ENT (HW_H_UINT), 8, 4,
- { 0, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
-/* disp8: 8 bit signed immediate */
- { "disp8", & HW_ENT (HW_H_SINT), 4, 8,
- { 0, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_SIGNED), { 0 } } },
-/* disp9: 9 bit signed immediate */
- { "disp9", & HW_ENT (HW_H_SINT), 4, 8,
- { 0, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_SIGNED), { 0 } } },
-/* disp10: 10 bit signed immediate */
- { "disp10", & HW_ENT (HW_H_SINT), 4, 8,
- { 0, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_SIGNED), { 0 } } },
-/* s10: 10 bit signed immediate */
- { "s10", & HW_ENT (HW_H_SINT), 8, 8,
- { 0, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_SIGNED), { 0 } } },
-/* u10: 10 bit unsigned immediate */
- { "u10", & HW_ENT (HW_H_UINT), 8, 8,
- { 0, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
-/* i32: 32 bit immediate */
- { "i32", & HW_ENT (HW_H_UINT), 16, 32,
- { 0, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
-/* dir8: 8 bit direct address */
- { "dir8", & HW_ENT (HW_H_UINT), 8, 8,
- { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
-/* dir9: 9 bit direct address */
- { "dir9", & HW_ENT (HW_H_UINT), 8, 8,
- { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
-/* dir10: 10 bit direct address */
- { "dir10", & HW_ENT (HW_H_UINT), 8, 8,
- { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
-/* label9: 9 bit pc relative address */
- { "label9", & HW_ENT (HW_H_SINT), 8, 8,
- { 0, 0|(1<<CGEN_OPERAND_SIGNED), { 0 } } },
-/* label12: 12 bit pc relative address */
- { "label12", & HW_ENT (HW_H_SINT), 5, 11,
- { 0, 0|(1<<CGEN_OPERAND_SIGNED), { 0 } } },
-/* cc: condition codes */
- { "cc", & HW_ENT (HW_H_UINT), 4, 4,
- { 0, 0|(1<<CGEN_OPERAND_UNSIGNED), { 0 } } },
-/* nbit: negative bit */
- { "nbit", & HW_ENT (HW_H_NBIT), 0, 0,
- { 0, 0|(1<<CGEN_OPERAND_SEM_ONLY), { 0 } } },
-/* vbit: overflow bit */
- { "vbit", & HW_ENT (HW_H_VBIT), 0, 0,
- { 0, 0|(1<<CGEN_OPERAND_SEM_ONLY), { 0 } } },
-/* zbit: zero bit */
- { "zbit", & HW_ENT (HW_H_ZBIT), 0, 0,
- { 0, 0|(1<<CGEN_OPERAND_SEM_ONLY), { 0 } } },
-/* cbit: carry bit */
- { "cbit", & HW_ENT (HW_H_CBIT), 0, 0,
- { 0, 0|(1<<CGEN_OPERAND_SEM_ONLY), { 0 } } },