+ void *stream = info->stream;
+ fprintf_ftype outfn = info->fprintf_func;
+
+ if ((x & SIZE) == L_3 ||
+ (x & SIZE) == L_3NZ)
+ {
+ outfn (stream, "#0x%x", (unsigned) cst);
+ }
+ else if ((x & MODE) == IMM)
+ {
+ outfn (stream, "#0x%x", (unsigned) cst);
+ }
+ else if ((x & MODE) == DBIT ||
+ (x & MODE) == KBIT)
+ {
+ outfn (stream, "#%d", (unsigned) cst);
+ }
+ else if ((x & MODE) == CONST_2)
+ outfn (stream, "#2");
+ else if ((x & MODE) == CONST_4)
+ outfn (stream, "#4");
+ else if ((x & MODE) == CONST_8)
+ outfn (stream, "#8");
+ else if ((x & MODE) == CONST_16)
+ outfn (stream, "#16");
+ else if ((x & MODE) == REG)
+ {
+ switch (x & SIZE)
+ {
+ case L_8:
+ outfn (stream, "%s", regnames[rn]);
+ break;
+ case L_16:
+ case L_16U:
+ outfn (stream, "%s", wregnames[rn]);
+ break;
+ case L_P:
+ case L_32:
+ outfn (stream, "%s", lregnames[rn]);
+ break;
+ }
+ }
+ else if ((x & MODE) == LOWREG)
+ {
+ switch (x & SIZE)
+ {
+ case L_8:
+ /* Always take low half of reg. */
+ outfn (stream, "%s.b", regnames[rn < 8 ? rn + 8 : rn]);
+ break;
+ case L_16:
+ case L_16U:
+ /* Always take low half of reg. */
+ outfn (stream, "%s.w", wregnames[rn < 8 ? rn : rn - 8]);
+ break;
+ case L_P:
+ case L_32:
+ outfn (stream, "%s.l", lregnames[rn]);
+ break;
+ }
+ }
+ else if ((x & MODE) == POSTINC)
+ {
+ outfn (stream, "@%s+", pregnames[rn]);
+ }
+ else if ((x & MODE) == POSTDEC)
+ {
+ outfn (stream, "@%s-", pregnames[rn]);
+ }
+ else if ((x & MODE) == PREINC)
+ {
+ outfn (stream, "@+%s", pregnames[rn]);
+ }
+ else if ((x & MODE) == PREDEC)
+ {
+ outfn (stream, "@-%s", pregnames[rn]);
+ }
+ else if ((x & MODE) == IND)
+ {
+ outfn (stream, "@%s", pregnames[rn]);
+ }
+ else if ((x & MODE) == ABS || (x & ABSJMP))
+ {
+ outfn (stream, "@0x%x:%d", (unsigned) cst, cstlen);
+ }
+ else if ((x & MODE) == MEMIND)
+ {
+ outfn (stream, "@@%d (0x%x)", cst, cst);
+ }
+ else if ((x & MODE) == VECIND)
+ {
+ /* FIXME Multiplier should be 2 or 4, depending on processor mode,
+ by which is meant "normal" vs. "middle", "advanced", "maximum". */
+
+ int offset = (cst + 0x80) * 4;
+ outfn (stream, "@@%d (0x%x)", offset, offset);
+ }
+ else if ((x & MODE) == PCREL)
+ {
+ if ((x & SIZE) == L_16 ||
+ (x & SIZE) == L_16U)
+ {
+ outfn (stream, ".%s%d (0x%x)",
+ (short) cst > 0 ? "+" : "",
+ (short) cst,
+ addr + (short) cst + len);
+ }
+ else
+ {
+ outfn (stream, ".%s%d (0x%x)",
+ (char) cst > 0 ? "+" : "",
+ (char) cst,
+ addr + (char) cst + len);
+ }
+ }
+ else if ((x & MODE) == DISP)
+ {
+ outfn (stream, "@(0x%x:%d,%s)", cst, cstlen,
+ pregnames[rdisp_n]);
+ }
+ else if ((x & MODE) == INDEXB)