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Add support for TBM instructions.
[deliverable/binutils-gdb.git]
/
opcodes
/
i386-gen.c
diff --git
a/opcodes/i386-gen.c
b/opcodes/i386-gen.c
index d877f83326ed7abafd21d963bc4a784dbc13a6f2..e791c610379912e8ac4075a51f6b68c781dc8bd2 100644
(file)
--- a/
opcodes/i386-gen.c
+++ b/
opcodes/i386-gen.c
@@
-1,4
+1,4
@@
-/* Copyright 2007, 2008, 2009
+/* Copyright 2007, 2008, 2009
, 2010, 2011
Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
@@
-47,7
+47,7
@@
static initializer cpu_flag_init[] =
{ "CPU_GENERIC32_FLAGS",
"Cpu186|Cpu286|Cpu386" },
{ "CPU_GENERIC64_FLAGS",
{ "CPU_GENERIC32_FLAGS",
"Cpu186|Cpu286|Cpu386" },
{ "CPU_GENERIC64_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuMMX|CpuSSE|CpuSSE2|CpuLM" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|Cpu
Nop|Cpu
MMX|CpuSSE|CpuSSE2|CpuLM" },
{ "CPU_NONE_FLAGS",
"0" },
{ "CPU_I186_FLAGS",
{ "CPU_NONE_FLAGS",
"0" },
{ "CPU_I186_FLAGS",
@@
-62,30
+62,34
@@
static initializer cpu_flag_init[] =
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu387" },
{ "CPU_I686_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687" },
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu387" },
{ "CPU_I686_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687" },
+ { "CPU_PENTIUMPRO_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuNop" },
{ "CPU_P2_FLAGS",
{ "CPU_P2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuMMX" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|Cpu
Nop|Cpu
MMX" },
{ "CPU_P3_FLAGS",
{ "CPU_P3_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|CpuMMX|CpuSSE" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|Cpu387|Cpu687|Cpu
Nop|Cpu
MMX|CpuSSE" },
{ "CPU_P4_FLAGS",
{ "CPU_P4_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuMMX|CpuSSE|CpuSSE2" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|Cpu
Nop|Cpu
MMX|CpuSSE|CpuSSE2" },
{ "CPU_NOCONA_FLAGS",
{ "CPU_NOCONA_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuLM" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|Cpu
Nop|Cpu
MMX|CpuSSE|CpuSSE2|CpuSSE3|CpuLM" },
{ "CPU_CORE_FLAGS",
{ "CPU_CORE_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|Cpu
Nop|Cpu
MMX|CpuSSE|CpuSSE2|CpuSSE3" },
{ "CPU_CORE2_FLAGS",
{ "CPU_CORE2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuLM" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|Cpu
Nop|Cpu
MMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuLM" },
{ "CPU_COREI7_FLAGS",
{ "CPU_COREI7_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuRdtscp|CpuLM" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuClflush|Cpu387|Cpu687|CpuFISTTP|Cpu
Nop|Cpu
MMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuRdtscp|CpuLM" },
{ "CPU_K6_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuMMX" },
{ "CPU_K6_2_FLAGS",
{ "CPU_K6_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuMMX" },
{ "CPU_K6_2_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|CpuMMX|Cpu3dnow" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|CpuSYSCALL|Cpu387|Cpu
Nop|Cpu
MMX|Cpu3dnow" },
{ "CPU_ATHLON_FLAGS",
{ "CPU_ATHLON_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|Cpu387|Cpu687|CpuMMX|Cpu3dnow|Cpu3dnowA" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|Cpu387|Cpu687|Cpu
Nop|Cpu
MMX|Cpu3dnow|Cpu3dnowA" },
{ "CPU_K8_FLAGS",
{ "CPU_K8_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuLM" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|Cpu
Nop|Cpu
MMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuLM" },
{ "CPU_AMDFAM10_FLAGS",
{ "CPU_AMDFAM10_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM" },
+ { "CPU_BDVER1_FLAGS",
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP" },
{ "CPU_8087_FLAGS",
"Cpu8087" },
{ "CPU_287_FLAGS",
{ "CPU_8087_FLAGS",
"Cpu8087" },
{ "CPU_287_FLAGS",
@@
-96,6
+100,8
@@
static initializer cpu_flag_init[] =
"Cpu8087|Cpu287|Cpu387|Cpu687|CpuFISTTP" },
{ "CPU_CLFLUSH_FLAGS",
"CpuClflush" },
"Cpu8087|Cpu287|Cpu387|Cpu687|CpuFISTTP" },
{ "CPU_CLFLUSH_FLAGS",
"CpuClflush" },
+ { "CPU_NOP_FLAGS",
+ "CpuNop" },
{ "CPU_SYSCALL_FLAGS",
"CpuSYSCALL" },
{ "CPU_MMX_FLAGS",
{ "CPU_SYSCALL_FLAGS",
"CpuSYSCALL" },
{ "CPU_MMX_FLAGS",
@@
-120,6
+126,8
@@
static initializer cpu_flag_init[] =
"CpuSMX" },
{ "CPU_XSAVE_FLAGS",
"CpuXsave" },
"CpuSMX" },
{ "CPU_XSAVE_FLAGS",
"CpuXsave" },
+ { "CPU_XSAVEOPT_FLAGS",
+ "CpuXsaveopt" },
{ "CPU_AES_FLAGS",
"CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAES" },
{ "CPU_PCLMUL_FLAGS",
{ "CPU_AES_FLAGS",
"CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAES" },
{ "CPU_PCLMUL_FLAGS",
@@
-128,14
+136,26
@@
static initializer cpu_flag_init[] =
"CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuFMA" },
{ "CPU_FMA4_FLAGS",
"CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuFMA4" },
"CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuFMA" },
{ "CPU_FMA4_FLAGS",
"CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuFMA4" },
+ { "CPU_XOP_FLAGS",
+ "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuSSE4a|CpuABM|CpuAVX|CpuFMA4|CpuXOP" },
{ "CPU_LWP_FLAGS",
"CpuLWP" },
{ "CPU_LWP_FLAGS",
"CpuLWP" },
+ { "CPU_BMI_FLAGS",
+ "CpuBMI" },
+ { "CPU_TBM_FLAGS",
+ "CpuTBM" },
{ "CPU_MOVBE_FLAGS",
"CpuMovbe" },
{ "CPU_RDTSCP_FLAGS",
"CpuRdtscp" },
{ "CPU_EPT_FLAGS",
"CpuEPT" },
{ "CPU_MOVBE_FLAGS",
"CpuMovbe" },
{ "CPU_RDTSCP_FLAGS",
"CpuRdtscp" },
{ "CPU_EPT_FLAGS",
"CpuEPT" },
+ { "CPU_FSGSBASE_FLAGS",
+ "CpuFSGSBase" },
+ { "CPU_RDRND_FLAGS",
+ "CpuRdRnd" },
+ { "CPU_F16C_FLAGS",
+ "CpuF16C" },
{ "CPU_3DNOW_FLAGS",
"CpuMMX|Cpu3dnow" },
{ "CPU_3DNOWA_FLAGS",
{ "CPU_3DNOW_FLAGS",
"CpuMMX|Cpu3dnow" },
{ "CPU_3DNOWA_FLAGS",
@@
-250,6
+270,8
@@
static initializer operand_type_init[] =
"Imm32|Imm32S|Imm64|Disp32" },
{ "OPERAND_TYPE_IMM32_32S_64_DISP32_64",
"Imm32|Imm32S|Imm64|Disp32|Disp64" },
"Imm32|Imm32S|Imm64|Disp32" },
{ "OPERAND_TYPE_IMM32_32S_64_DISP32_64",
"Imm32|Imm32S|Imm64|Disp32|Disp64" },
+ { "OPERAND_TYPE_VEC_IMM4",
+ "Vec_Imm4" },
};
typedef struct bitfield
};
typedef struct bitfield
@@
-270,6
+292,7
@@
static bitfield cpu_flags[] =
BITFIELD (Cpu586),
BITFIELD (Cpu686),
BITFIELD (CpuClflush),
BITFIELD (Cpu586),
BITFIELD (Cpu686),
BITFIELD (CpuClflush),
+ BITFIELD (CpuNop),
BITFIELD (CpuSYSCALL),
BITFIELD (Cpu8087),
BITFIELD (Cpu287),
BITFIELD (CpuSYSCALL),
BITFIELD (Cpu8087),
BITFIELD (Cpu287),
@@
-294,15
+317,22
@@
static bitfield cpu_flags[] =
BITFIELD (CpuSMX),
BITFIELD (CpuABM),
BITFIELD (CpuXsave),
BITFIELD (CpuSMX),
BITFIELD (CpuABM),
BITFIELD (CpuXsave),
+ BITFIELD (CpuXsaveopt),
BITFIELD (CpuAES),
BITFIELD (CpuPCLMUL),
BITFIELD (CpuFMA),
BITFIELD (CpuFMA4),
BITFIELD (CpuAES),
BITFIELD (CpuPCLMUL),
BITFIELD (CpuFMA),
BITFIELD (CpuFMA4),
+ BITFIELD (CpuXOP),
BITFIELD (CpuLWP),
BITFIELD (CpuLWP),
+ BITFIELD (CpuBMI),
+ BITFIELD (CpuTBM),
BITFIELD (CpuLM),
BITFIELD (CpuMovbe),
BITFIELD (CpuEPT),
BITFIELD (CpuRdtscp),
BITFIELD (CpuLM),
BITFIELD (CpuMovbe),
BITFIELD (CpuEPT),
BITFIELD (CpuRdtscp),
+ BITFIELD (CpuFSGSBase),
+ BITFIELD (CpuRdRnd),
+ BITFIELD (CpuF16C),
BITFIELD (Cpu64),
BITFIELD (CpuNo64),
#ifdef CpuUnused
BITFIELD (Cpu64),
BITFIELD (CpuNo64),
#ifdef CpuUnused
@@
-327,6
+357,7
@@
static bitfield opcode_modifiers[] =
BITFIELD (Size16),
BITFIELD (Size32),
BITFIELD (Size64),
BITFIELD (Size16),
BITFIELD (Size32),
BITFIELD (Size64),
+ BITFIELD (CheckRegSize),
BITFIELD (IgnoreSize),
BITFIELD (DefaultSize),
BITFIELD (No_bSuf),
BITFIELD (IgnoreSize),
BITFIELD (DefaultSize),
BITFIELD (No_bSuf),
@@
-337,10
+368,10
@@
static bitfield opcode_modifiers[] =
BITFIELD (No_ldSuf),
BITFIELD (FWait),
BITFIELD (IsString),
BITFIELD (No_ldSuf),
BITFIELD (FWait),
BITFIELD (IsString),
+ BITFIELD (IsLockable),
BITFIELD (RegKludge),
BITFIELD (FirstXmm0),
BITFIELD (Implicit1stXmm0),
BITFIELD (RegKludge),
BITFIELD (FirstXmm0),
BITFIELD (Implicit1stXmm0),
- BITFIELD (ByteOkIntel),
BITFIELD (ToDword),
BITFIELD (ToQword),
BITFIELD (AddrPrefixOp0),
BITFIELD (ToDword),
BITFIELD (ToQword),
BITFIELD (AddrPrefixOp0),
@@
-350,17
+381,10
@@
static bitfield opcode_modifiers[] =
BITFIELD (Rex64),
BITFIELD (Ugh),
BITFIELD (Vex),
BITFIELD (Rex64),
BITFIELD (Ugh),
BITFIELD (Vex),
- BITFIELD (VexNDS),
- BITFIELD (VexNDD),
- BITFIELD (VexLWP),
- BITFIELD (VexW0),
- BITFIELD (VexW1),
- BITFIELD (Vex0F),
- BITFIELD (Vex0F38),
- BITFIELD (Vex0F3A),
- BITFIELD (XOP09),
- BITFIELD (XOP0A),
- BITFIELD (Vex3Sources),
+ BITFIELD (VexVVVV),
+ BITFIELD (VexW),
+ BITFIELD (VexOpcode),
+ BITFIELD (VexSources),
BITFIELD (VexImmExt),
BITFIELD (SSE2AVX),
BITFIELD (NoAVX),
BITFIELD (VexImmExt),
BITFIELD (SSE2AVX),
BITFIELD (NoAVX),
@@
-380,13
+404,13
@@
static bitfield operand_types[] =
BITFIELD (RegMMX),
BITFIELD (RegXMM),
BITFIELD (RegYMM),
BITFIELD (RegMMX),
BITFIELD (RegXMM),
BITFIELD (RegYMM),
+ BITFIELD (Imm1),
BITFIELD (Imm8),
BITFIELD (Imm8S),
BITFIELD (Imm16),
BITFIELD (Imm32),
BITFIELD (Imm32S),
BITFIELD (Imm64),
BITFIELD (Imm8),
BITFIELD (Imm8S),
BITFIELD (Imm16),
BITFIELD (Imm32),
BITFIELD (Imm32S),
BITFIELD (Imm64),
- BITFIELD (Imm1),
BITFIELD (BaseIndex),
BITFIELD (Disp8),
BITFIELD (Disp16),
BITFIELD (BaseIndex),
BITFIELD (Disp8),
BITFIELD (Disp16),
@@
-416,6
+440,7
@@
static bitfield operand_types[] =
BITFIELD (Ymmword),
BITFIELD (Unspecified),
BITFIELD (Anysize),
BITFIELD (Ymmword),
BITFIELD (Unspecified),
BITFIELD (Anysize),
+ BITFIELD (Vec_Imm4),
#ifdef OTUnused
BITFIELD (OTUnused),
#endif
#ifdef OTUnused
BITFIELD (OTUnused),
#endif
@@
-447,7
+472,7
@@
static void
process_copyright (FILE *fp)
{
fprintf (fp, "/* This file is automatically generated by i386-gen. Do not edit! */\n\
process_copyright (FILE *fp)
{
fprintf (fp, "/* This file is automatically generated by i386-gen. Do not edit! */\n\
-/* Copyright 2007, 2008, 2009\n\
+/* Copyright 2007, 2008, 2009
, 2010, 2011
\n\
Free Software Foundation, Inc.\n\
\n\
This file is part of the GNU opcodes library.\n\
Free Software Foundation, Inc.\n\
\n\
This file is part of the GNU opcodes library.\n\
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