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Don't write to inferior_ptid in nto-procfs.c
[deliverable/binutils-gdb.git]
/
opcodes
/
i386-opc.h
diff --git
a/opcodes/i386-opc.h
b/opcodes/i386-opc.h
index f5938f507aad4da18b234902a1847e07580ae494..55726c1a7a712bc4d446d04e202373b76e57d70d 100644
(file)
--- a/
opcodes/i386-opc.h
+++ b/
opcodes/i386-opc.h
@@
-1,5
+1,5
@@
/* Declarations for Intel 80386 opcode table
/* Declarations for Intel 80386 opcode table
- Copyright (C) 2007-20
19
Free Software Foundation, Inc.
+ Copyright (C) 2007-20
20
Free Software Foundation, Inc.
This file is part of the GNU opcodes library.
This file is part of the GNU opcodes library.
@@
-87,8
+87,10
@@
enum
CpuSSSE3,
/* SSE4a support required */
CpuSSE4a,
CpuSSSE3,
/* SSE4a support required */
CpuSSE4a,
- /* ABM New Instructions required */
- CpuABM,
+ /* LZCNT support required */
+ CpuLZCNT,
+ /* POPCNT support required */
+ CpuPOPCNT,
/* SSE4.1 support required */
CpuSSE4_1,
/* SSE4.2 support required */
/* SSE4.1 support required */
CpuSSE4_1,
/* SSE4.2 support required */
@@
-154,8
+156,6
@@
enum
CpuF16C,
/* Intel BMI2 support required */
CpuBMI2,
CpuF16C,
/* Intel BMI2 support required */
CpuBMI2,
- /* LZCNT support required */
- CpuLZCNT,
/* HLE support required */
CpuHLE,
/* RTM support required */
/* HLE support required */
CpuHLE,
/* RTM support required */
@@
-243,10
+243,16
@@
enum
CpuMOVDIR64B,
/* ENQCMD instruction required */
CpuENQCMD,
CpuMOVDIR64B,
/* ENQCMD instruction required */
CpuENQCMD,
+ /* SERIALIZE instruction required */
+ CpuSERIALIZE,
/* RDPRU instruction required */
CpuRDPRU,
/* MCOMMIT instruction required */
CpuMCOMMIT,
/* RDPRU instruction required */
CpuRDPRU,
/* MCOMMIT instruction required */
CpuMCOMMIT,
+ /* SEV-ES instruction(s) required */
+ CpuSEV_ES,
+ /* TSXLDTRK instruction required */
+ CpuTSXLDTRK,
/* 64bit support required */
Cpu64,
/* Not supported in the 64bit mode */
/* 64bit support required */
Cpu64,
/* Not supported in the 64bit mode */
@@
-298,7
+304,8
@@
typedef union i386_cpu_flags
unsigned int cpusmx:1;
unsigned int cpussse3:1;
unsigned int cpusse4a:1;
unsigned int cpusmx:1;
unsigned int cpussse3:1;
unsigned int cpusse4a:1;
- unsigned int cpuabm:1;
+ unsigned int cpulzcnt:1;
+ unsigned int cpupopcnt:1;
unsigned int cpusse4_1:1;
unsigned int cpusse4_2:1;
unsigned int cpuavx:1;
unsigned int cpusse4_1:1;
unsigned int cpusse4_2:1;
unsigned int cpuavx:1;
@@
-331,7
+338,6
@@
typedef union i386_cpu_flags
unsigned int cpurdrnd:1;
unsigned int cpuf16c:1;
unsigned int cpubmi2:1;
unsigned int cpurdrnd:1;
unsigned int cpuf16c:1;
unsigned int cpubmi2:1;
- unsigned int cpulzcnt:1;
unsigned int cpuhle:1;
unsigned int cpurtm:1;
unsigned int cpuinvpcid:1;
unsigned int cpuhle:1;
unsigned int cpurtm:1;
unsigned int cpuinvpcid:1;
@@
-376,8
+382,11
@@
typedef union i386_cpu_flags
unsigned int cpumovdiri:1;
unsigned int cpumovdir64b:1;
unsigned int cpuenqcmd:1;
unsigned int cpumovdiri:1;
unsigned int cpumovdir64b:1;
unsigned int cpuenqcmd:1;
+ unsigned int cpuserialize:1;
unsigned int cpurdpru:1;
unsigned int cpumcommit:1;
unsigned int cpurdpru:1;
unsigned int cpumcommit:1;
+ unsigned int cpusev_es:1;
+ unsigned int cputsxldtrk:1;
unsigned int cpu64:1;
unsigned int cpuno64:1;
#ifdef CpuUnused
unsigned int cpu64:1;
unsigned int cpuno64:1;
#ifdef CpuUnused
@@
-401,18
+410,17
@@
enum
Load,
/* insn has a modrm byte. */
Modrm,
Load,
/* insn has a modrm byte. */
Modrm,
- /* register is in low 3 bits of opcode */
- ShortForm,
- /* special case for jump insns. */
- Jump,
+ /* special case for jump insns; value has to be 1 */
+#define JUMP 1
/* call and jump */
/* call and jump */
- JumpDword,
+#define JUMP_DWORD 2
/* loop and jecxz */
/* loop and jecxz */
- JumpByte,
+#define JUMP_BYTE 3
/* special case for intersegment leaps/calls */
/* special case for intersegment leaps/calls */
- JumpInterSegment,
+#define JUMP_INTERSEGMENT 4
/* absolute address for jump */
/* absolute address for jump */
- JumpAbsolute,
+#define JUMP_ABSOLUTE 5
+ Jump,
/* FP insn memory format bit, sized by 0x4 */
FloatMF,
/* src/dest swap for floats. */
/* FP insn memory format bit, sized by 0x4 */
FloatMF,
/* src/dest swap for floats. */
@@
-428,9
+436,10
@@
enum
CheckRegSize,
/* instruction ignores operand size prefix and in Intel mode ignores
mnemonic size suffix check. */
CheckRegSize,
/* instruction ignores operand size prefix and in Intel mode ignores
mnemonic size suffix check. */
- IgnoreSize,
+#define IGNORESIZE 1
/* default insn size depends on mode */
/* default insn size depends on mode */
- DefaultSize,
+#define DEFAULTSIZE 2
+ MnemonicSize,
/* any memory size */
Anysize,
/* b suffix on instruction illegal */
/* any memory size */
Anysize,
/* b suffix on instruction illegal */
@@
-493,8
+502,6
@@
enum
ImmExt,
/* instruction don't need Rex64 prefix. */
NoRex64,
ImmExt,
/* instruction don't need Rex64 prefix. */
NoRex64,
- /* instruction require Rex64 prefix. */
- Rex64,
/* deprecated fp insn, gets a warning */
Ugh,
/* insn has VEX prefix:
/* deprecated fp insn, gets a warning */
Ugh,
/* insn has VEX prefix:
@@
-637,10
+644,16
@@
enum
ATTSyntax,
/* Intel syntax. */
IntelSyntax,
ATTSyntax,
/* Intel syntax. */
IntelSyntax,
- /* AMD64. */
- AMD64,
- /* Intel64. */
- Intel64,
+ /* ISA64: Don't change the order without other code adjustments.
+ 0: Common to AMD64 and Intel64.
+ 1: AMD64.
+ 2: Intel64.
+ 3: Only in Intel64.
+ */
+#define AMD64 1
+#define INTEL64 2
+#define INTEL64ONLY 3
+ ISA64,
/* The last bitfield in i386_opcode_modifier. */
Opcode_Modifier_Num
};
/* The last bitfield in i386_opcode_modifier. */
Opcode_Modifier_Num
};
@@
-651,18
+664,12
@@
typedef struct i386_opcode_modifier
unsigned int w:1;
unsigned int load:1;
unsigned int modrm:1;
unsigned int w:1;
unsigned int load:1;
unsigned int modrm:1;
- unsigned int shortform:1;
- unsigned int jump:1;
- unsigned int jumpdword:1;
- unsigned int jumpbyte:1;
- unsigned int jumpintersegment:1;
- unsigned int jumpabsolute:1;
+ unsigned int jump:3;
unsigned int floatmf:1;
unsigned int floatr:1;
unsigned int size:2;
unsigned int checkregsize:1;
unsigned int floatmf:1;
unsigned int floatr:1;
unsigned int size:2;
unsigned int checkregsize:1;
- unsigned int ignoresize:1;
- unsigned int defaultsize:1;
+ unsigned int mnemonicsize:2;
unsigned int anysize:1;
unsigned int no_bsuf:1;
unsigned int no_wsuf:1;
unsigned int anysize:1;
unsigned int no_bsuf:1;
unsigned int no_wsuf:1;
@@
-686,7
+693,6
@@
typedef struct i386_opcode_modifier
unsigned int isprefix:1;
unsigned int immext:1;
unsigned int norex64:1;
unsigned int isprefix:1;
unsigned int immext:1;
unsigned int norex64:1;
- unsigned int rex64:1;
unsigned int ugh:1;
unsigned int vex:2;
unsigned int vexvvvv:2;
unsigned int ugh:1;
unsigned int vex:2;
unsigned int vexvvvv:2;
@@
-708,8
+714,7
@@
typedef struct i386_opcode_modifier
unsigned int attmnemonic:1;
unsigned int attsyntax:1;
unsigned int intelsyntax:1;
unsigned int attmnemonic:1;
unsigned int attsyntax:1;
unsigned int intelsyntax:1;
- unsigned int amd64:1;
- unsigned int intel64:1;
+ unsigned int isa64:2;
} i386_opcode_modifier;
/* Operand classes. */
} i386_opcode_modifier;
/* Operand classes. */
@@
-901,7
+906,7
@@
extern const insn_template i386_optab[];
/* these are for register name --> number & type hash lookup */
typedef struct
{
/* these are for register name --> number & type hash lookup */
typedef struct
{
- char *reg_name;
+ c
onst c
har *reg_name;
i386_operand_type reg_type;
unsigned char reg_flags;
#define RegRex 0x1 /* Extended register. */
i386_operand_type reg_type;
unsigned char reg_flags;
#define RegRex 0x1 /* Extended register. */
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