- /* insn has VEX NDS. Register-only source is encoded in Vex prefix.
- We use VexNDS on insns with VEX DDS since the register-only source
- is the second source register. */
- VexNDS,
- /* insn has VEX NDD. Register destination is encoded in Vex prefix. */
- VexNDD,
- /* insn has VEX NDD. Register destination is encoded in Vex prefix
- and one of the operands can access a memory location. */
- VexLWP,
- /* insn has VEX W0. */
- VexW0,
- /* insn has VEX W1. */
- VexW1,
- /* insn has VEX 0x0F opcode prefix. */
- Vex0F,
- /* insn has VEX 0x0F38 opcode prefix. */
- Vex0F38,
- /* insn has VEX 0x0F3A opcode prefix. */
- Vex0F3A,
- /* insn has XOP 0x09 opcode prefix. */
- XOP09,
- /* insn has XOP 0x0A opcode prefix. */
- XOP0A,
- /* insn has VEX prefix with 3 soures. */
- Vex3Sources,
+ /* How to encode VEX.vvvv:
+ 0: VEX.vvvv must be 1111b.
+ 1: VEX.NDS. Register-only source is encoded in VEX.vvvv where
+ the content of source registers will be preserved.
+ VEX.DDS. The second register operand is encoded in VEX.vvvv
+ where the content of first source register will be overwritten
+ by the result.
+ VEX.NDD2. The second destination register operand is encoded in
+ VEX.vvvv for instructions with 2 destination register operands.
+ For assembler, there are no difference between VEX.NDS, VEX.DDS
+ and VEX.NDD2.
+ 2. VEX.NDD. Register destination is encoded in VEX.vvvv for
+ instructions with 1 destination register operand.
+ 3. VEX.LWP. Register destination is encoded in VEX.vvvv and one
+ of the operands can access a memory location.
+ */
+#define VEXXDS 1
+#define VEXNDD 2
+#define VEXLWP 3
+ VexVVVV,
+ /* How the VEX.W bit is used:
+ 0: Set by the REX.W bit.
+ 1: VEX.W0. Should always be 0.
+ 2: VEX.W1. Should always be 1.
+ */
+#define VEXW0 1
+#define VEXW1 2
+ VexW,
+ /* VEX opcode prefix:
+ 0: VEX 0x0F opcode prefix.
+ 1: VEX 0x0F38 opcode prefix.
+ 2: VEX 0x0F3A opcode prefix
+ 3: XOP 0x08 opcode prefix.
+ 4: XOP 0x09 opcode prefix
+ 5: XOP 0x0A opcode prefix.
+ */
+#define VEX0F 0
+#define VEX0F38 1
+#define VEX0F3A 2
+#define XOP08 3
+#define XOP09 4
+#define XOP0A 5
+ VexOpcode,
+ /* number of VEX source operands:
+ 0: <= 2 source operands.
+ 1: 2 XOP source operands.
+ 2: 3 source operands.
+ */
+#define XOP2SOURCES 1
+#define VEX3SOURCES 2
+ VexSources,