+
+ /* insn has EVEX prefix:
+ 1: 512bit EVEX prefix.
+ 2: 128bit EVEX prefix.
+ 3: 256bit EVEX prefix.
+ 4: Length-ignored (LIG) EVEX prefix.
+ */
+#define EVEX512 1
+#define EVEX128 2
+#define EVEX256 3
+#define EVEXLIG 4
+ EVex,
+
+ /* AVX512 masking support:
+ 1: Zeroing-masking.
+ 2: Merging-masking.
+ 3: Both zeroing and merging masking.
+ */
+#define ZEROING_MASKING 1
+#define MERGING_MASKING 2
+#define BOTH_MASKING 3
+ Masking,
+
+ /* Input element size of vector insn:
+ 0: 32bit.
+ 1: 64bit.
+ */
+ VecESize,
+
+ /* Broadcast factor.
+ 0: No broadcast.
+ 1: 1to16 broadcast.
+ 2: 1to8 broadcast.
+ */
+#define NO_BROADCAST 0
+#define BROADCAST_1TO16 1
+#define BROADCAST_1TO8 2
+#define BROADCAST_1TO4 3
+#define BROADCAST_1TO2 4
+ Broadcast,
+
+ /* Static rounding control is supported. */
+ StaticRounding,
+
+ /* Supress All Exceptions is supported. */
+ SAE,
+
+ /* Copressed Disp8*N attribute. */
+ Disp8MemShift,
+
+ /* Default mask isn't allowed. */
+ NoDefMask,
+