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X86: Remove the .s suffix from EVEX vpextrw
[deliverable/binutils-gdb.git]
/
opcodes
/
m32c-dis.c
diff --git
a/opcodes/m32c-dis.c
b/opcodes/m32c-dis.c
index 7d430ecd249dc509e99ca88bfd27f38c48e061ae..37a5ad18923e7645f0c1583d767cee7bcadfc275 100644
(file)
--- a/
opcodes/m32c-dis.c
+++ b/
opcodes/m32c-dis.c
@@
-4,7
+4,7
@@
THIS FILE IS MACHINE GENERATED WITH CGEN.
- the resultant file is machine generated, cgen-dis.in isn't
THIS FILE IS MACHINE GENERATED WITH CGEN.
- the resultant file is machine generated, cgen-dis.in isn't
- Copyright (C) 1996-201
4
Free Software Foundation, Inc.
+ Copyright (C) 1996-201
6
Free Software Foundation, Inc.
This file is part of libopcodes.
This file is part of libopcodes.
@@
-203,7
+203,7
@@
print_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
int length ATTRIBUTE_UNUSED,
int push)
{
int length ATTRIBUTE_UNUSED,
int push)
{
- static char * m16c_register_names [] =
+ static char * m16c_register_names [] =
{
"r0", "r1", "r2", "r3", "a0", "a1", "sb", "fb"
};
{
"r0", "r1", "r2", "r3", "a0", "a1", "sb", "fb"
};
@@
-216,7
+216,7
@@
print_regset (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
mask = 0x80;
else
mask = 1;
mask = 0x80;
else
mask = 1;
-
+
if (value & mask)
{
(*info->fprintf_func) (info->stream, "%s", m16c_register_names [0]);
if (value & mask)
{
(*info->fprintf_func) (info->stream, "%s", m16c_register_names [0]);
@@
-893,7
+893,7
@@
m32c_cgen_print_operand (CGEN_CPU_DESC cd,
}
}
}
}
-cgen_print_fn * const m32c_cgen_print_handlers[] =
+cgen_print_fn * const m32c_cgen_print_handlers[] =
{
print_insn_normal,
};
{
print_insn_normal,
};
@@
-1083,7
+1083,7
@@
print_insn (CGEN_CPU_DESC cd,
int length;
unsigned long insn_value_cropped;
int length;
unsigned long insn_value_cropped;
-#ifdef CGEN_VALIDATE_INSN_SUPPORTED
+#ifdef CGEN_VALIDATE_INSN_SUPPORTED
/* Not needed as insn shouldn't be in hash lists if not supported. */
/* Supported by this cpu? */
if (! m32c_cgen_insn_supported (cd, insn))
/* Not needed as insn shouldn't be in hash lists if not supported. */
/* Supported by this cpu? */
if (! m32c_cgen_insn_supported (cd, insn))
@@
-1101,7
+1101,7
@@
print_insn (CGEN_CPU_DESC cd,
relevant part from the buffer. */
if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
(unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
relevant part from the buffer. */
if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
(unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
- insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
+ insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
info->endian == BFD_ENDIAN_BIG);
else
insn_value_cropped = insn_value;
info->endian == BFD_ENDIAN_BIG);
else
insn_value_cropped = insn_value;
@@
-1220,7
+1220,7
@@
print_insn_m32c (bfd_vma pc, disassemble_info *info)
arch = info->arch;
if (arch == bfd_arch_unknown)
arch = CGEN_BFD_ARCH;
arch = info->arch;
if (arch == bfd_arch_unknown)
arch = CGEN_BFD_ARCH;
-
+
/* There's no standard way to compute the machine or isa number
so we leave it to the target. */
#ifdef CGEN_COMPUTE_MACH
/* There's no standard way to compute the machine or isa number
so we leave it to the target. */
#ifdef CGEN_COMPUTE_MACH
@@
-1261,7
+1261,7
@@
print_insn_m32c (bfd_vma pc, disassemble_info *info)
break;
}
}
break;
}
}
- }
+ }
/* If we haven't initialized yet, initialize the opcode table. */
if (! cd)
/* If we haven't initialized yet, initialize the opcode table. */
if (! cd)
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0.030164 seconds
and
4
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