* cris-dis.c (format_hex): Remove ineffective warning fix.

[deliverable/binutils-gdb.git] / opcodes / m32r-dis.c

diff --git a/opcodes/m32r-dis.c b/opcodes/m32r-dis.c
index f880784caaa301da274abdb34c79a96d9d25f60a..62ad5447f5f824aecea75ca1024f083930f99127 100644 (file)
--- a/opcodes/m32r-dis.c
+++ b/opcodes/m32r-dis.c
@@ -4,7 +4,8 @@
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 - the resultant file is machine generated, cgen-dis.in isn't
 
 THIS FILE IS MACHINE GENERATED WITH CGEN.
 - the resultant file is machine generated, cgen-dis.in isn't
 

-Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
+Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2005
+Free Software Foundation, Inc.

 
 This file is part of the GNU Binutils and GDB, the GNU debugger.
 
 
 This file is part of the GNU Binutils and GDB, the GNU debugger.
 


@@ -31,6 +32,7 @@ along with this program; if not, write to the Free Software Foundation, Inc.,
 #include "dis-asm.h"
 #include "bfd.h"
 #include "symcat.h"
 #include "dis-asm.h"
 #include "bfd.h"
 #include "symcat.h"

+#include "libiberty.h"

 #include "m32r-desc.h"
 #include "m32r-opc.h"
 #include "opintl.h"
 #include "m32r-desc.h"
 #include "m32r-opc.h"
 #include "opintl.h"


@@ -39,47 +41,53 @@ along with this program; if not, write to the Free Software Foundation, Inc.,
 #define UNKNOWN_INSN_MSG _("*unknown*")
 
 static void print_normal
 #define UNKNOWN_INSN_MSG _("*unknown*")
 
 static void print_normal

-     PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned int, bfd_vma, int));
+  (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);

 static void print_address
 static void print_address

-     PARAMS ((CGEN_CPU_DESC, PTR, bfd_vma, unsigned int, bfd_vma, int));
+  (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;

 static void print_keyword
 static void print_keyword

-     PARAMS ((CGEN_CPU_DESC, PTR, CGEN_KEYWORD *, long, unsigned int));
+  (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;

 static void print_insn_normal
 static void print_insn_normal

-     PARAMS ((CGEN_CPU_DESC, PTR, const CGEN_INSN *, CGEN_FIELDS *,
-             bfd_vma, int));
-static int print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma,
-                              disassemble_info *, char *, int));
+  (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
+static int print_insn
+  (CGEN_CPU_DESC, bfd_vma,  disassemble_info *, bfd_byte *, unsigned);

 static int default_print_insn
 static int default_print_insn

-     PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));
+  (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
+static int read_insn
+  (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
+   unsigned long *);

 \f
 /* -- disassembler routines inserted here */
 
 /* -- dis.c */
 \f
 /* -- disassembler routines inserted here */
 
 /* -- dis.c */

+static void print_hash PARAMS ((CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int));
+static int my_print_insn PARAMS ((CGEN_CPU_DESC, bfd_vma, disassemble_info *));

 
 /* Immediate values are prefixed with '#'.  */
 
 
 /* Immediate values are prefixed with '#'.  */
 

-#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length) \
-do { \
-  if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX)) \
-    (*info->fprintf_func) (info->stream, "#"); \
-} while (0)
+#define CGEN_PRINT_NORMAL(cd, info, value, attrs, pc, length)  \
+  do                                                           \
+    {                                                          \
+      if (CGEN_BOOL_ATTR ((attrs), CGEN_OPERAND_HASH_PREFIX))  \
+        (*info->fprintf_func) (info->stream, "#");             \
+    }                                                          \
+  while (0)

 
 /* Handle '#' prefixes as operands.  */
 
 static void
 print_hash (cd, dis_info, value, attrs, pc, length)
 
 /* Handle '#' prefixes as operands.  */
 
 static void
 print_hash (cd, dis_info, value, attrs, pc, length)

-     CGEN_CPU_DESC cd;
+     CGEN_CPU_DESC cd ATTRIBUTE_UNUSED;

      PTR dis_info;
      PTR dis_info;

-     long value;
-     unsigned int attrs;
-     bfd_vma pc;
-     int length;
+     long value ATTRIBUTE_UNUSED;
+     unsigned int attrs ATTRIBUTE_UNUSED;
+     bfd_vma pc ATTRIBUTE_UNUSED;
+     int length ATTRIBUTE_UNUSED;

 {
   disassemble_info *info = (disassemble_info *) dis_info;
   (*info->fprintf_func) (info->stream, "#");
 }
 
 {
   disassemble_info *info = (disassemble_info *) dis_info;
   (*info->fprintf_func) (info->stream, "#");
 }
 

-#undef CGEN_PRINT_INSN
+#undef  CGEN_PRINT_INSN

 #define CGEN_PRINT_INSN my_print_insn
 
 static int
 #define CGEN_PRINT_INSN my_print_insn
 
 static int


@@ -88,14 +96,17 @@ my_print_insn (cd, pc, info)
      bfd_vma pc;
      disassemble_info *info;
 {
      bfd_vma pc;
      disassemble_info *info;
 {

-  char buffer[CGEN_MAX_INSN_SIZE];
-  char *buf = buffer;
+  bfd_byte buffer[CGEN_MAX_INSN_SIZE];
+  bfd_byte *buf = buffer;

   int status;
   int buflen = (pc & 3) == 0 ? 4 : 2;
   int status;
   int buflen = (pc & 3) == 0 ? 4 : 2;

+  int big_p = CGEN_CPU_INSN_ENDIAN (cd) == CGEN_ENDIAN_BIG;
+  bfd_byte *x;

 
   /* Read the base part of the insn.  */
 
 
   /* Read the base part of the insn.  */
 

-  status = (*info->read_memory_func) (pc, buf, buflen, info);
+  status = (*info->read_memory_func) (pc - ((!big_p && (pc & 3) != 0) ? 2 : 0),
+                                      buf, buflen, info);

   if (status != 0)
     {
       (*info->memory_error_func) (status, pc, info);
   if (status != 0)
     {
       (*info->memory_error_func) (status, pc, info);


@@ -103,22 +114,25 @@ my_print_insn (cd, pc, info)
     }
 
   /* 32 bit insn?  */
     }
 
   /* 32 bit insn?  */

-  if ((pc & 3) == 0 && (buf[0] & 0x80) != 0)
+  x = (big_p ? &buf[0] : &buf[3]);
+  if ((pc & 3) == 0 && (*x & 0x80) != 0)

     return print_insn (cd, pc, info, buf, buflen);
 
   /* Print the first insn.  */
   if ((pc & 3) == 0)
     {
     return print_insn (cd, pc, info, buf, buflen);
 
   /* Print the first insn.  */
   if ((pc & 3) == 0)
     {

+      buf += (big_p ? 0 : 2);

       if (print_insn (cd, pc, info, buf, 2) == 0)
        (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
       if (print_insn (cd, pc, info, buf, 2) == 0)
        (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);

-      buf += 2;
+      buf += (big_p ? 2 : -2);

     }
 
     }
 

-  if (buf[0] & 0x80)
+  x = (big_p ? &buf[0] : &buf[1]);
+  if (*x & 0x80)

     {
       /* Parallel.  */
       (*info->fprintf_func) (info->stream, " || ");
     {
       /* Parallel.  */
       (*info->fprintf_func) (info->stream, " || ");

-      buf[0] &= 0x7f;
+      *x &= 0x7f;

     }
   else
     (*info->fprintf_func) (info->stream, " -> ");
     }
   else
     (*info->fprintf_func) (info->stream, " -> ");


@@ -134,6 +148,10 @@ my_print_insn (cd, pc, info)
 
 /* -- */
 
 
 /* -- */
 

+void m32r_cgen_print_operand
+  PARAMS ((CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *,
+           void const *, bfd_vma, int));
+

 /* Main entry point for printing operands.
    XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
    of dis-asm.h on cgen.h.
 /* Main entry point for printing operands.
    XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
    of dis-asm.h on cgen.h.


@@ -147,8 +165,7 @@ my_print_insn (cd, pc, info)
 
    This function could be moved into `print_insn_normal', but keeping it
    separate makes clear the interface between `print_insn_normal' and each of
 
    This function could be moved into `print_insn_normal', but keeping it
    separate makes clear the interface between `print_insn_normal' and each of

-   the handlers.
-*/
+   the handlers.  */

 
 void
 m32r_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)
 
 void
 m32r_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)


@@ -156,7 +173,7 @@ m32r_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)
      int opindex;
      PTR xinfo;
      CGEN_FIELDS *fields;
      int opindex;
      PTR xinfo;
      CGEN_FIELDS *fields;

-     void const *attrs;
+     void const *attrs ATTRIBUTE_UNUSED;

      bfd_vma pc;
      int length;
 {
      bfd_vma pc;
      int length;
 {


@@ -224,12 +241,18 @@ m32r_cgen_print_operand (cd, opindex, xinfo, fields, attrs, pc, length)
     case M32R_OPERAND_UIMM24 :
       print_address (cd, info, fields->f_uimm24, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
       break;
     case M32R_OPERAND_UIMM24 :
       print_address (cd, info, fields->f_uimm24, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR), pc, length);
       break;

+    case M32R_OPERAND_UIMM3 :
+      print_normal (cd, info, fields->f_uimm3, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+      break;

     case M32R_OPERAND_UIMM4 :
       print_normal (cd, info, fields->f_uimm4, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
       break;
     case M32R_OPERAND_UIMM5 :
       print_normal (cd, info, fields->f_uimm5, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
       break;
     case M32R_OPERAND_UIMM4 :
       print_normal (cd, info, fields->f_uimm4, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
       break;
     case M32R_OPERAND_UIMM5 :
       print_normal (cd, info, fields->f_uimm5, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
       break;

+    case M32R_OPERAND_UIMM8 :
+      print_normal (cd, info, fields->f_uimm8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
+      break;

     case M32R_OPERAND_ULO16 :
       print_normal (cd, info, fields->f_uimm16, 0, pc, length);
       break;
     case M32R_OPERAND_ULO16 :
       print_normal (cd, info, fields->f_uimm16, 0, pc, length);
       break;


@@ -262,13 +285,12 @@ m32r_cgen_init_dis (cd)
 /* Default print handler.  */
 
 static void
 /* Default print handler.  */
 
 static void

-print_normal (cd, dis_info, value, attrs, pc, length)
-     CGEN_CPU_DESC cd;
-     PTR dis_info;
-     long value;
-     unsigned int attrs;
-     bfd_vma pc;
-     int length;
+print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+             void *dis_info,
+             long value,
+             unsigned int attrs,
+             bfd_vma pc ATTRIBUTE_UNUSED,
+             int length ATTRIBUTE_UNUSED)

 {
   disassemble_info *info = (disassemble_info *) dis_info;
 
 {
   disassemble_info *info = (disassemble_info *) dis_info;
 


@@ -288,13 +310,12 @@ print_normal (cd, dis_info, value, attrs, pc, length)
 /* Default address handler.  */
 
 static void
 /* Default address handler.  */
 
 static void

-print_address (cd, dis_info, value, attrs, pc, length)
-     CGEN_CPU_DESC cd;
-     PTR dis_info;
-     bfd_vma value;
-     unsigned int attrs;
-     bfd_vma pc;
-     int length;
+print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+              void *dis_info,
+              bfd_vma value,
+              unsigned int attrs,
+              bfd_vma pc ATTRIBUTE_UNUSED,
+              int length ATTRIBUTE_UNUSED)

 {
   disassemble_info *info = (disassemble_info *) dis_info;
 
 {
   disassemble_info *info = (disassemble_info *) dis_info;
 


@@ -318,12 +339,11 @@ print_address (cd, dis_info, value, attrs, pc, length)
 /* Keyword print handler.  */
 
 static void
 /* Keyword print handler.  */
 
 static void

-print_keyword (cd, dis_info, keyword_table, value, attrs)
-     CGEN_CPU_DESC cd;
-     PTR dis_info;
-     CGEN_KEYWORD *keyword_table;
-     long value;
-     unsigned int attrs;
+print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+              void *dis_info,
+              CGEN_KEYWORD *keyword_table,
+              long value,
+              unsigned int attrs ATTRIBUTE_UNUSED)

 {
   disassemble_info *info = (disassemble_info *) dis_info;
   const CGEN_KEYWORD_ENTRY *ke;
 {
   disassemble_info *info = (disassemble_info *) dis_info;
   const CGEN_KEYWORD_ENTRY *ke;


@@ -337,21 +357,20 @@ print_keyword (cd, dis_info, keyword_table, value, attrs)
 \f
 /* Default insn printer.
 
 \f
 /* Default insn printer.
 

-   DIS_INFO is defined as `PTR' so the disassembler needn't know anything
+   DIS_INFO is defined as `void *' so the disassembler needn't know anything

    about disassemble_info.  */
 
 static void
    about disassemble_info.  */
 
 static void

-print_insn_normal (cd, dis_info, insn, fields, pc, length)
-     CGEN_CPU_DESC cd;
-     PTR dis_info;
-     const CGEN_INSN *insn;
-     CGEN_FIELDS *fields;
-     bfd_vma pc;
-     int length;
+print_insn_normal (CGEN_CPU_DESC cd,
+                  void *dis_info,
+                  const CGEN_INSN *insn,
+                  CGEN_FIELDS *fields,
+                  bfd_vma pc,
+                  int length)

 {
   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
   disassemble_info *info = (disassemble_info *) dis_info;
 {
   const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
   disassemble_info *info = (disassemble_info *) dis_info;

-  const unsigned char *syn;
+  const CGEN_SYNTAX_CHAR_TYPE *syn;

 
   CGEN_INIT_PRINT (cd);
 
 
   CGEN_INIT_PRINT (cd);
 


@@ -374,6 +393,34 @@ print_insn_normal (cd, dis_info, insn, fields, pc, length)
     }
 }
 \f
     }
 }
 \f

+/* Subroutine of print_insn. Reads an insn into the given buffers and updates
+   the extract info.
+   Returns 0 if all is well, non-zero otherwise.  */
+
+static int
+read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
+          bfd_vma pc,
+          disassemble_info *info,
+          bfd_byte *buf,
+          int buflen,
+          CGEN_EXTRACT_INFO *ex_info,
+          unsigned long *insn_value)
+{
+  int status = (*info->read_memory_func) (pc, buf, buflen, info);
+  if (status != 0)
+    {
+      (*info->memory_error_func) (status, pc, info);
+      return -1;
+    }
+
+  ex_info->dis_info = info;
+  ex_info->valid = (1 << buflen) - 1;
+  ex_info->insn_bytes = buf;
+
+  *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
+  return 0;
+}
+

 /* Utility to print an insn.
    BUF is the base part of the insn, target byte order, BUFLEN bytes long.
    The result is the size of the insn in bytes or zero for an unknown insn
 /* Utility to print an insn.
    BUF is the base part of the insn, target byte order, BUFLEN bytes long.
    The result is the size of the insn in bytes or zero for an unknown insn


@@ -381,64 +428,89 @@ print_insn_normal (cd, dis_info, insn, fields, pc, length)
    been called).  */
 
 static int
    been called).  */
 
 static int

-print_insn (cd, pc, info, buf, buflen)
-     CGEN_CPU_DESC cd;
-     bfd_vma pc;
-     disassemble_info *info;
-     char *buf;
-     int buflen;
+print_insn (CGEN_CPU_DESC cd,
+           bfd_vma pc,
+           disassemble_info *info,
+           bfd_byte *buf,
+           unsigned int buflen)

 {
 {

-  unsigned long insn_value;
+  CGEN_INSN_INT insn_value;

   const CGEN_INSN_LIST *insn_list;
   CGEN_EXTRACT_INFO ex_info;
   const CGEN_INSN_LIST *insn_list;
   CGEN_EXTRACT_INFO ex_info;

+  int basesize;

 
 

+  /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
+  basesize = cd->base_insn_bitsize < buflen * 8 ?
+                                     cd->base_insn_bitsize : buflen * 8;
+  insn_value = cgen_get_insn_value (cd, buf, basesize);
+
+
+  /* Fill in ex_info fields like read_insn would.  Don't actually call
+     read_insn, since the incoming buffer is already read (and possibly
+     modified a la m32r).  */
+  ex_info.valid = (1 << buflen) - 1;

   ex_info.dis_info = info;
   ex_info.dis_info = info;

-  ex_info.valid = (1 << (cd->base_insn_bitsize / 8)) - 1;

   ex_info.insn_bytes = buf;
 
   ex_info.insn_bytes = buf;
 

-  switch (buflen)
-    {
-    case 1:
-      insn_value = buf[0];
-      break;
-    case 2:
-      insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb16 (buf) : bfd_getl16 (buf);
-      break;
-    case 4:
-      insn_value = info->endian == BFD_ENDIAN_BIG ? bfd_getb32 (buf) : bfd_getl32 (buf);
-      break;
-    default:
-      abort ();
-    }
-

   /* The instructions are stored in hash lists.
      Pick the first one and keep trying until we find the right one.  */
 
   /* The instructions are stored in hash lists.
      Pick the first one and keep trying until we find the right one.  */
 

-  insn_list = CGEN_DIS_LOOKUP_INSN (cd, buf, insn_value);
+  insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);

   while (insn_list != NULL)
     {
       const CGEN_INSN *insn = insn_list->insn;
       CGEN_FIELDS fields;
       int length;
   while (insn_list != NULL)
     {
       const CGEN_INSN *insn = insn_list->insn;
       CGEN_FIELDS fields;
       int length;

+      unsigned long insn_value_cropped;

 
 

-#if 0 /* not needed as insn shouldn't be in hash lists if not supported */
+#ifdef CGEN_VALIDATE_INSN_SUPPORTED 
+      /* Not needed as insn shouldn't be in hash lists if not supported.  */

       /* Supported by this cpu?  */
       if (! m32r_cgen_insn_supported (cd, insn))
       /* Supported by this cpu?  */
       if (! m32r_cgen_insn_supported (cd, insn))

-       continue;
+        {
+          insn_list = CGEN_DIS_NEXT_INSN (insn_list);
+         continue;
+        }

 #endif
 
       /* Basic bit mask must be correct.  */
       /* ??? May wish to allow target to defer this check until the extract
         handler.  */
 #endif
 
       /* Basic bit mask must be correct.  */
       /* ??? May wish to allow target to defer this check until the extract
         handler.  */

-      if ((insn_value & CGEN_INSN_BASE_MASK (insn))
+
+      /* Base size may exceed this instruction's size.  Extract the
+         relevant part from the buffer. */
+      if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
+         (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
+       insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), 
+                                          info->endian == BFD_ENDIAN_BIG);
+      else
+       insn_value_cropped = insn_value;
+
+      if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))

          == CGEN_INSN_BASE_VALUE (insn))
        {
          /* Printing is handled in two passes.  The first pass parses the
             machine insn and extracts the fields.  The second pass prints
             them.  */
 
          == CGEN_INSN_BASE_VALUE (insn))
        {
          /* Printing is handled in two passes.  The first pass parses the
             machine insn and extracts the fields.  The second pass prints
             them.  */
 

-         length = CGEN_EXTRACT_FN (cd, insn)
-           (cd, insn, &ex_info, insn_value, &fields, pc);
+         /* Make sure the entire insn is loaded into insn_value, if it
+            can fit.  */
+         if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
+             (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
+           {
+             unsigned long full_insn_value;
+             int rc = read_insn (cd, pc, info, buf,
+                                 CGEN_INSN_BITSIZE (insn) / 8,
+                                 & ex_info, & full_insn_value);
+             if (rc != 0)
+               return rc;
+             length = CGEN_EXTRACT_FN (cd, insn)
+               (cd, insn, &ex_info, full_insn_value, &fields, pc);
+           }
+         else
+           length = CGEN_EXTRACT_FN (cd, insn)
+             (cd, insn, &ex_info, insn_value_cropped, &fields, pc);
+

          /* length < 0 -> error */
          if (length < 0)
            return length;
          /* length < 0 -> error */
          if (length < 0)
            return length;


@@ -465,37 +537,53 @@ print_insn (cd, pc, info, buf, buflen)
 #endif
 
 static int
 #endif
 
 static int

-default_print_insn (cd, pc, info)
-     CGEN_CPU_DESC cd;
-     bfd_vma pc;
-     disassemble_info *info;
+default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)

 {
 {

-  char buf[CGEN_MAX_INSN_SIZE];
+  bfd_byte buf[CGEN_MAX_INSN_SIZE];
+  int buflen;

   int status;
 
   int status;
 

-  /* Read the base part of the insn.  */
+  /* Attempt to read the base part of the insn.  */
+  buflen = cd->base_insn_bitsize / 8;
+  status = (*info->read_memory_func) (pc, buf, buflen, info);
+
+  /* Try again with the minimum part, if min < base.  */
+  if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
+    {
+      buflen = cd->min_insn_bitsize / 8;
+      status = (*info->read_memory_func) (pc, buf, buflen, info);
+    }

 
 

-  status = (*info->read_memory_func) (pc, buf, cd->base_insn_bitsize / 8, info);

   if (status != 0)
     {
       (*info->memory_error_func) (status, pc, info);
       return -1;
     }
 
   if (status != 0)
     {
       (*info->memory_error_func) (status, pc, info);
       return -1;
     }
 

-  return print_insn (cd, pc, info, buf, cd->base_insn_bitsize / 8);
+  return print_insn (cd, pc, info, buf, buflen);

 }
 
 /* Main entry point.
    Print one instruction from PC on INFO->STREAM.
    Return the size of the instruction (in bytes).  */
 
 }
 
 /* Main entry point.
    Print one instruction from PC on INFO->STREAM.
    Return the size of the instruction (in bytes).  */
 

+typedef struct cpu_desc_list {
+  struct cpu_desc_list *next;
+  int isa;
+  int mach;
+  int endian;
+  CGEN_CPU_DESC cd;
+} cpu_desc_list;
+

 int
 int

-print_insn_m32r (pc, info)
-     bfd_vma pc;
-     disassemble_info *info;
+print_insn_m32r (bfd_vma pc, disassemble_info *info)

 {
 {

+  static cpu_desc_list *cd_list = 0;
+  cpu_desc_list *cl = 0;

   static CGEN_CPU_DESC cd = 0;
   static CGEN_CPU_DESC cd = 0;

-  static prev_isa,prev_mach,prev_endian;
+  static int prev_isa;
+  static int prev_mach;
+  static int prev_endian;

   int length;
   int isa,mach;
   int endian = (info->endian == BFD_ENDIAN_BIG
   int length;
   int isa,mach;
   int endian = (info->endian == BFD_ENDIAN_BIG


@@ -510,26 +598,39 @@ print_insn_m32r (pc, info)
   arch = info->arch;
   if (arch == bfd_arch_unknown)
     arch = CGEN_BFD_ARCH;
   arch = info->arch;
   if (arch == bfd_arch_unknown)
     arch = CGEN_BFD_ARCH;

-      
-  /* There's no standard way to compute the isa number (e.g. for arm thumb)
+   
+  /* There's no standard way to compute the machine or isa number

      so we leave it to the target.  */
      so we leave it to the target.  */

+#ifdef CGEN_COMPUTE_MACH
+  mach = CGEN_COMPUTE_MACH (info);
+#else
+  mach = info->mach;
+#endif
+

 #ifdef CGEN_COMPUTE_ISA
   isa = CGEN_COMPUTE_ISA (info);
 #else
 #ifdef CGEN_COMPUTE_ISA
   isa = CGEN_COMPUTE_ISA (info);
 #else

-  isa = 0;
+  isa = info->insn_sets;

 #endif
 
 #endif
 

-  mach = info->mach;
-
-  /* If we've switched cpu's, close the current table and open a new one.  */
+  /* If we've switched cpu's, try to find a handle we've used before */

   if (cd
       && (isa != prev_isa
          || mach != prev_mach
          || endian != prev_endian))
     {
   if (cd
       && (isa != prev_isa
          || mach != prev_mach
          || endian != prev_endian))
     {

-      m32r_cgen_cpu_close (cd);

       cd = 0;
       cd = 0;

-    }
+      for (cl = cd_list; cl; cl = cl->next)
+       {
+         if (cl->isa == isa &&
+             cl->mach == mach &&
+             cl->endian == endian)
+           {
+             cd = cl->cd;
+             break;
+           }
+       }
+    } 

 
   /* If we haven't initialized yet, initialize the opcode table.  */
   if (! cd)
 
   /* If we haven't initialized yet, initialize the opcode table.  */
   if (! cd)


@@ -550,6 +651,16 @@ print_insn_m32r (pc, info)
                                 CGEN_CPU_OPEN_END);
       if (!cd)
        abort ();
                                 CGEN_CPU_OPEN_END);
       if (!cd)
        abort ();

+
+      /* save this away for future reference */
+      cl = xmalloc (sizeof (struct cpu_desc_list));
+      cl->cd = cd;
+      cl->isa = isa;
+      cl->mach = mach;
+      cl->endian = endian;
+      cl->next = cd_list;
+      cd_list = cl;
+

       m32r_cgen_init_dis (cd);
     }
 
       m32r_cgen_init_dis (cd);
     }